3 * (c) Copyright Dave, 2004
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4 * (C) notaz, 2006-2010
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6 * This work is licensed under the terms of MAME license.
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7 * See COPYING file in the top-level directory.
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10 #include "pico_int.h"
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13 #include "sound/ym2612.h"
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14 #include "sound/sn76496.h"
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16 extern unsigned int lastSSRamWrite; // used by serial eeprom code
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18 uptr m68k_read8_map [0x1000000 >> M68K_MEM_SHIFT];
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19 uptr m68k_read16_map [0x1000000 >> M68K_MEM_SHIFT];
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20 uptr m68k_write8_map [0x1000000 >> M68K_MEM_SHIFT];
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21 uptr m68k_write16_map[0x1000000 >> M68K_MEM_SHIFT];
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23 static void xmap_set(uptr *map, int shift, int start_addr, int end_addr,
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24 const void *func_or_mh, int is_func)
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27 // workaround bug (segfault) in
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28 // Apple LLVM version 4.2 (clang-425.0.27) (based on LLVM 3.2svn)
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31 uptr addr = (uptr)func_or_mh;
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32 int mask = (1 << shift) - 1;
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35 if ((start_addr & mask) != 0 || (end_addr & mask) != mask) {
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36 elprintf(EL_STATUS|EL_ANOMALY, "xmap_set: tried to map bad range: %06x-%06x",
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37 start_addr, end_addr);
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42 elprintf(EL_STATUS|EL_ANOMALY, "xmap_set: ptr is not aligned: %08lx", addr);
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49 for (i = start_addr >> shift; i <= end_addr >> shift; i++) {
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56 void z80_map_set(uptr *map, int start_addr, int end_addr,
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57 const void *func_or_mh, int is_func)
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59 xmap_set(map, Z80_MEM_SHIFT, start_addr, end_addr, func_or_mh, is_func);
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62 void cpu68k_map_set(uptr *map, int start_addr, int end_addr,
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63 const void *func_or_mh, int is_func)
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65 xmap_set(map, M68K_MEM_SHIFT, start_addr, end_addr, func_or_mh, is_func);
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67 // setup FAME fetchmap
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70 int shiftout = 24 - FAMEC_FETCHBITS;
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71 int i = start_addr >> shiftout;
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72 uptr base = (uptr)func_or_mh - (i << shiftout);
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73 for (; i <= (end_addr >> shiftout); i++)
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74 PicoCpuFM68k.Fetch[i] = base;
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79 // more specialized/optimized function (does same as above)
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80 void cpu68k_map_all_ram(int start_addr, int end_addr, void *ptr, int is_sub)
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82 uptr *r8map, *r16map, *w8map, *w16map;
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83 uptr addr = (uptr)ptr;
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84 int shift = M68K_MEM_SHIFT;
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88 r8map = m68k_read8_map;
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89 r16map = m68k_read16_map;
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90 w8map = m68k_write8_map;
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91 w16map = m68k_write16_map;
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93 r8map = s68k_read8_map;
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94 r16map = s68k_read16_map;
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95 w8map = s68k_write8_map;
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96 w16map = s68k_write16_map;
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101 for (i = start_addr >> shift; i <= end_addr >> shift; i++)
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102 r8map[i] = r16map[i] = w8map[i] = w16map[i] = addr;
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104 // setup FAME fetchmap
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106 M68K_CONTEXT *ctx = is_sub ? &PicoCpuFS68k : &PicoCpuFM68k;
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107 int shiftout = 24 - FAMEC_FETCHBITS;
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108 i = start_addr >> shiftout;
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109 addr = (uptr)ptr - (i << shiftout);
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110 for (; i <= (end_addr >> shiftout); i++)
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111 ctx->Fetch[i] = addr;
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116 static u32 m68k_unmapped_read8(u32 a)
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118 elprintf(EL_UIO, "m68k unmapped r8 [%06x] @%06x", a, SekPc);
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119 return 0; // assume pulldown, as if MegaCD2 was attached
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122 static u32 m68k_unmapped_read16(u32 a)
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124 elprintf(EL_UIO, "m68k unmapped r16 [%06x] @%06x", a, SekPc);
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128 static void m68k_unmapped_write8(u32 a, u32 d)
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130 elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
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133 static void m68k_unmapped_write16(u32 a, u32 d)
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135 elprintf(EL_UIO, "m68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
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138 void m68k_map_unmap(int start_addr, int end_addr)
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141 // workaround bug (segfault) in
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142 // Apple LLVM version 4.2 (clang-425.0.27) (based on LLVM 3.2svn)
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146 int shift = M68K_MEM_SHIFT;
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149 addr = (uptr)m68k_unmapped_read8;
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150 for (i = start_addr >> shift; i <= end_addr >> shift; i++)
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151 m68k_read8_map[i] = (addr >> 1) | MAP_FLAG;
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153 addr = (uptr)m68k_unmapped_read16;
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154 for (i = start_addr >> shift; i <= end_addr >> shift; i++)
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155 m68k_read16_map[i] = (addr >> 1) | MAP_FLAG;
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157 addr = (uptr)m68k_unmapped_write8;
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158 for (i = start_addr >> shift; i <= end_addr >> shift; i++)
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159 m68k_write8_map[i] = (addr >> 1) | MAP_FLAG;
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161 addr = (uptr)m68k_unmapped_write16;
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162 for (i = start_addr >> shift; i <= end_addr >> shift; i++)
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163 m68k_write16_map[i] = (addr >> 1) | MAP_FLAG;
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166 MAKE_68K_READ8(m68k_read8, m68k_read8_map)
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167 MAKE_68K_READ16(m68k_read16, m68k_read16_map)
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168 MAKE_68K_READ32(m68k_read32, m68k_read16_map)
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169 MAKE_68K_WRITE8(m68k_write8, m68k_write8_map)
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170 MAKE_68K_WRITE16(m68k_write16, m68k_write16_map)
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171 MAKE_68K_WRITE32(m68k_write32, m68k_write16_map)
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173 // -----------------------------------------------------------------
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175 static u32 ym2612_read_local_68k(void);
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176 static int ym2612_write_local(u32 a, u32 d, int is_from_z80);
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177 static void z80_mem_setup(void);
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179 #ifdef _ASM_MEMORY_C
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180 u32 PicoRead8_sram(u32 a);
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181 u32 PicoRead16_sram(u32 a);
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184 #ifdef EMU_CORE_DEBUG
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185 u32 lastread_a, lastread_d[16]={0,}, lastwrite_cyc_d[16]={0,}, lastwrite_mus_d[16]={0,};
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186 int lrp_cyc=0, lrp_mus=0, lwp_cyc=0, lwp_mus=0;
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187 extern unsigned int ppop;
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191 void log_io(unsigned int addr, int bits, int rw);
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192 #elif defined(_MSC_VER)
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195 #define log_io(...)
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198 #if defined(EMU_C68K)
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199 void cyclone_crashed(u32 pc, struct Cyclone *context)
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201 elprintf(EL_STATUS|EL_ANOMALY, "%c68k crash detected @ %06x",
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202 context == &PicoCpuCM68k ? 'm' : 's', pc);
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203 context->membase = (u32)Pico.rom;
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204 context->pc = (u32)Pico.rom + Pico.romsize;
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208 // -----------------------------------------------------------------
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211 static u32 read_pad_3btn(int i, u32 out_bits)
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213 u32 pad = ~PicoIn.padInt[i]; // Get inverse of pad MXYZ SACB RLDU
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216 if (out_bits & 0x40) // TH
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217 value = pad & 0x3f; // ?1CB RLDU
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219 value = ((pad & 0xc0) >> 2) | (pad & 3); // ?0SA 00DU
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221 value |= out_bits & 0x40;
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225 static u32 read_pad_6btn(int i, u32 out_bits)
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227 u32 pad = ~PicoIn.padInt[i]; // Get inverse of pad MXYZ SACB RLDU
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228 int phase = Pico.m.padTHPhase[i];
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231 if (phase == 2 && !(out_bits & 0x40)) {
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232 value = (pad & 0xc0) >> 2; // ?0SA 0000
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235 else if(phase == 3) {
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236 if (out_bits & 0x40)
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237 return (pad & 0x30) | ((pad >> 8) & 0xf); // ?1CB MXYZ
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239 return ((pad & 0xc0) >> 2) | 0x0f; // ?0SA 1111
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243 if (out_bits & 0x40) // TH
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244 value = pad & 0x3f; // ?1CB RLDU
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246 value = ((pad & 0xc0) >> 2) | (pad & 3); // ?0SA 00DU
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249 value |= out_bits & 0x40;
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253 static u32 read_nothing(int i, u32 out_bits)
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258 typedef u32 (port_read_func)(int index, u32 out_bits);
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260 static port_read_func *port_readers[3] = {
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266 static NOINLINE u32 port_read(int i)
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268 u32 data_reg = PicoMem.ioports[i + 1];
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269 u32 ctrl_reg = PicoMem.ioports[i + 4] | 0x80;
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272 out = data_reg & ctrl_reg;
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273 out |= 0x7f & ~ctrl_reg; // pull-ups
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275 in = port_readers[i](i, out);
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277 return (in & ~ctrl_reg) | (data_reg & ctrl_reg);
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280 void PicoSetInputDevice(int port, enum input_device device)
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282 port_read_func *func;
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284 if (port < 0 || port > 2)
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288 case PICO_INPUT_PAD_3BTN:
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289 func = read_pad_3btn;
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292 case PICO_INPUT_PAD_6BTN:
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293 func = read_pad_6btn;
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297 func = read_nothing;
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301 port_readers[port] = func;
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304 NOINLINE u32 io_ports_read(u32 a)
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309 case 0: d = Pico.m.hardware; break; // Hardware value (Version register)
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310 case 1: d = port_read(0); break;
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311 case 2: d = port_read(1); break;
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312 case 3: d = port_read(2); break;
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313 default: d = PicoMem.ioports[a]; break; // IO ports can be used as RAM
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318 NOINLINE void io_ports_write(u32 a, u32 d)
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322 // 6 button gamepad: if TH went from 0 to 1, gamepad changes state
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323 if (1 <= a && a <= 2)
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325 Pico.m.padDelay[a - 1] = 0;
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326 if (!(PicoMem.ioports[a] & 0x40) && (d & 0x40))
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327 Pico.m.padTHPhase[a - 1]++;
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330 // certain IO ports can be used as RAM
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331 PicoMem.ioports[a] = d;
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334 static int z80_cycles_from_68k(void)
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336 int m68k_cnt = SekCyclesDone() - Pico.t.m68c_frame_start;
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337 return cycles_68k_to_z80(m68k_cnt);
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340 void NOINLINE ctl_write_z80busreq(u32 d)
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343 elprintf(EL_BUSREQ, "set_zrun: %i->%i [%u] @%06x", Pico.m.z80Run, d, SekCyclesDone(), SekPc);
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344 if (d ^ Pico.m.z80Run)
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348 Pico.t.z80c_cnt = z80_cycles_from_68k() + 2;
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352 if ((PicoIn.opt & POPT_EN_Z80) && !Pico.m.z80_reset) {
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354 PicoSyncZ80(SekCyclesDone());
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355 pprof_end_sub(m68k);
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362 void NOINLINE ctl_write_z80reset(u32 d)
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365 elprintf(EL_BUSREQ, "set_zreset: %i->%i [%u] @%06x", Pico.m.z80_reset, d, SekCyclesDone(), SekPc);
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366 if (d ^ Pico.m.z80_reset)
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370 if ((PicoIn.opt & POPT_EN_Z80) && Pico.m.z80Run) {
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372 PicoSyncZ80(SekCyclesDone());
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373 pprof_end_sub(m68k);
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380 Pico.t.z80c_cnt = z80_cycles_from_68k() + 2;
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383 Pico.m.z80_reset = d;
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387 static int get_scanline(int is_from_z80);
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389 static void psg_write_68k(u32 d)
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391 // look for volume write and update if needed
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392 if ((d & 0x90) == 0x90 && Pico.snd.psg_line < Pico.m.scanline)
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393 PsndDoPSG(Pico.m.scanline);
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398 static void psg_write_z80(u32 d)
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400 if ((d & 0x90) == 0x90) {
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401 int scanline = get_scanline(1);
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402 if (Pico.snd.psg_line < scanline)
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403 PsndDoPSG(scanline);
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409 // -----------------------------------------------------------------
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411 #ifndef _ASM_MEMORY_C
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413 // cart (save) RAM area (usually 0x200000 - ...)
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414 static u32 PicoRead8_sram(u32 a)
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417 if (Pico.sv.start <= a && a <= Pico.sv.end && (Pico.m.sram_reg & SRR_MAPPED))
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419 if (Pico.sv.flags & SRF_EEPROM) {
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424 d = *(u8 *)(Pico.sv.data - Pico.sv.start + a);
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425 elprintf(EL_SRAMIO, "sram r8 [%06x] %02x @ %06x", a, d, SekPc);
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429 // XXX: this is banking unfriendly
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430 if (a < Pico.romsize)
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431 return Pico.rom[a ^ 1];
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433 return m68k_unmapped_read8(a);
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436 static u32 PicoRead16_sram(u32 a)
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439 if (Pico.sv.start <= a && a <= Pico.sv.end && (Pico.m.sram_reg & SRR_MAPPED))
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441 if (Pico.sv.flags & SRF_EEPROM)
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444 u8 *pm = (u8 *)(Pico.sv.data - Pico.sv.start + a);
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448 elprintf(EL_SRAMIO, "sram r16 [%06x] %04x @ %06x", a, d, SekPc);
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452 if (a < Pico.romsize)
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453 return *(u16 *)(Pico.rom + a);
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455 return m68k_unmapped_read16(a);
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458 #endif // _ASM_MEMORY_C
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460 static void PicoWrite8_sram(u32 a, u32 d)
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462 if (a > Pico.sv.end || a < Pico.sv.start || !(Pico.m.sram_reg & SRR_MAPPED)) {
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463 m68k_unmapped_write8(a, d);
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467 elprintf(EL_SRAMIO, "sram w8 [%06x] %02x @ %06x", a, d & 0xff, SekPc);
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468 if (Pico.sv.flags & SRF_EEPROM)
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470 EEPROM_write8(a, d);
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473 u8 *pm = (u8 *)(Pico.sv.data - Pico.sv.start + a);
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474 if (*pm != (u8)d) {
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475 Pico.sv.changed = 1;
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481 static void PicoWrite16_sram(u32 a, u32 d)
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483 if (a > Pico.sv.end || a < Pico.sv.start || !(Pico.m.sram_reg & SRR_MAPPED)) {
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484 m68k_unmapped_write16(a, d);
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488 elprintf(EL_SRAMIO, "sram w16 [%06x] %04x @ %06x", a, d & 0xffff, SekPc);
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489 if (Pico.sv.flags & SRF_EEPROM)
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494 u8 *pm = (u8 *)(Pico.sv.data - Pico.sv.start + a);
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495 if (pm[0] != (u8)(d >> 8)) {
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496 Pico.sv.changed = 1;
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497 pm[0] = (u8)(d >> 8);
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499 if (pm[1] != (u8)d) {
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500 Pico.sv.changed = 1;
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506 // z80 area (0xa00000 - 0xa0ffff)
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507 // TODO: verify mirrors VDP and bank reg (bank area mirroring verified)
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508 static u32 PicoRead8_z80(u32 a)
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511 if ((Pico.m.z80Run & 1) || Pico.m.z80_reset) {
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512 elprintf(EL_ANOMALY, "68k z80 read with no bus! [%06x] @ %06x", a, SekPc);
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513 // open bus. Pulled down if MegaCD2 is attached.
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517 if ((a & 0x4000) == 0x0000)
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518 d = PicoMem.zram[a & 0x1fff];
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519 else if ((a & 0x6000) == 0x4000) // 0x4000-0x5fff
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520 d = ym2612_read_local_68k();
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522 elprintf(EL_UIO|EL_ANOMALY, "68k bad read [%06x] @%06x", a, SekPc);
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526 static u32 PicoRead16_z80(u32 a)
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528 u32 d = PicoRead8_z80(a);
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529 return d | (d << 8);
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532 static void PicoWrite8_z80(u32 a, u32 d)
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534 if ((Pico.m.z80Run & 1) || Pico.m.z80_reset) {
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535 // verified on real hw
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536 elprintf(EL_ANOMALY, "68k z80 write with no bus or reset! [%06x] %02x @ %06x", a, d&0xff, SekPc);
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540 if ((a & 0x4000) == 0x0000) { // z80 RAM
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541 PicoMem.zram[a & 0x1fff] = (u8)d;
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544 if ((a & 0x6000) == 0x4000) { // FM Sound
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545 if (PicoIn.opt & POPT_EN_FM)
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546 Pico.m.status |= ym2612_write_local(a & 3, d & 0xff, 0) & 1;
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549 // TODO: probably other VDP access too? Maybe more mirrors?
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550 if ((a & 0x7ff9) == 0x7f11) { // PSG Sound
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554 if ((a & 0x7f00) == 0x6000) // Z80 BANK register
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556 Pico.m.z80_bank68k >>= 1;
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557 Pico.m.z80_bank68k |= d << 8;
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558 Pico.m.z80_bank68k &= 0x1ff; // 9 bits and filled in the new top one
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559 elprintf(EL_Z80BNK, "z80 bank=%06x", Pico.m.z80_bank68k << 15);
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562 elprintf(EL_UIO|EL_ANOMALY, "68k bad write [%06x] %02x @ %06x", a, d&0xff, SekPc);
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565 static void PicoWrite16_z80(u32 a, u32 d)
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567 // for RAM, only most significant byte is sent
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568 // TODO: verify remaining accesses
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569 PicoWrite8_z80(a, d >> 8);
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572 #ifndef _ASM_MEMORY_C
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574 // IO/control area (0xa10000 - 0xa1ffff)
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575 u32 PicoRead8_io(u32 a)
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579 if ((a & 0xffe0) == 0x0000) { // I/O ports
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580 d = io_ports_read(a);
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584 // faking open bus (MegaCD pulldowns don't work here curiously)
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585 d = Pico.m.rotate++;
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588 if ((a & 0xfc00) == 0x1000) {
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589 // bit8 seems to be readable in this range
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593 if ((a & 0xff01) == 0x1100) { // z80 busreq (verified)
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594 d |= (Pico.m.z80Run | Pico.m.z80_reset) & 1;
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595 elprintf(EL_BUSREQ, "get_zrun: %02x [%u] @%06x", d, SekCyclesDone(), SekPc);
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600 d = PicoRead8_32x(a);
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606 u32 PicoRead16_io(u32 a)
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610 if ((a & 0xffe0) == 0x0000) { // I/O ports
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611 d = io_ports_read(a);
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617 d = (Pico.m.rotate += 0x41);
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618 d ^= (d << 5) ^ (d << 8);
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620 // bit8 seems to be readable in this range
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621 if ((a & 0xfc00) == 0x1000) {
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624 if ((a & 0xff00) == 0x1100) { // z80 busreq
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625 d |= ((Pico.m.z80Run | Pico.m.z80_reset) & 1) << 8;
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626 elprintf(EL_BUSREQ, "get_zrun: %04x [%u] @%06x", d, SekCyclesDone(), SekPc);
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631 d = PicoRead16_32x(a);
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637 void PicoWrite8_io(u32 a, u32 d)
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639 if ((a & 0xffe1) == 0x0001) { // I/O ports (verified: only LSB!)
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640 io_ports_write(a, d);
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643 if ((a & 0xff01) == 0x1100) { // z80 busreq
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644 ctl_write_z80busreq(d);
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647 if ((a & 0xff01) == 0x1200) { // z80 reset
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648 ctl_write_z80reset(d);
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651 if (a == 0xa130f1) { // sram access register
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652 elprintf(EL_SRAMIO, "sram reg=%02x", d);
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653 Pico.m.sram_reg &= ~(SRR_MAPPED|SRR_READONLY);
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654 Pico.m.sram_reg |= (u8)(d & 3);
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657 PicoWrite8_32x(a, d);
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660 void PicoWrite16_io(u32 a, u32 d)
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662 if ((a & 0xffe0) == 0x0000) { // I/O ports (verified: only LSB!)
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663 io_ports_write(a, d);
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666 if ((a & 0xff00) == 0x1100) { // z80 busreq
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667 ctl_write_z80busreq(d >> 8);
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670 if ((a & 0xff00) == 0x1200) { // z80 reset
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671 ctl_write_z80reset(d >> 8);
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674 if (a == 0xa130f0) { // sram access register
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675 elprintf(EL_SRAMIO, "sram reg=%02x", d);
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676 Pico.m.sram_reg &= ~(SRR_MAPPED|SRR_READONLY);
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677 Pico.m.sram_reg |= (u8)(d & 3);
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680 PicoWrite16_32x(a, d);
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683 #endif // _ASM_MEMORY_C
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685 // VDP area (0xc00000 - 0xdfffff)
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686 // TODO: verify if lower byte goes to PSG on word writes
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687 u32 PicoRead8_vdp(u32 a)
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689 if ((a & 0x00f0) == 0x0000) {
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692 case 0x00: return PicoVideoRead8DataH();
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693 case 0x01: return PicoVideoRead8DataL();
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694 case 0x04: return PicoVideoRead8CtlH();
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695 case 0x05: return PicoVideoRead8CtlL();
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697 case 0x0c: return PicoVideoRead8HV_H();
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699 case 0x0d: return PicoVideoRead8HV_L();
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703 elprintf(EL_UIO|EL_ANOMALY, "68k bad read [%06x] @%06x", a, SekPc);
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707 static u32 PicoRead16_vdp(u32 a)
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709 if ((a & 0x00e0) == 0x0000)
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710 return PicoVideoRead(a);
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712 elprintf(EL_UIO|EL_ANOMALY, "68k bad read [%06x] @%06x", a, SekPc);
\r
716 static void PicoWrite8_vdp(u32 a, u32 d)
\r
718 if ((a & 0x00f9) == 0x0011) { // PSG Sound
\r
722 if ((a & 0x00e0) == 0x0000) {
\r
724 PicoVideoWrite(a, d | (d << 8));
\r
728 elprintf(EL_UIO|EL_ANOMALY, "68k bad write [%06x] %02x @%06x", a, d & 0xff, SekPc);
\r
731 static void PicoWrite16_vdp(u32 a, u32 d)
\r
733 if ((a & 0x00f9) == 0x0010) // PSG Sound
\r
735 if ((a & 0x00e0) == 0x0000) {
\r
736 PicoVideoWrite(a, d);
\r
740 elprintf(EL_UIO|EL_ANOMALY, "68k bad write [%06x] %04x @%06x", a, d & 0xffff, SekPc);
\r
743 // -----------------------------------------------------------------
\r
746 static void m68k_mem_setup(void);
\r
749 PICO_INTERNAL void PicoMemSetup(void)
\r
751 int mask, rs, sstart, a;
\r
753 // setup the memory map
\r
754 cpu68k_map_set(m68k_read8_map, 0x000000, 0xffffff, m68k_unmapped_read8, 1);
\r
755 cpu68k_map_set(m68k_read16_map, 0x000000, 0xffffff, m68k_unmapped_read16, 1);
\r
756 cpu68k_map_set(m68k_write8_map, 0x000000, 0xffffff, m68k_unmapped_write8, 1);
\r
757 cpu68k_map_set(m68k_write16_map, 0x000000, 0xffffff, m68k_unmapped_write16, 1);
\r
760 // align to bank size. We know ROM loader allocated enough for this
\r
761 mask = (1 << M68K_MEM_SHIFT) - 1;
\r
762 rs = (Pico.romsize + mask) & ~mask;
\r
763 cpu68k_map_set(m68k_read8_map, 0x000000, rs - 1, Pico.rom, 0);
\r
764 cpu68k_map_set(m68k_read16_map, 0x000000, rs - 1, Pico.rom, 0);
\r
766 // Common case of on-cart (save) RAM, usually at 0x200000-...
\r
767 if ((Pico.sv.flags & SRF_ENABLED) && Pico.sv.data != NULL) {
\r
768 sstart = Pico.sv.start;
\r
769 rs = Pico.sv.end - sstart;
\r
770 rs = (rs + mask) & ~mask;
\r
771 if (sstart + rs >= 0x1000000)
\r
772 rs = 0x1000000 - sstart;
\r
773 cpu68k_map_set(m68k_read8_map, sstart, sstart + rs - 1, PicoRead8_sram, 1);
\r
774 cpu68k_map_set(m68k_read16_map, sstart, sstart + rs - 1, PicoRead16_sram, 1);
\r
775 cpu68k_map_set(m68k_write8_map, sstart, sstart + rs - 1, PicoWrite8_sram, 1);
\r
776 cpu68k_map_set(m68k_write16_map, sstart, sstart + rs - 1, PicoWrite16_sram, 1);
\r
780 cpu68k_map_set(m68k_read8_map, 0xa00000, 0xa0ffff, PicoRead8_z80, 1);
\r
781 cpu68k_map_set(m68k_read16_map, 0xa00000, 0xa0ffff, PicoRead16_z80, 1);
\r
782 cpu68k_map_set(m68k_write8_map, 0xa00000, 0xa0ffff, PicoWrite8_z80, 1);
\r
783 cpu68k_map_set(m68k_write16_map, 0xa00000, 0xa0ffff, PicoWrite16_z80, 1);
\r
785 // IO/control region
\r
786 cpu68k_map_set(m68k_read8_map, 0xa10000, 0xa1ffff, PicoRead8_io, 1);
\r
787 cpu68k_map_set(m68k_read16_map, 0xa10000, 0xa1ffff, PicoRead16_io, 1);
\r
788 cpu68k_map_set(m68k_write8_map, 0xa10000, 0xa1ffff, PicoWrite8_io, 1);
\r
789 cpu68k_map_set(m68k_write16_map, 0xa10000, 0xa1ffff, PicoWrite16_io, 1);
\r
792 for (a = 0xc00000; a < 0xe00000; a += 0x010000) {
\r
793 if ((a & 0xe700e0) != 0xc00000)
\r
795 cpu68k_map_set(m68k_read8_map, a, a + 0xffff, PicoRead8_vdp, 1);
\r
796 cpu68k_map_set(m68k_read16_map, a, a + 0xffff, PicoRead16_vdp, 1);
\r
797 cpu68k_map_set(m68k_write8_map, a, a + 0xffff, PicoWrite8_vdp, 1);
\r
798 cpu68k_map_set(m68k_write16_map, a, a + 0xffff, PicoWrite16_vdp, 1);
\r
801 // RAM and it's mirrors
\r
802 for (a = 0xe00000; a < 0x1000000; a += 0x010000) {
\r
803 cpu68k_map_set(m68k_read8_map, a, a + 0xffff, PicoMem.ram, 0);
\r
804 cpu68k_map_set(m68k_read16_map, a, a + 0xffff, PicoMem.ram, 0);
\r
805 cpu68k_map_set(m68k_write8_map, a, a + 0xffff, PicoMem.ram, 0);
\r
806 cpu68k_map_set(m68k_write16_map, a, a + 0xffff, PicoMem.ram, 0);
\r
809 // Setup memory callbacks:
\r
811 PicoCpuCM68k.read8 = (void *)m68k_read8_map;
\r
812 PicoCpuCM68k.read16 = (void *)m68k_read16_map;
\r
813 PicoCpuCM68k.read32 = (void *)m68k_read16_map;
\r
814 PicoCpuCM68k.write8 = (void *)m68k_write8_map;
\r
815 PicoCpuCM68k.write16 = (void *)m68k_write16_map;
\r
816 PicoCpuCM68k.write32 = (void *)m68k_write16_map;
\r
817 PicoCpuCM68k.checkpc = NULL; /* unused */
\r
818 PicoCpuCM68k.fetch8 = NULL;
\r
819 PicoCpuCM68k.fetch16 = NULL;
\r
820 PicoCpuCM68k.fetch32 = NULL;
\r
823 PicoCpuFM68k.read_byte = m68k_read8;
\r
824 PicoCpuFM68k.read_word = m68k_read16;
\r
825 PicoCpuFM68k.read_long = m68k_read32;
\r
826 PicoCpuFM68k.write_byte = m68k_write8;
\r
827 PicoCpuFM68k.write_word = m68k_write16;
\r
828 PicoCpuFM68k.write_long = m68k_write32;
\r
830 // setup FAME fetchmap
\r
833 // by default, point everything to first 64k of ROM
\r
834 for (i = 0; i < M68K_FETCHBANK1 * 0xe0 / 0x100; i++)
\r
835 PicoCpuFM68k.Fetch[i] = (uptr)Pico.rom - (i<<(24-FAMEC_FETCHBITS));
\r
837 for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)
\r
838 PicoCpuFM68k.Fetch[i] = (uptr)Pico.rom;
\r
850 unsigned int (*pm68k_read_memory_8) (unsigned int address) = NULL;
\r
851 unsigned int (*pm68k_read_memory_16)(unsigned int address) = NULL;
\r
852 unsigned int (*pm68k_read_memory_32)(unsigned int address) = NULL;
\r
853 void (*pm68k_write_memory_8) (unsigned int address, unsigned char value) = NULL;
\r
854 void (*pm68k_write_memory_16)(unsigned int address, unsigned short value) = NULL;
\r
855 void (*pm68k_write_memory_32)(unsigned int address, unsigned int value) = NULL;
\r
857 /* it appears that Musashi doesn't always mask the unused bits */
\r
858 unsigned int m68k_read_memory_8 (unsigned int address) { return pm68k_read_memory_8 (address) & 0xff; }
\r
859 unsigned int m68k_read_memory_16(unsigned int address) { return pm68k_read_memory_16(address) & 0xffff; }
\r
860 unsigned int m68k_read_memory_32(unsigned int address) { return pm68k_read_memory_32(address); }
\r
861 void m68k_write_memory_8 (unsigned int address, unsigned int value) { pm68k_write_memory_8 (address, (u8)value); }
\r
862 void m68k_write_memory_16(unsigned int address, unsigned int value) { pm68k_write_memory_16(address,(u16)value); }
\r
863 void m68k_write_memory_32(unsigned int address, unsigned int value) { pm68k_write_memory_32(address, value); }
\r
865 static void m68k_mem_setup(void)
\r
867 pm68k_read_memory_8 = m68k_read8;
\r
868 pm68k_read_memory_16 = m68k_read16;
\r
869 pm68k_read_memory_32 = m68k_read32;
\r
870 pm68k_write_memory_8 = m68k_write8;
\r
871 pm68k_write_memory_16 = m68k_write16;
\r
872 pm68k_write_memory_32 = m68k_write32;
\r
877 // -----------------------------------------------------------------
\r
879 static int get_scanline(int is_from_z80)
\r
882 int mclk_z80 = z80_cyclesDone() * 15;
\r
883 int mclk_line = Pico.t.z80_scanline * 488 * 7;
\r
884 while (mclk_z80 - mclk_line >= 488 * 7)
\r
885 Pico.t.z80_scanline++, mclk_line += 488 * 7;
\r
886 return Pico.t.z80_scanline;
\r
889 return Pico.m.scanline;
\r
892 /* probably should not be in this file, but it's near related code here */
\r
893 void ym2612_sync_timers(int z80_cycles, int mode_old, int mode_new)
\r
895 int xcycles = z80_cycles << 8;
\r
897 /* check for overflows */
\r
898 if ((mode_old & 4) && xcycles > Pico.t.timer_a_next_oflow)
\r
899 ym2612.OPN.ST.status |= 1;
\r
901 if ((mode_old & 8) && xcycles > Pico.t.timer_b_next_oflow)
\r
902 ym2612.OPN.ST.status |= 2;
\r
904 /* update timer a */
\r
906 while (xcycles > Pico.t.timer_a_next_oflow)
\r
907 Pico.t.timer_a_next_oflow += Pico.t.timer_a_step;
\r
909 if ((mode_old ^ mode_new) & 1) // turning on/off
\r
912 Pico.t.timer_a_next_oflow = TIMER_NO_OFLOW;
\r
914 Pico.t.timer_a_next_oflow = xcycles + Pico.t.timer_a_step;
\r
917 elprintf(EL_YMTIMER, "timer a upd to %i @ %i", Pico.t.timer_a_next_oflow>>8, z80_cycles);
\r
919 /* update timer b */
\r
921 while (xcycles > Pico.t.timer_b_next_oflow)
\r
922 Pico.t.timer_b_next_oflow += Pico.t.timer_b_step;
\r
924 if ((mode_old ^ mode_new) & 2)
\r
927 Pico.t.timer_b_next_oflow = TIMER_NO_OFLOW;
\r
929 Pico.t.timer_b_next_oflow = xcycles + Pico.t.timer_b_step;
\r
932 elprintf(EL_YMTIMER, "timer b upd to %i @ %i", Pico.t.timer_b_next_oflow>>8, z80_cycles);
\r
935 // ym2612 DAC and timer I/O handlers for z80
\r
936 static int ym2612_write_local(u32 a, u32 d, int is_from_z80)
\r
941 if (a == 1 && ym2612.OPN.ST.address == 0x2a) /* DAC data */
\r
943 int scanline = get_scanline(is_from_z80);
\r
944 //elprintf(EL_STATUS, "%03i -> %03i dac w %08x z80 %i", Pico.snd.dac_line, scanline, d, is_from_z80);
\r
945 ym2612.dacout = ((int)d - 0x80) << 6;
\r
947 PsndDoDAC(scanline);
\r
953 case 0: /* address port 0 */
\r
954 ym2612.OPN.ST.address = d;
\r
955 ym2612.addr_A1 = 0;
\r
957 if (PicoIn.opt & POPT_EXT_FM) YM2612Write_940(a, d, -1);
\r
961 case 1: /* data port 0 */
\r
962 if (ym2612.addr_A1 != 0)
\r
965 addr = ym2612.OPN.ST.address;
\r
966 ym2612.REGS[addr] = d;
\r
970 case 0x24: // timer A High 8
\r
971 case 0x25: { // timer A Low 2
\r
972 int TAnew = (addr == 0x24) ? ((ym2612.OPN.ST.TA & 0x03)|(((int)d)<<2))
\r
973 : ((ym2612.OPN.ST.TA & 0x3fc)|(d&3));
\r
974 if (ym2612.OPN.ST.TA != TAnew)
\r
976 //elprintf(EL_STATUS, "timer a set %i", TAnew);
\r
977 ym2612.OPN.ST.TA = TAnew;
\r
978 //ym2612.OPN.ST.TAC = (1024-TAnew)*18;
\r
979 //ym2612.OPN.ST.TAT = 0;
\r
980 Pico.t.timer_a_step = TIMER_A_TICK_ZCYCLES * (1024 - TAnew);
\r
981 if (ym2612.OPN.ST.mode & 1) {
\r
982 // this is not right, should really be done on overflow only
\r
983 int cycles = is_from_z80 ? z80_cyclesDone() : z80_cycles_from_68k();
\r
984 Pico.t.timer_a_next_oflow = (cycles << 8) + Pico.t.timer_a_step;
\r
986 elprintf(EL_YMTIMER, "timer a set to %i, %i", 1024 - TAnew, Pico.t.timer_a_next_oflow>>8);
\r
990 case 0x26: // timer B
\r
991 if (ym2612.OPN.ST.TB != d) {
\r
992 //elprintf(EL_STATUS, "timer b set %i", d);
\r
993 ym2612.OPN.ST.TB = d;
\r
994 //ym2612.OPN.ST.TBC = (256-d) * 288;
\r
995 //ym2612.OPN.ST.TBT = 0;
\r
996 Pico.t.timer_b_step = TIMER_B_TICK_ZCYCLES * (256 - d); // 262800
\r
997 if (ym2612.OPN.ST.mode & 2) {
\r
998 int cycles = is_from_z80 ? z80_cyclesDone() : z80_cycles_from_68k();
\r
999 Pico.t.timer_b_next_oflow = (cycles << 8) + Pico.t.timer_b_step;
\r
1001 elprintf(EL_YMTIMER, "timer b set to %i, %i", 256 - d, Pico.t.timer_b_next_oflow>>8);
\r
1004 case 0x27: { /* mode, timer control */
\r
1005 int old_mode = ym2612.OPN.ST.mode;
\r
1006 int cycles = is_from_z80 ? z80_cyclesDone() : z80_cycles_from_68k();
\r
1007 ym2612.OPN.ST.mode = d;
\r
1009 elprintf(EL_YMTIMER, "st mode %02x", d);
\r
1010 ym2612_sync_timers(cycles, old_mode, d);
\r
1012 /* reset Timer a flag */
\r
1014 ym2612.OPN.ST.status &= ~1;
\r
1016 /* reset Timer b flag */
\r
1018 ym2612.OPN.ST.status &= ~2;
\r
1020 if ((d ^ old_mode) & 0xc0) {
\r
1022 if (PicoIn.opt & POPT_EXT_FM) return YM2612Write_940(a, d, get_scanline(is_from_z80));
\r
1028 case 0x2b: { /* DAC Sel (YM2612) */
\r
1029 int scanline = get_scanline(is_from_z80);
\r
1030 if (ym2612.dacen != (d & 0x80)) {
\r
1031 ym2612.dacen = d & 0x80;
\r
1032 Pico.snd.dac_line = scanline;
\r
1035 if (PicoIn.opt & POPT_EXT_FM) YM2612Write_940(a, d, scanline);
\r
1042 case 2: /* address port 1 */
\r
1043 ym2612.OPN.ST.address = d;
\r
1044 ym2612.addr_A1 = 1;
\r
1046 if (PicoIn.opt & POPT_EXT_FM) YM2612Write_940(a, d, -1);
\r
1050 case 3: /* data port 1 */
\r
1051 if (ym2612.addr_A1 != 1)
\r
1054 addr = ym2612.OPN.ST.address | 0x100;
\r
1055 ym2612.REGS[addr] = d;
\r
1060 if (PicoIn.opt & POPT_EXT_FM)
\r
1061 return YM2612Write_940(a, d, get_scanline(is_from_z80));
\r
1063 return YM2612Write_(a, d);
\r
1067 #define ym2612_read_local() \
\r
1068 if (xcycles >= Pico.t.timer_a_next_oflow) \
\r
1069 ym2612.OPN.ST.status |= (ym2612.OPN.ST.mode >> 2) & 1; \
\r
1070 if (xcycles >= Pico.t.timer_b_next_oflow) \
\r
1071 ym2612.OPN.ST.status |= (ym2612.OPN.ST.mode >> 2) & 2
\r
1073 static u32 ym2612_read_local_z80(void)
\r
1075 int xcycles = z80_cyclesDone() << 8;
\r
1077 ym2612_read_local();
\r
1079 elprintf(EL_YMTIMER, "timer z80 read %i, sched %i, %i @ %i|%i",
\r
1080 ym2612.OPN.ST.status, Pico.t.timer_a_next_oflow >> 8,
\r
1081 Pico.t.timer_b_next_oflow >> 8, xcycles >> 8, (xcycles >> 8) / 228);
\r
1082 return ym2612.OPN.ST.status;
\r
1085 static u32 ym2612_read_local_68k(void)
\r
1087 int xcycles = z80_cycles_from_68k() << 8;
\r
1089 ym2612_read_local();
\r
1091 elprintf(EL_YMTIMER, "timer 68k read %i, sched %i, %i @ %i|%i",
\r
1092 ym2612.OPN.ST.status, Pico.t.timer_a_next_oflow >> 8,
\r
1093 Pico.t.timer_b_next_oflow >> 8, xcycles >> 8, (xcycles >> 8) / 228);
\r
1094 return ym2612.OPN.ST.status;
\r
1097 void ym2612_pack_state(void)
\r
1099 // timers are saved as tick counts, in 16.16 int format
\r
1100 int tac, tat = 0, tbc, tbt = 0;
\r
1101 tac = 1024 - ym2612.OPN.ST.TA;
\r
1102 tbc = 256 - ym2612.OPN.ST.TB;
\r
1103 if (Pico.t.timer_a_next_oflow != TIMER_NO_OFLOW)
\r
1104 tat = (int)((double)(Pico.t.timer_a_step - Pico.t.timer_a_next_oflow)
\r
1105 / (double)Pico.t.timer_a_step * tac * 65536);
\r
1106 if (Pico.t.timer_b_next_oflow != TIMER_NO_OFLOW)
\r
1107 tbt = (int)((double)(Pico.t.timer_b_step - Pico.t.timer_b_next_oflow)
\r
1108 / (double)Pico.t.timer_b_step * tbc * 65536);
\r
1109 elprintf(EL_YMTIMER, "save: timer a %i/%i", tat >> 16, tac);
\r
1110 elprintf(EL_YMTIMER, "save: timer b %i/%i", tbt >> 16, tbc);
\r
1113 if (PicoIn.opt & POPT_EXT_FM)
\r
1114 YM2612PicoStateSave2_940(tat, tbt);
\r
1117 YM2612PicoStateSave2(tat, tbt);
\r
1120 void ym2612_unpack_state(void)
\r
1122 int i, ret, tac, tat, tbc, tbt;
\r
1123 YM2612PicoStateLoad();
\r
1125 // feed all the registers and update internal state
\r
1126 for (i = 0x20; i < 0xA0; i++) {
\r
1127 ym2612_write_local(0, i, 0);
\r
1128 ym2612_write_local(1, ym2612.REGS[i], 0);
\r
1130 for (i = 0x30; i < 0xA0; i++) {
\r
1131 ym2612_write_local(2, i, 0);
\r
1132 ym2612_write_local(3, ym2612.REGS[i|0x100], 0);
\r
1134 for (i = 0xAF; i >= 0xA0; i--) { // must apply backwards
\r
1135 ym2612_write_local(2, i, 0);
\r
1136 ym2612_write_local(3, ym2612.REGS[i|0x100], 0);
\r
1137 ym2612_write_local(0, i, 0);
\r
1138 ym2612_write_local(1, ym2612.REGS[i], 0);
\r
1140 for (i = 0xB0; i < 0xB8; i++) {
\r
1141 ym2612_write_local(0, i, 0);
\r
1142 ym2612_write_local(1, ym2612.REGS[i], 0);
\r
1143 ym2612_write_local(2, i, 0);
\r
1144 ym2612_write_local(3, ym2612.REGS[i|0x100], 0);
\r
1148 if (PicoIn.opt & POPT_EXT_FM)
\r
1149 ret = YM2612PicoStateLoad2_940(&tat, &tbt);
\r
1152 ret = YM2612PicoStateLoad2(&tat, &tbt);
\r
1154 elprintf(EL_STATUS, "old ym2612 state");
\r
1155 return; // no saved timers
\r
1158 tac = (1024 - ym2612.OPN.ST.TA) << 16;
\r
1159 tbc = (256 - ym2612.OPN.ST.TB) << 16;
\r
1160 if (ym2612.OPN.ST.mode & 1)
\r
1161 Pico.t.timer_a_next_oflow = (int)((double)(tac - tat) / (double)tac * Pico.t.timer_a_step);
\r
1163 Pico.t.timer_a_next_oflow = TIMER_NO_OFLOW;
\r
1164 if (ym2612.OPN.ST.mode & 2)
\r
1165 Pico.t.timer_b_next_oflow = (int)((double)(tbc - tbt) / (double)tbc * Pico.t.timer_b_step);
\r
1167 Pico.t.timer_b_next_oflow = TIMER_NO_OFLOW;
\r
1168 elprintf(EL_YMTIMER, "load: %i/%i, timer_a_next_oflow %i", tat>>16, tac>>16, Pico.t.timer_a_next_oflow >> 8);
\r
1169 elprintf(EL_YMTIMER, "load: %i/%i, timer_b_next_oflow %i", tbt>>16, tbc>>16, Pico.t.timer_b_next_oflow >> 8);
\r
1172 #if defined(NO_32X) && defined(_ASM_MEMORY_C)
\r
1173 // referenced by asm code
\r
1174 u32 PicoRead8_32x(u32 a) { return 0; }
\r
1175 u32 PicoRead16_32x(u32 a) { return 0; }
\r
1176 void PicoWrite8_32x(u32 a, u32 d) {}
\r
1177 void PicoWrite16_32x(u32 a, u32 d) {}
\r
1180 // -----------------------------------------------------------------
\r
1181 // z80 memhandlers
\r
1183 static unsigned char z80_md_vdp_read(unsigned short a)
\r
1187 if ((a & 0x00f0) == 0x0000) {
\r
1190 case 0x00: return PicoVideoRead8DataH();
\r
1191 case 0x01: return PicoVideoRead8DataL();
\r
1192 case 0x04: return PicoVideoRead8CtlH();
\r
1193 case 0x05: return PicoVideoRead8CtlL();
\r
1195 case 0x0c: return get_scanline(1); // FIXME: make it proper
\r
1197 case 0x0d: return Pico.m.rotate++;
\r
1201 elprintf(EL_ANOMALY, "z80 invalid r8 [%06x] %02x", a, 0xff);
\r
1205 static unsigned char z80_md_bank_read(unsigned short a)
\r
1207 unsigned int addr68k;
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1208 unsigned char ret;
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1212 addr68k = Pico.m.z80_bank68k << 15;
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1213 addr68k |= a & 0x7fff;
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1215 ret = m68k_read8(addr68k);
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1217 elprintf(EL_Z80BNK, "z80->68k r8 [%06x] %02x", addr68k, ret);
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1221 static void z80_md_ym2612_write(unsigned int a, unsigned char data)
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1223 if (PicoIn.opt & POPT_EN_FM)
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1224 Pico.m.status |= ym2612_write_local(a, data, 1) & 1;
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1227 static void z80_md_vdp_br_write(unsigned int a, unsigned char data)
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1229 if ((a&0xfff9) == 0x7f11) // 7f11 7f13 7f15 7f17
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1231 psg_write_z80(data);
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1234 // at least VDP data writes hang my machine
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1236 if ((a>>8) == 0x60)
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1238 Pico.m.z80_bank68k >>= 1;
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1239 Pico.m.z80_bank68k |= data << 8;
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1240 Pico.m.z80_bank68k &= 0x1ff; // 9 bits and filled in the new top one
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1244 elprintf(EL_ANOMALY, "z80 invalid w8 [%06x] %02x", a, data);
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1247 static void z80_md_bank_write(unsigned int a, unsigned char data)
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1249 unsigned int addr68k;
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1251 addr68k = Pico.m.z80_bank68k << 15;
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1252 addr68k += a & 0x7fff;
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1254 elprintf(EL_Z80BNK, "z80->68k w8 [%06x] %02x", addr68k, data);
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1255 m68k_write8(addr68k, data);
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1258 // -----------------------------------------------------------------
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1260 static unsigned char z80_md_in(unsigned short p)
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1262 elprintf(EL_ANOMALY, "Z80 port %04x read", p);
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1266 static void z80_md_out(unsigned short p, unsigned char d)
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1268 elprintf(EL_ANOMALY, "Z80 port %04x write %02x", p, d);
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1271 static void z80_mem_setup(void)
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1273 z80_map_set(z80_read_map, 0x0000, 0x1fff, PicoMem.zram, 0);
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1274 z80_map_set(z80_read_map, 0x2000, 0x3fff, PicoMem.zram, 0);
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1275 z80_map_set(z80_read_map, 0x4000, 0x5fff, ym2612_read_local_z80, 1);
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1276 z80_map_set(z80_read_map, 0x6000, 0x7fff, z80_md_vdp_read, 1);
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1277 z80_map_set(z80_read_map, 0x8000, 0xffff, z80_md_bank_read, 1);
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1279 z80_map_set(z80_write_map, 0x0000, 0x1fff, PicoMem.zram, 0);
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1280 z80_map_set(z80_write_map, 0x2000, 0x3fff, PicoMem.zram, 0);
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1281 z80_map_set(z80_write_map, 0x4000, 0x5fff, z80_md_ym2612_write, 1);
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1282 z80_map_set(z80_write_map, 0x6000, 0x7fff, z80_md_vdp_br_write, 1);
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1283 z80_map_set(z80_write_map, 0x8000, 0xffff, z80_md_bank_write, 1);
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1286 drZ80.z80_in = z80_md_in;
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1287 drZ80.z80_out = z80_md_out;
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1290 Cz80_Set_Fetch(&CZ80, 0x0000, 0x1fff, (FPTR)PicoMem.zram); // main RAM
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1291 Cz80_Set_Fetch(&CZ80, 0x2000, 0x3fff, (FPTR)PicoMem.zram); // mirror
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1292 Cz80_Set_INPort(&CZ80, z80_md_in);
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1293 Cz80_Set_OUTPort(&CZ80, z80_md_out);
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1297 // vim:shiftwidth=2:ts=2:expandtab
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