1 #include "../pico_int.h"
2 #include "../sound/ym2612.h"
4 struct Pico32x Pico32x;
6 static void sh2_irq_cb(int id, int level)
9 elprintf(EL_32X, "%csh2 ack %d @ %08x", id ? 's' : 'm', level, sh2_pc(id));
12 void p32x_update_irls(void)
14 int irqs, mlvl = 0, slvl = 0;
17 irqs = (Pico32x.sh2irqs | Pico32x.sh2irqi[0]) & ((Pico32x.sh2irq_mask[0] << 3) | P32XI_VRES);
23 irqs = (Pico32x.sh2irqs | Pico32x.sh2irqi[1]) & ((Pico32x.sh2irq_mask[1] << 3) | P32XI_VRES);
28 elprintf(EL_32X, "update_irls: m %d, s %d", mlvl, slvl);
29 sh2_irl_irq(&msh2, mlvl);
30 sh2_irl_irq(&ssh2, slvl);
33 p32x_poll_event(mlvl | (slvl << 1), 0);
36 void Pico32xStartup(void)
38 elprintf(EL_STATUS|EL_32X, "32X startup");
44 msh2.irq_callback = sh2_irq_cb;
48 ssh2.irq_callback = sh2_irq_cb;
52 Pico32x.vdp_regs[0] |= P32XV_nPAL;
57 void Pico32xInit(void)
61 void PicoPower32x(void)
63 memset(&Pico32x, 0, sizeof(Pico32x));
65 Pico32x.regs[0] = 0x0082; // SH2 reset?
66 Pico32x.vdp_regs[0x0a/2] = P32XV_VBLK|P32XV_HBLK|P32XV_PEN;
67 Pico32x.sh2_regs[0] = P32XS2_ADEN;
70 void PicoUnload32x(void)
72 if (Pico32xMem != NULL)
79 void PicoReset32x(void)
81 extern int p32x_csum_faked;
82 p32x_csum_faked = 0; // tmp
85 static void p32x_start_blank(void)
88 Pico32x.vdp_regs[0x0a/2] |= P32XV_VBLK|P32XV_PEN;
90 // FB swap waits until vblank
91 if ((Pico32x.vdp_regs[0x0a/2] ^ Pico32x.pending_fb) & P32XV_FS) {
92 Pico32x.vdp_regs[0x0a/2] &= ~P32XV_FS;
93 Pico32x.vdp_regs[0x0a/2] |= Pico32x.pending_fb;
94 Pico32xSwapDRAM(Pico32x.pending_fb ^ 1);
97 Pico32x.sh2irqs |= P32XI_VINT;
99 p32x_poll_event(3, 1);
102 static __inline void run_m68k(int cyc)
104 if (Pico32x.emu_flags & P32XF_68KPOLL) {
108 #if defined(EMU_C68K)
109 PicoCpuCM68k.cycles = cyc;
110 CycloneRun(&PicoCpuCM68k);
111 SekCycleCnt += cyc - PicoCpuCM68k.cycles;
112 #elif defined(EMU_M68K)
113 SekCycleCnt += m68k_execute(cyc);
114 #elif defined(EMU_F68K)
115 SekCycleCnt += fm68k_emulate(cyc+1, 0, 0);
119 // ~1463.8, but due to cache misses and slow mem
120 // it's much lower than that
121 //#define SH2_LINE_CYCLES 735
122 #define CYCLES_M68K2SH2(x) ((x) * 6 / 4)
125 #define CPUS_RUN_SIMPLE(m68k_cycles,s68k_cycles) \
128 SekCycleAim += m68k_cycles; \
129 while (SekCycleCnt < SekCycleAim) { \
130 slice = SekCycleCnt; \
131 run_m68k(SekCycleAim - SekCycleCnt); \
132 slice = SekCycleCnt - slice; /* real count from 68k */ \
133 if (SekCycleCnt < SekCycleAim) \
134 elprintf(EL_32X, "slice %d", slice); \
135 if (!(Pico32x.emu_flags & (P32XF_SSH2POLL|P32XF_SSH2VPOLL))) \
136 sh2_execute(&ssh2, CYCLES_M68K2SH2(slice)); \
137 if (!(Pico32x.emu_flags & (P32XF_MSH2POLL|P32XF_MSH2VPOLL))) \
138 sh2_execute(&msh2, CYCLES_M68K2SH2(slice)); \
143 #define CPUS_RUN_LOCKSTEP(m68k_cycles,s68k_cycles) \
146 for (i = 0; i <= (m68k_cycles) - STEP_68K; i += STEP_68K) { \
147 run_m68k(STEP_68K); \
148 if (!(Pico32x.emu_flags & (P32XF_MSH2POLL|P32XF_MSH2VPOLL))) \
149 sh2_execute(&msh2, CYCLES_M68K2SH2(STEP_68K)); \
150 if (!(Pico32x.emu_flags & (P32XF_SSH2POLL|P32XF_SSH2VPOLL))) \
151 sh2_execute(&ssh2, CYCLES_M68K2SH2(STEP_68K)); \
154 i = (m68k_cycles) - i; \
156 if (!(Pico32x.emu_flags & (P32XF_MSH2POLL|P32XF_MSH2VPOLL))) \
157 sh2_execute(&msh2, CYCLES_M68K2SH2(i)); \
158 if (!(Pico32x.emu_flags & (P32XF_SSH2POLL|P32XF_SSH2VPOLL))) \
159 sh2_execute(&ssh2, CYCLES_M68K2SH2(i)); \
162 #define CPUS_RUN CPUS_RUN_SIMPLE
163 //#define CPUS_RUN CPUS_RUN_LOCKSTEP
165 #include "../pico_cmn.c"
167 void PicoFrame32x(void)
169 pwm_frame_smp_cnt = 0;
171 Pico32x.vdp_regs[0x0a/2] &= ~P32XV_VBLK; // get out of vblank
172 if ((Pico32x.vdp_regs[0] & P32XV_Mx) != 0) // no forced blanking
173 Pico32x.vdp_regs[0x0a/2] &= ~P32XV_PEN; // no palette access
175 p32x_poll_event(3, 1);
179 elprintf(EL_32X, "poll: %02x", Pico32x.emu_flags);