1 #include "../pico_int.h"
4 static const char str_mars[] = "MARS";
6 struct Pico32xMem *Pico32xMem;
8 static void bank_switch(int b);
10 #define MSB8(x) ((x) >> 8)
13 #define POLL_THRESHOLD 6
16 int addr, pc, cnt, flag;
18 static struct poll_det m68k_poll, sh2_poll[2];
20 static int p32x_poll_detect(struct poll_det *pd, u32 a, u32 pc, int is_vdp)
22 int ret = 0, flag = pd->flag;
27 if (a - 2 <= pd->addr && pd->addr <= a + 2 && pd->pc == pc) {
29 if (pd->cnt > POLL_THRESHOLD) {
30 if (!(Pico32x.emu_flags & flag)) {
31 elprintf(EL_32X, "%s poll addr %08x @ %06x",
32 flag == P32XF_68KPOLL ? "m68k" : (flag == P32XF_MSH2POLL ? "msh2" : "ssh2"), a, pc);
35 Pico32x.emu_flags |= flag;
46 static int p32x_poll_undetect(struct poll_det *pd, int is_vdp)
48 int ret = 0, flag = pd->flag;
51 if (pd->cnt > POLL_THRESHOLD)
53 pd->addr = pd->cnt = 0;
54 Pico32x.emu_flags &= ~flag;
58 void p32x_poll_event(int is_vdp)
60 p32x_poll_undetect(&sh2_poll[0], is_vdp);
61 p32x_poll_undetect(&sh2_poll[1], is_vdp);
68 static const u16 comm_fakevals[] = {
69 0x4d5f, 0x4f4b, // M_OK
70 0x535f, 0x4f4b, // S_OK
71 0x4D41, 0x5346, // MASF - Brutal Unleashed
72 0x5331, 0x4d31, // Darxide
75 0x0000, 0x0000, // eq for doom
76 0x0002, // Mortal Kombat
80 static u32 sh2_comm_faker(u32 a)
83 if (a == 0x28 && !p32x_csum_faked) {
85 return *(unsigned short *)(Pico.rom + 0x18e);
87 if (f >= sizeof(comm_fakevals) / sizeof(comm_fakevals[0]))
89 return comm_fakevals[f++];
95 unsigned int sar0, dar0, tcr0; // src addr, dst addr, transfer count
96 unsigned int chcr0; // chan ctl
97 unsigned int sar1, dar1, tcr1; // same for chan 1
103 static void dma_68k2sh2_do(void)
105 unsigned short *dreqlen = &Pico32x.regs[0x10 / 2];
108 if (dmac0->tcr0 != *dreqlen)
109 elprintf(EL_32X|EL_ANOMALY, "tcr0 and dreq len differ: %d != %d", dmac0->tcr0, *dreqlen);
111 for (i = 0; i < Pico32x.dmac_ptr && dmac0->tcr0 > 0; i++) {
112 extern void p32x_sh2_write16(u32 a, u32 d, int id);
113 elprintf(EL_32X|EL_ANOMALY, "dmaw [%08x] %04x, left %d", dmac0->dar0, Pico32x.dmac_fifo[i], *dreqlen);
114 p32x_sh2_write16(dmac0->dar0, Pico32x.dmac_fifo[i], 0);
120 Pico32x.dmac_ptr = 0; // HACK
121 Pico32x.regs[6 / 2] &= ~P32XS_FULL;
123 Pico32x.regs[6 / 2] &= ~P32XS_68S; // transfer complete
124 if (dmac0->tcr0 == 0)
125 dmac0->chcr0 |= 2; // DMA has ended normally
126 p32x_poll_undetect(&m68k_poll, 0);
129 // ------------------------------------------------------------------
132 static u32 p32x_reg_read16(u32 a)
137 if ((a & 0x30) == 0x20)
138 return sh2_comm_faker(a);
140 if (p32x_poll_detect(&m68k_poll, a, SekPc, 0)) {
145 // fake only slave for now
146 if (a == 0x24 || a == 0x26)
147 return sh2_comm_faker(a);
150 return Pico32x.regs[a / 2];
153 static void p32x_reg_write8(u32 a, u32 d)
155 u16 *r = Pico32x.regs;
158 if (a == 1 && !(r[0] & 1)) {
168 case 0: // adapter ctl
169 r[0] = (r[0] & 0x83) | ((d << 8) & P32XS_FM);
172 if ((d & 1) && !(Pico32x.sh2irqi[0] & P32XI_CMD)) {
173 Pico32x.sh2irqi[0] |= P32XI_CMD;
176 if ((d & 2) && !(Pico32x.sh2irqi[1] & P32XI_CMD)) {
177 Pico32x.sh2irqi[1] |= P32XI_CMD;
189 r[6 / 2] = (r[6 / 2] & P32XS_FULL) | (d & (P32XS_68S|P32XS_RV));
194 static void p32x_reg_write16(u32 a, u32 d)
196 u16 *r = Pico32x.regs;
199 // for write loops with FIFO checks..
203 case 0x00: // adapter ctl
204 r[0] = (r[0] & 0x83) | (d & P32XS_FM);
206 case 0x10: // DREQ len
209 case 0x12: // FIFO reg
210 if (!(r[6 / 2] & P32XS_68S)) {
211 elprintf(EL_32X|EL_ANOMALY, "DREQ FIFO w16 without 68S?");
214 if (Pico32x.dmac_ptr < DMAC_FIFO_LEN) {
215 Pico32x.dmac_fifo[Pico32x.dmac_ptr++] = d;
216 if ((Pico32x.dmac_ptr & 3) == 0 && (dmac0->chcr0 & 3) == 1 && (dmac0->dmaor & 1))
218 if (Pico32x.dmac_ptr == DMAC_FIFO_LEN)
219 r[6 / 2] |= P32XS_FULL;
225 if ((a & 0x38) == 0x08) {
230 else if ((a & 0x30) == 0x20 && r[a / 2] != d) {
232 if (p32x_poll_undetect(&sh2_poll[0], 0) || p32x_poll_undetect(&sh2_poll[1], 0))
233 // if some SH2 is busy waiting, it needs to see the result ASAP
238 p32x_reg_write8(a + 1, d);
241 // ------------------------------------------------------------------
243 static u32 p32x_vdp_read16(u32 a)
247 return Pico32x.vdp_regs[a / 2];
250 static void p32x_vdp_write8(u32 a, u32 d)
252 u16 *r = Pico32x.vdp_regs;
255 // for FEN checks between writes
258 // TODO: verify what's writeable
261 // priority inversion is handled in palette
262 if ((r[0] ^ d) & P32XV_PRI)
263 Pico32x.dirty_pal = 1;
264 r[0] = (r[0] & P32XV_nPAL) | (d & 0xff);
268 Pico32x.pending_fb = d;
269 // if we are blanking and FS bit is changing
270 if (((r[0x0a/2] & P32XV_VBLK) || (r[0] & P32XV_Mx) == 0) && ((r[0x0a/2] ^ d) & P32XV_FS)) {
272 Pico32xSwapDRAM(d ^ 1);
273 elprintf(EL_32X, "VDP FS: %d", r[0x0a/2] & P32XV_FS);
279 static void p32x_vdp_write16(u32 a, u32 d)
281 p32x_vdp_write8(a | 1, d);
284 // ------------------------------------------------------------------
287 static u32 p32x_sh2reg_read16(u32 a, int cpuid)
289 u16 *r = Pico32x.regs;
293 case 0x00: // adapter/irq ctl
294 return (r[0] & P32XS_FM) | P32XS2_ADEN | Pico32x.sh2irq_mask[cpuid];
295 case 0x10: // DREQ len
299 // DREQ src, dst; comm port
300 if ((a & 0x38) == 0x08 || (a & 0x30) == 0x20)
306 static void p32x_sh2reg_write8(u32 a, u32 d, int cpuid)
310 Pico32x.sh2irq_mask[cpuid] = d & 0x0f;
315 static void p32x_sh2reg_write16(u32 a, u32 d, int cpuid)
319 if ((a & 0x30) == 0x20 && Pico32x.regs[a/2] != d) {
320 Pico32x.regs[a / 2] = d;
321 p32x_poll_undetect(&m68k_poll, 0);
322 p32x_poll_undetect(&sh2_poll[cpuid ^ 1], 0);
327 case 0x14: Pico32x.sh2irqs &= ~P32XI_VRES; goto irls;
328 case 0x16: Pico32x.sh2irqs &= ~P32XI_VINT; goto irls;
329 case 0x18: Pico32x.sh2irqs &= ~P32XI_HINT; goto irls;
330 case 0x1a: Pico32x.sh2irqi[cpuid] &= ~P32XI_CMD; goto irls;
331 case 0x1c: Pico32x.sh2irqs &= ~P32XI_PWM; goto irls;
334 p32x_sh2reg_write8(a | 1, d, cpuid);
341 static u32 sh2_peripheral_read(u32 a, int id)
345 d = Pico32xMem->sh2_peri_regs[0][a / 4];
347 elprintf(EL_32X, "%csh2 peri r32 [%08x] %08x @%06x", id ? 's' : 'm', a, d, sh2_pc(id));
351 static void sh2_peripheral_write(u32 a, u32 d, int id)
353 unsigned int *r = Pico32xMem->sh2_peri_regs[0];
354 elprintf(EL_32X, "%csh2 peri w32 [%08x] %08x @%06x", id ? 's' : 'm', a, d, sh2_pc(id));
359 if ((a == 0x1b0 || a == 0x18c) && (dmac0->chcr0 & 3) == 1 && (dmac0->dmaor & 1)) {
360 elprintf(EL_32X, "sh2 DMA %08x -> %08x, cnt %d, chcr %04x @%06x",
361 dmac0->sar0, dmac0->dar0, dmac0->tcr0, dmac0->chcr0, sh2_pc(id));
362 dmac0->tcr0 &= 0xffffff;
363 // DREQ is only sent after first 4 words are written.
364 // we do multiple of 4 words to avoid messing up alignment
365 if (dmac0->sar0 == 0x20004012 && Pico32x.dmac_ptr && (Pico32x.dmac_ptr & 3) == 0) {
366 elprintf(EL_32X, "68k -> sh2 DMA");
372 // ------------------------------------------------------------------
373 // default 32x handlers
374 u32 PicoRead8_32x(u32 a)
377 if ((a & 0xffc0) == 0x5100) { // a15100
378 d = p32x_reg_read16(a);
382 if (!(Pico32x.regs[0] & 1))
385 if ((a & 0xfff0) == 0x5180) { // a15180
386 d = p32x_vdp_read16(a);
390 if ((a & 0xfe00) == 0x5200) { // a15200
391 d = Pico32xMem->pal[(a & 0x1ff) / 2];
396 if ((a & 0xfffc) == 0x30ec) { // a130ec
401 elprintf(EL_UIO, "m68k unmapped r8 [%06x] @%06x", a, SekPc);
411 elprintf(EL_32X, "m68k 32x r8 [%06x] %02x @%06x", a, d, SekPc);
415 u32 PicoRead16_32x(u32 a)
418 if ((a & 0xffc0) == 0x5100) { // a15100
419 d = p32x_reg_read16(a);
423 if (!(Pico32x.regs[0] & 1))
426 if ((a & 0xfff0) == 0x5180) { // a15180
427 d = p32x_vdp_read16(a);
431 if ((a & 0xfe00) == 0x5200) { // a15200
432 d = Pico32xMem->pal[(a & 0x1ff) / 2];
437 if ((a & 0xfffc) == 0x30ec) { // a130ec
438 d = !(a & 2) ? ('M'<<8)|'A' : ('R'<<8)|'S';
442 elprintf(EL_UIO, "m68k unmapped r16 [%06x] @%06x", a, SekPc);
446 elprintf(EL_32X, "m68k 32x r16 [%06x] %04x @%06x", a, d, SekPc);
450 void PicoWrite8_32x(u32 a, u32 d)
452 if ((a & 0xfc00) == 0x5000)
453 elprintf(EL_32X, "m68k 32x w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
455 if ((a & 0xffc0) == 0x5100) { // a15100
456 p32x_reg_write8(a, d);
460 if (!(Pico32x.regs[0] & 1))
463 if ((a & 0xfff0) == 0x5180) { // a15180
464 p32x_vdp_write8(a, d);
469 if ((a & 0xfe00) == 0x5200) { // a15200
470 elprintf(EL_32X|EL_ANOMALY, "m68k 32x PAL w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
471 ((u8 *)Pico32xMem->pal)[(a & 0x1ff) ^ 1] = d;
472 Pico32x.dirty_pal = 1;
477 elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
480 void PicoWrite16_32x(u32 a, u32 d)
482 if ((a & 0xfc00) == 0x5000)
483 elprintf(EL_UIO, "m68k 32x w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
485 if ((a & 0xffc0) == 0x5100) { // a15100
486 p32x_reg_write16(a, d);
490 if (!(Pico32x.regs[0] & 1))
493 if ((a & 0xfff0) == 0x5180) { // a15180
494 p32x_vdp_write16(a, d);
498 if ((a & 0xfe00) == 0x5200) { // a15200
499 Pico32xMem->pal[(a & 0x1ff) / 2] = d;
500 Pico32x.dirty_pal = 1;
505 elprintf(EL_UIO, "m68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
508 // hint vector is writeable
509 static void PicoWrite8_hint(u32 a, u32 d)
511 if ((a & 0xfffc) == 0x0070) {
512 Pico32xMem->m68k_rom[a ^ 1] = d;
516 elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
519 static void PicoWrite16_hint(u32 a, u32 d)
521 if ((a & 0xfffc) == 0x0070) {
522 ((u16 *)Pico32xMem->m68k_rom)[a/2] = d;
526 elprintf(EL_UIO, "m68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
529 void Pico32xSwapDRAM(int b)
531 cpu68k_map_set(m68k_read8_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0);
532 cpu68k_map_set(m68k_read16_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0);
533 cpu68k_map_set(m68k_write8_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0);
534 cpu68k_map_set(m68k_write16_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0);
537 static void bank_switch(int b)
539 unsigned int rs, bank;
542 if (bank >= Pico.romsize) {
543 elprintf(EL_32X|EL_ANOMALY, "missing bank @ %06x", bank);
547 // 32X ROM (unbanked, XXX: consider mirroring?)
548 rs = (Pico.romsize + M68K_BANK_MASK) & ~M68K_BANK_MASK;
552 cpu68k_map_set(m68k_read8_map, 0x900000, 0x900000 + rs - 1, Pico.rom + bank, 0);
553 cpu68k_map_set(m68k_read16_map, 0x900000, 0x900000 + rs - 1, Pico.rom + bank, 0);
555 elprintf(EL_32X, "bank %06x-%06x -> %06x", 0x900000, 0x900000 + rs - 1, bank);
558 // -----------------------------------------------------------------
560 // -----------------------------------------------------------------
562 u32 p32x_sh2_read8(u32 a, int id)
567 if (id == 0 && a < sizeof(Pico32xMem->sh2_rom_m))
568 return Pico32xMem->sh2_rom_m[a ^ 1];
569 if (id == 1 && a < sizeof(Pico32xMem->sh2_rom_s))
570 return Pico32xMem->sh2_rom_s[a ^ 1];
572 if ((a & 0x0ffc0000) == 0x06000000)
573 return Pico32xMem->sdram[(a & 0x3ffff) ^ 1];
575 if ((a & 0x0fc00000) == 0x02000000)
576 if ((a & 0x003fffff) < Pico.romsize)
577 return Pico.rom[(a & 0x3fffff) ^ 1];
579 if ((a & ~0xfff) == 0xc0000000)
580 return Pico32xMem->data_array[id][(a & 0xfff) ^ 1];
582 if ((a & 0x0fffff00) == 0x4000) {
583 d = p32x_sh2reg_read16(a, id);
587 if ((a & 0x0fffff00) == 0x4100) {
588 d = p32x_vdp_read16(a);
593 if ((a & 0x0fffff00) == 0x4200) {
594 d = Pico32xMem->pal[(a & 0x1ff) / 2];
598 elprintf(EL_UIO, "%csh2 unmapped r8 [%08x] %02x @%06x",
599 id ? 's' : 'm', a, d, sh2_pc(id));
603 if (p32x_poll_detect(&sh2_poll[id], a, sh2_pc(id), pd_vdp))
612 elprintf(EL_32X, "%csh2 r8 [%08x] %02x @%06x",
613 id ? 's' : 'm', a, d, sh2_pc(id));
617 u32 p32x_sh2_read16(u32 a, int id)
622 if (id == 0 && a < sizeof(Pico32xMem->sh2_rom_m))
623 return *(u16 *)(Pico32xMem->sh2_rom_m + a);
624 if (id == 1 && a < sizeof(Pico32xMem->sh2_rom_s))
625 return *(u16 *)(Pico32xMem->sh2_rom_s + a);
627 if ((a & 0x0ffc0000) == 0x06000000)
628 return ((u16 *)Pico32xMem->sdram)[(a & 0x3ffff) / 2];
630 if ((a & 0x0fc00000) == 0x02000000)
631 if ((a & 0x003fffff) < Pico.romsize)
632 return ((u16 *)Pico.rom)[(a & 0x3fffff) / 2];
634 if ((a & ~0xfff) == 0xc0000000)
635 return ((u16 *)Pico32xMem->data_array[id])[(a & 0xfff) / 2];
637 if ((a & 0x0fffff00) == 0x4000) {
638 d = p32x_sh2reg_read16(a, id);
642 if ((a & 0x0fffff00) == 0x4100) {
643 d = p32x_vdp_read16(a);
648 if ((a & 0x0fffff00) == 0x4200) {
649 d = Pico32xMem->pal[(a & 0x1ff) / 2];
653 elprintf(EL_UIO, "%csh2 unmapped r16 [%08x] %04x @%06x",
654 id ? 's' : 'm', a, d, sh2_pc(id));
658 if (p32x_poll_detect(&sh2_poll[id], a, sh2_pc(id), pd_vdp))
662 elprintf(EL_32X, "%csh2 r16 [%08x] %04x @%06x",
663 id ? 's' : 'm', a, d, sh2_pc(id));
667 u32 p32x_sh2_read32(u32 a, int id)
669 if ((a & 0xfffffe00) == 0xfffffe00)
670 return sh2_peripheral_read(a, id);
672 // elprintf(EL_UIO, "sh2 r32 [%08x] %08x @%06x", a, d, ash2_pc());
673 return (p32x_sh2_read16(a, id) << 16) | p32x_sh2_read16(a + 2, id);
676 void p32x_sh2_write8(u32 a, u32 d, int id)
678 if ((a & 0x0ffffc00) == 0x4000)
679 elprintf(EL_32X, "%csh2 w8 [%08x] %02x @%06x",
680 id ? 's' : 'm', a, d & 0xff, sh2_pc(id));
682 if ((a & 0x0ffc0000) == 0x06000000) {
683 Pico32xMem->sdram[(a & 0x3ffff) ^ 1] = d;
687 if ((a & 0x0ffe0000) == 0x04000000) {
688 u8 *dram = (u8 *)Pico32xMem->dram[(Pico32x.vdp_regs[0x0a/2] & P32XV_FS) ^ 1];
689 dram[(a & 0x1ffff) ^ 1] = d;
693 if ((a & ~0xfff) == 0xc0000000) {
694 Pico32xMem->data_array[id][(a & 0xfff) ^ 1] = d;
698 if ((a & 0x0fffff00) == 0x4100) {
699 p32x_vdp_write8(a, d);
703 if ((a & 0x0fffff00) == 0x4000) {
704 p32x_sh2reg_write8(a, d, id);
708 elprintf(EL_UIO, "%csh2 unmapped w8 [%08x] %02x @%06x",
709 id ? 's' : 'm', a, d & 0xff, sh2_pc(id));
712 void p32x_sh2_write16(u32 a, u32 d, int id)
714 if ((a & 0x0ffffc00) == 0x4000)
715 elprintf(EL_32X, "%csh2 w16 [%08x] %04x @%06x",
716 id ? 's' : 'm', a, d & 0xffff, sh2_pc(id));
718 if ((a & 0x0ffc0000) == 0x06000000) {
719 ((u16 *)Pico32xMem->sdram)[(a & 0x3ffff) / 2] = d;
723 if ((a & ~0xfff) == 0xc0000000) {
724 ((u16 *)Pico32xMem->data_array[id])[(a & 0xfff) / 2] = d;
728 if ((a & 0x0ffe0000) == 0x04000000) {
729 Pico32xMem->dram[(Pico32x.vdp_regs[0x0a/2] & P32XV_FS) ^ 1][(a & 0x1ffff) / 2] = d;
733 if ((a & 0x0fffff00) == 0x4100) {
734 p32x_vdp_write16(a, d);
738 if ((a & 0x0ffffe00) == 0x4200) {
739 Pico32xMem->pal[(a & 0x1ff) / 2] = d;
740 Pico32x.dirty_pal = 1;
744 if ((a & 0x0fffff00) == 0x4000) {
745 p32x_sh2reg_write16(a, d, id);
749 elprintf(EL_UIO, "%csh2 unmapped w16 [%08x] %04x @%06x",
750 id ? 's' : 'm', a, d & 0xffff, sh2_pc(id));
753 void p32x_sh2_write32(u32 a, u32 d, int id)
755 if ((a & 0xfffffe00) == 0xfffffe00) {
756 sh2_peripheral_write(a, d, id);
760 p32x_sh2_write16(a, d >> 16, id);
761 p32x_sh2_write16(a + 2, d, id);
764 #define HWSWAP(x) (((x) << 16) | ((x) >> 16))
765 void PicoMemSetup32x(void)
772 Pico32xMem = calloc(1, sizeof(*Pico32xMem));
773 if (Pico32xMem == NULL) {
774 elprintf(EL_STATUS, "OOM");
778 dmac0 = (void *)&Pico32xMem->sh2_peri_regs[0][0x180 / 4];
781 ps = (unsigned short *)Pico32xMem->m68k_rom;
782 pl = (unsigned int *)Pico32xMem->m68k_rom;
783 for (i = 1; i < 0xc0/4; i++)
784 pl[i] = HWSWAP(0x880200 + (i - 1) * 6);
787 for (i = 0xc0/2; i < 0x100/2; i++)
792 ps[0xc2/2] = 0x2700; // move #0x2700,sr
793 ps[0xfe/2] = 0x60fe; // jump to self
795 ps[0xfe/2] = 0x4e75; // rts
798 // fill remaining mem with ROM
799 memcpy(Pico32xMem->m68k_rom + 0x100, Pico.rom + 0x100, sizeof(Pico32xMem->m68k_rom) - 0x100);
804 FILE *f = fopen("32X_M_BIOS.BIN", "rb");
807 printf("missing 32X_M_BIOS.BIN\n");
810 fread(Pico32xMem->sh2_rom_m, 1, sizeof(Pico32xMem->sh2_rom_m), f);
812 f = fopen("32X_S_BIOS.BIN", "rb");
814 printf("missing 32X_S_BIOS.BIN\n");
817 fread(Pico32xMem->sh2_rom_s, 1, sizeof(Pico32xMem->sh2_rom_s), f);
820 for (i = 0; i < sizeof(Pico32xMem->sh2_rom_m); i += 2) {
821 int t = Pico32xMem->sh2_rom_m[i];
822 Pico32xMem->sh2_rom_m[i] = Pico32xMem->sh2_rom_m[i + 1];
823 Pico32xMem->sh2_rom_m[i + 1] = t;
825 for (i = 0; i < sizeof(Pico32xMem->sh2_rom_s); i += 2) {
826 int t = Pico32xMem->sh2_rom_s[i];
827 Pico32xMem->sh2_rom_s[i] = Pico32xMem->sh2_rom_s[i + 1];
828 Pico32xMem->sh2_rom_s[i + 1] = t;
832 // cartridge area becomes unmapped
833 // XXX: we take the easy way and don't unmap ROM,
834 // so that we can avoid handling the RV bit.
835 // m68k_map_unmap(0x000000, 0x3fffff);
838 rs = sizeof(Pico32xMem->m68k_rom);
839 cpu68k_map_set(m68k_read8_map, 0x000000, rs - 1, Pico32xMem->m68k_rom, 0);
840 cpu68k_map_set(m68k_read16_map, 0x000000, rs - 1, Pico32xMem->m68k_rom, 0);
841 cpu68k_map_set(m68k_write8_map, 0x000000, rs - 1, PicoWrite8_hint, 1); // TODO verify
842 cpu68k_map_set(m68k_write16_map, 0x000000, rs - 1, PicoWrite16_hint, 1);
847 // 32X ROM (unbanked, XXX: consider mirroring?)
848 rs = (Pico.romsize + M68K_BANK_MASK) & ~M68K_BANK_MASK;
851 cpu68k_map_set(m68k_read8_map, 0x880000, 0x880000 + rs - 1, Pico.rom, 0);
852 cpu68k_map_set(m68k_read16_map, 0x880000, 0x880000 + rs - 1, Pico.rom, 0);
857 // setup poll detector
858 m68k_poll.flag = P32XF_68KPOLL;
859 sh2_poll[0].flag = P32XF_MSH2POLL;
860 sh2_poll[1].flag = P32XF_SSH2POLL;