1 #include "../pico_int.h"
7 #define ash2_end_run(x)
11 static const char str_mars[] = "MARS";
13 struct Pico32xMem *Pico32xMem;
15 static void bank_switch(int b);
18 #define POLL_THRESHOLD 6
21 u32 addr, cycles, cyc_max;
24 static struct poll_det m68k_poll, sh2_poll[2];
26 static int p32x_poll_detect(struct poll_det *pd, u32 a, u32 cycles, int is_vdp)
28 int ret = 0, flag = pd->flag;
33 if (a - 2 <= pd->addr && pd->addr <= a + 2 && cycles - pd->cycles < pd->cyc_max) {
35 if (pd->cnt > POLL_THRESHOLD) {
36 if (!(Pico32x.emu_flags & flag)) {
37 elprintf(EL_32X, "%s poll addr %08x, cyc %u",
38 flag & (P32XF_68KPOLL|P32XF_68KVPOLL) ? "m68k" :
39 (flag & (P32XF_MSH2POLL|P32XF_MSH2VPOLL) ? "msh2" : "ssh2"), a, cycles - pd->cycles);
42 Pico32x.emu_flags |= flag;
54 static int p32x_poll_undetect(struct poll_det *pd, int is_vdp)
56 int ret = 0, flag = pd->flag;
58 flag <<= 3; // VDP only
60 flag |= flag << 3; // both
61 if (Pico32x.emu_flags & flag) {
62 elprintf(EL_32X, "poll %02x -> %02x", Pico32x.emu_flags, Pico32x.emu_flags & ~flag);
65 Pico32x.emu_flags &= ~flag;
66 pd->addr = pd->cnt = 0;
70 void p32x_poll_event(int cpu_mask, int is_vdp)
73 p32x_poll_undetect(&sh2_poll[0], is_vdp);
75 p32x_poll_undetect(&sh2_poll[1], is_vdp);
82 static const u16 comm_fakevals[] = {
83 0x4d5f, 0x4f4b, // M_OK
84 0x535f, 0x4f4b, // S_OK
85 0x4D41, 0x5346, // MASF - Brutal Unleashed
86 0x5331, 0x4d31, // Darxide
89 0x0000, 0x0000, // eq for doom
90 0x0002, // Mortal Kombat
94 static u32 sh2_comm_faker(u32 a)
97 if (a == 0x28 && !p32x_csum_faked) {
99 return *(unsigned short *)(Pico.rom + 0x18e);
101 if (f >= sizeof(comm_fakevals) / sizeof(comm_fakevals[0]))
103 return comm_fakevals[f++];
109 unsigned int sar0, dar0, tcr0; // src addr, dst addr, transfer count
110 unsigned int chcr0; // chan ctl
111 unsigned int sar1, dar1, tcr1; // same for chan 1
117 static void dma_68k2sh2_do(void)
119 unsigned short *dreqlen = &Pico32x.regs[0x10 / 2];
122 if (dmac0->tcr0 != *dreqlen)
123 elprintf(EL_32X|EL_ANOMALY, "tcr0 and dreq len differ: %d != %d", dmac0->tcr0, *dreqlen);
125 // HACK: assume bus is busy and SH2 is halted
126 // XXX: use different mechanism for this, not poll det
127 Pico32x.emu_flags |= P32XF_MSH2POLL; // id ? P32XF_SSH2POLL : P32XF_MSH2POLL;
129 for (i = 0; i < Pico32x.dmac_ptr && dmac0->tcr0 > 0; i++) {
130 extern void p32x_sh2_write16(u32 a, u32 d, int id);
131 elprintf(EL_32X, "dmaw [%08x] %04x, left %d", dmac0->dar0, Pico32x.dmac_fifo[i], *dreqlen);
132 p32x_sh2_write16(dmac0->dar0, Pico32x.dmac_fifo[i], 0);
138 Pico32x.dmac_ptr = 0; // HACK
139 Pico32x.regs[6 / 2] &= ~P32XS_FULL;
141 Pico32x.regs[6 / 2] &= ~P32XS_68S; // transfer complete
142 if (dmac0->tcr0 == 0) {
143 dmac0->chcr0 |= 2; // DMA has ended normally
144 p32x_poll_undetect(&sh2_poll[0], 0);
148 // ------------------------------------------------------------------
151 static u32 p32x_reg_read16(u32 a)
155 if (a == 2) // INTM, INTS
156 return ((Pico32x.sh2irqi[0] & P32XI_CMD) >> 4) | ((Pico32x.sh2irqi[1] & P32XI_CMD) >> 3);
158 if ((a & 0x30) == 0x20)
159 return sh2_comm_faker(a);
161 if ((a & 0x30) == 0x20 && p32x_poll_detect(&m68k_poll, a, SekCyclesDoneT(), 0)) {
166 if ((a & 0x30) == 0x30)
167 return p32x_pwm_read16(a);
169 return Pico32x.regs[a / 2];
172 static void p32x_reg_write8(u32 a, u32 d)
174 u16 *r = Pico32x.regs;
177 // for things like bset on comm port
180 if (a == 1 && !(r[0] & 1)) {
190 case 0: // adapter ctl
191 r[0] = (r[0] & 0x83) | ((d << 8) & P32XS_FM);
194 if ((d & 1) && !(Pico32x.sh2irqi[0] & P32XI_CMD)) {
195 Pico32x.sh2irqi[0] |= P32XI_CMD;
199 if ((d & 2) && !(Pico32x.sh2irqi[1] & P32XI_CMD)) {
200 Pico32x.sh2irqi[1] |= P32XI_CMD;
213 r[6 / 2] = (r[6 / 2] & P32XS_FULL) | (d & (P32XS_68S|P32XS_DMA|P32XS_RV));
220 if ((a & 0x30) == 0x20) {
223 p32x_poll_undetect(&sh2_poll[0], 0);
224 p32x_poll_undetect(&sh2_poll[1], 0);
225 // if some SH2 is busy waiting, it needs to see the result ASAP
226 if (SekCyclesLeftNoMCD > 32)
232 static void p32x_reg_write16(u32 a, u32 d)
234 u16 *r = Pico32x.regs;
237 // for things like bset on comm port
241 case 0x00: // adapter ctl
242 r[0] = (r[0] & 0x83) | (d & P32XS_FM);
244 case 0x10: // DREQ len
247 case 0x12: // FIFO reg
248 if (!(r[6 / 2] & P32XS_68S)) {
249 elprintf(EL_32X|EL_ANOMALY, "DREQ FIFO w16 without 68S?");
252 if (Pico32x.dmac_ptr < DMAC_FIFO_LEN) {
253 Pico32x.dmac_fifo[Pico32x.dmac_ptr++] = d;
254 if ((Pico32x.dmac_ptr & 3) == 0 && (dmac0->chcr0 & 3) == 1 && (dmac0->dmaor & 1))
256 if (Pico32x.dmac_ptr == DMAC_FIFO_LEN)
257 r[6 / 2] |= P32XS_FULL;
263 if ((a & 0x38) == 0x08) {
268 else if ((a & 0x30) == 0x20 && r[a / 2] != d) {
270 p32x_poll_undetect(&sh2_poll[0], 0);
271 p32x_poll_undetect(&sh2_poll[1], 0);
273 if (SekCyclesLeftNoMCD > 32)
278 else if ((a & 0x30) == 0x30) {
279 p32x_pwm_write16(a, d);
283 p32x_reg_write8(a + 1, d);
286 // ------------------------------------------------------------------
288 static u32 p32x_vdp_read16(u32 a)
292 return Pico32x.vdp_regs[a / 2];
295 static void p32x_vdp_write8(u32 a, u32 d)
297 u16 *r = Pico32x.vdp_regs;
300 // for FEN checks between writes
303 // TODO: verify what's writeable
306 // priority inversion is handled in palette
307 if ((r[0] ^ d) & P32XV_PRI)
308 Pico32x.dirty_pal = 1;
309 r[0] = (r[0] & P32XV_nPAL) | (d & 0xff);
311 elprintf(EL_32X|EL_ANOMALY, "TODO: mode3");
313 case 0x05: // fill len
318 Pico32x.pending_fb = d;
319 // if we are blanking and FS bit is changing
320 if (((r[0x0a/2] & P32XV_VBLK) || (r[0] & P32XV_Mx) == 0) && ((r[0x0a/2] ^ d) & P32XV_FS)) {
322 Pico32xSwapDRAM(d ^ 1);
323 elprintf(EL_32X, "VDP FS: %d", r[0x0a/2] & P32XV_FS);
329 static void p32x_vdp_write16(u32 a, u32 d)
332 if (a == 6) { // fill start
333 Pico32x.vdp_regs[6 / 2] = d;
336 if (a == 8) { // fill data
337 u16 *dram = Pico32xMem->dram[(Pico32x.vdp_regs[0x0a/2] & P32XV_FS) ^ 1];
338 int len = Pico32x.vdp_regs[4 / 2] + 1;
339 a = Pico32x.vdp_regs[6 / 2];
342 a = (a & 0xff00) | ((a + 1) & 0xff);
344 Pico32x.vdp_regs[6 / 2] = a;
345 Pico32x.vdp_regs[8 / 2] = d;
349 p32x_vdp_write8(a | 1, d);
352 // ------------------------------------------------------------------
355 static u32 p32x_sh2reg_read16(u32 a, int cpuid)
357 u16 *r = Pico32x.regs;
361 case 0x00: // adapter/irq ctl
362 return (r[0] & P32XS_FM) | Pico32x.sh2_regs[0] | Pico32x.sh2irq_mask[cpuid];
363 case 0x04: // H count (often as comm too)
364 if (p32x_poll_detect(&sh2_poll[cpuid], a, ash2_cycles_done(), 0))
366 return Pico32x.sh2_regs[4 / 2];
367 case 0x10: // DREQ len
372 if ((a & 0x38) == 0x08)
375 if ((a & 0x30) == 0x20) {
376 if (p32x_poll_detect(&sh2_poll[cpuid], a, ash2_cycles_done(), 0))
380 if ((a & 0x30) == 0x30) {
381 sh2_poll[cpuid].cnt = 0;
382 return p32x_pwm_read16(a);
388 static void p32x_sh2reg_write8(u32 a, u32 d, int cpuid)
393 Pico32x.regs[0] &= ~P32XS_FM;
394 Pico32x.regs[0] |= (d << 8) & P32XS_FM;
397 Pico32x.sh2irq_mask[cpuid] = d & 0x8f;
398 Pico32x.sh2_regs[0] &= ~0x80;
399 Pico32x.sh2_regs[0] |= d & 0x80;
403 Pico32x.sh2_regs[4 / 2] = d & 0xff;
404 p32x_poll_undetect(&sh2_poll[cpuid ^ 1], 0);
408 if ((a & 0x30) == 0x20) {
409 u8 *r8 = (u8 *)Pico32x.regs;
411 p32x_poll_undetect(&m68k_poll, 0);
412 p32x_poll_undetect(&sh2_poll[cpuid ^ 1], 0);
417 static void p32x_sh2reg_write16(u32 a, u32 d, int cpuid)
422 if ((a & 0x30) == 0x20 && Pico32x.regs[a/2] != d) {
423 Pico32x.regs[a / 2] = d;
424 p32x_poll_undetect(&m68k_poll, 0);
425 p32x_poll_undetect(&sh2_poll[cpuid ^ 1], 0);
429 else if ((a & 0x30) == 0x30) {
430 p32x_pwm_write16(a, d);
436 Pico32x.regs[0] &= ~P32XS_FM;
437 Pico32x.regs[0] |= d & P32XS_FM;
439 case 0x14: Pico32x.sh2irqs &= ~P32XI_VRES; goto irls;
440 case 0x16: Pico32x.sh2irqs &= ~P32XI_VINT; goto irls;
441 case 0x18: Pico32x.sh2irqs &= ~P32XI_HINT; goto irls;
442 case 0x1a: Pico32x.sh2irqi[cpuid] &= ~P32XI_CMD; goto irls;
444 Pico32x.sh2irqs &= ~P32XI_PWM;
445 p32x_pwm_irq_check(0);
449 p32x_sh2reg_write8(a | 1, d, cpuid);
456 // ------------------------------------------------------------------
457 // SH2 internal peripherals
458 static u32 sh2_peripheral_read8(u32 a, int id)
460 u8 *r = (void *)Pico32xMem->sh2_peri_regs[id];
468 elprintf(EL_32X, "%csh2 peri r8 [%08x] %02x @%06x", id ? 's' : 'm', a | ~0x1ff, d, sh2_pc(id));
472 static u32 sh2_peripheral_read32(u32 a, int id)
476 d = Pico32xMem->sh2_peri_regs[id][a / 4];
478 elprintf(EL_32X, "%csh2 peri r32 [%08x] %08x @%06x", id ? 's' : 'm', a | ~0x1ff, d, sh2_pc(id));
482 static void sh2_peripheral_write8(u32 a, u32 d, int id)
484 u8 *r = (void *)Pico32xMem->sh2_peri_regs[id];
485 elprintf(EL_32X, "%csh2 peri w8 [%08x] %02x @%06x", id ? 's' : 'm', a, d, sh2_pc(id));
491 static void sh2_peripheral_write32(u32 a, u32 d, int id)
493 u32 *r = Pico32xMem->sh2_peri_regs[id];
494 elprintf(EL_32X, "%csh2 peri w32 [%08x] %08x @%06x", id ? 's' : 'm', a, d, sh2_pc(id));
500 // division unit (TODO: verify):
501 case 0x104: // DVDNT: divident L, starts divide
502 elprintf(EL_32X, "%csh2 divide %08x / %08x", id ? 's' : 'm', d, r[0x100 / 4]);
504 signed int divisor = r[0x100 / 4];
505 r[0x118 / 4] = r[0x110 / 4] = (signed int)d % divisor;
506 r[0x104 / 4] = r[0x11c / 4] = r[0x114 / 4] = (signed int)d / divisor;
510 elprintf(EL_32X, "%csh2 divide %08x%08x / %08x @%08x",
511 id ? 's' : 'm', r[0x110 / 4], d, r[0x100 / 4], sh2_pc(id));
513 signed long long divident = (signed long long)r[0x110 / 4] << 32 | d;
514 signed int divisor = r[0x100 / 4];
515 // XXX: undocumented mirroring to 0x118,0x11c?
516 r[0x118 / 4] = r[0x110 / 4] = divident % divisor;
517 r[0x11c / 4] = r[0x114 / 4] = divident / divisor;
522 if ((a == 0x1b0 || a == 0x18c) && (dmac0->chcr0 & 3) == 1 && (dmac0->dmaor & 1)) {
523 elprintf(EL_32X, "sh2 DMA %08x -> %08x, cnt %d, chcr %04x @%06x",
524 dmac0->sar0, dmac0->dar0, dmac0->tcr0, dmac0->chcr0, sh2_pc(id));
525 dmac0->tcr0 &= 0xffffff;
527 // HACK: assume 68k starts writing soon and end the timeslice
530 // DREQ is only sent after first 4 words are written.
531 // we do multiple of 4 words to avoid messing up alignment
532 if (dmac0->sar0 == 0x20004012 && Pico32x.dmac_ptr && (Pico32x.dmac_ptr & 3) == 0) {
533 elprintf(EL_32X, "68k -> sh2 DMA");
539 // ------------------------------------------------------------------
540 // default 32x handlers
541 u32 PicoRead8_32x(u32 a)
544 if ((a & 0xffc0) == 0x5100) { // a15100
545 d = p32x_reg_read16(a);
549 if (!(Pico32x.regs[0] & 1))
552 if ((a & 0xfff0) == 0x5180) { // a15180
553 d = p32x_vdp_read16(a);
557 if ((a & 0xfe00) == 0x5200) { // a15200
558 d = Pico32xMem->pal[(a & 0x1ff) / 2];
563 if ((a & 0xfffc) == 0x30ec) { // a130ec
568 elprintf(EL_UIO, "m68k unmapped r8 [%06x] @%06x", a, SekPc);
578 elprintf(EL_32X, "m68k 32x r8 [%06x] %02x @%06x", a, d, SekPc);
582 u32 PicoRead16_32x(u32 a)
585 if ((a & 0xffc0) == 0x5100) { // a15100
586 d = p32x_reg_read16(a);
590 if (!(Pico32x.regs[0] & 1))
593 if ((a & 0xfff0) == 0x5180) { // a15180
594 d = p32x_vdp_read16(a);
598 if ((a & 0xfe00) == 0x5200) { // a15200
599 d = Pico32xMem->pal[(a & 0x1ff) / 2];
604 if ((a & 0xfffc) == 0x30ec) { // a130ec
605 d = !(a & 2) ? ('M'<<8)|'A' : ('R'<<8)|'S';
609 elprintf(EL_UIO, "m68k unmapped r16 [%06x] @%06x", a, SekPc);
613 elprintf(EL_32X, "m68k 32x r16 [%06x] %04x @%06x", a, d, SekPc);
617 void PicoWrite8_32x(u32 a, u32 d)
619 if ((a & 0xfc00) == 0x5000)
620 elprintf(EL_32X, "m68k 32x w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
622 if ((a & 0xffc0) == 0x5100) { // a15100
623 p32x_reg_write8(a, d);
627 if (!(Pico32x.regs[0] & 1))
630 if ((a & 0xfff0) == 0x5180) { // a15180
631 p32x_vdp_write8(a, d);
636 if ((a & 0xfe00) == 0x5200) { // a15200
637 elprintf(EL_32X|EL_ANOMALY, "m68k 32x PAL w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
638 ((u8 *)Pico32xMem->pal)[(a & 0x1ff) ^ 1] = d;
639 Pico32x.dirty_pal = 1;
644 elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
647 void PicoWrite16_32x(u32 a, u32 d)
649 if ((a & 0xfc00) == 0x5000)
650 elprintf(EL_UIO, "m68k 32x w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
652 if ((a & 0xffc0) == 0x5100) { // a15100
653 p32x_reg_write16(a, d);
657 if (!(Pico32x.regs[0] & 1))
660 if ((a & 0xfff0) == 0x5180) { // a15180
661 p32x_vdp_write16(a, d);
665 if ((a & 0xfe00) == 0x5200) { // a15200
666 Pico32xMem->pal[(a & 0x1ff) / 2] = d;
667 Pico32x.dirty_pal = 1;
672 elprintf(EL_UIO, "m68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
675 // hint vector is writeable
676 static void PicoWrite8_hint(u32 a, u32 d)
678 if ((a & 0xfffc) == 0x0070) {
679 Pico32xMem->m68k_rom[a ^ 1] = d;
683 elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
686 static void PicoWrite16_hint(u32 a, u32 d)
688 if ((a & 0xfffc) == 0x0070) {
689 ((u16 *)Pico32xMem->m68k_rom)[a/2] = d;
693 elprintf(EL_UIO, "m68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
696 void Pico32xSwapDRAM(int b)
698 cpu68k_map_set(m68k_read8_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0);
699 cpu68k_map_set(m68k_read16_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0);
700 cpu68k_map_set(m68k_write8_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0);
701 cpu68k_map_set(m68k_write16_map, 0x840000, 0x85ffff, Pico32xMem->dram[b], 0);
704 static void bank_switch(int b)
706 unsigned int rs, bank;
709 if (bank >= Pico.romsize) {
710 elprintf(EL_32X|EL_ANOMALY, "missing bank @ %06x", bank);
714 // 32X ROM (unbanked, XXX: consider mirroring?)
715 rs = (Pico.romsize + M68K_BANK_MASK) & ~M68K_BANK_MASK;
719 cpu68k_map_set(m68k_read8_map, 0x900000, 0x900000 + rs - 1, Pico.rom + bank, 0);
720 cpu68k_map_set(m68k_read16_map, 0x900000, 0x900000 + rs - 1, Pico.rom + bank, 0);
722 elprintf(EL_32X, "bank %06x-%06x -> %06x", 0x900000, 0x900000 + rs - 1, bank);
725 // -----------------------------------------------------------------
727 // -----------------------------------------------------------------
729 u32 p32x_sh2_read8(u32 a, int id)
733 if (id == 0 && a < sizeof(Pico32xMem->sh2_rom_m))
734 return Pico32xMem->sh2_rom_m[a ^ 1];
735 if (id == 1 && a < sizeof(Pico32xMem->sh2_rom_s))
736 return Pico32xMem->sh2_rom_s[a ^ 1];
738 if ((a & 0xdffc0000) == 0x06000000)
739 return Pico32xMem->sdram[(a & 0x3ffff) ^ 1];
741 if ((a & 0xdfc00000) == 0x02000000)
742 if ((a & 0x003fffff) < Pico.romsize)
743 return Pico.rom[(a & 0x3fffff) ^ 1];
745 if ((a & ~0xfff) == 0xc0000000)
746 return Pico32xMem->data_array[id][(a & 0xfff) ^ 1];
748 if ((a & 0xdffc0000) == 0x04000000) {
749 /* XXX: overwrite readable as normal? */
750 u8 *dram = (u8 *)Pico32xMem->dram[(Pico32x.vdp_regs[0x0a/2] & P32XV_FS) ^ 1];
751 return dram[(a & 0x1ffff) ^ 1];
754 if ((a & 0xdfffff00) == 0x4000) {
755 d = p32x_sh2reg_read16(a, id);
759 if ((a & 0xdfffff00) == 0x4100) {
760 d = p32x_vdp_read16(a);
761 if (p32x_poll_detect(&sh2_poll[id], a, ash2_cycles_done(), 1))
766 if ((a & 0xdfffff00) == 0x4200) {
767 d = Pico32xMem->pal[(a & 0x1ff) / 2];
771 if ((a & 0xfffffe00) == 0xfffffe00)
772 return sh2_peripheral_read8(a, id);
774 elprintf(EL_UIO, "%csh2 unmapped r8 [%08x] %02x @%06x",
775 id ? 's' : 'm', a, d, sh2_pc(id));
784 elprintf(EL_32X, "%csh2 r8 [%08x] %02x @%06x",
785 id ? 's' : 'm', a, d, sh2_pc(id));
789 u32 p32x_sh2_read16(u32 a, int id)
793 if (id == 0 && a < sizeof(Pico32xMem->sh2_rom_m))
794 return *(u16 *)(Pico32xMem->sh2_rom_m + a);
795 if (id == 1 && a < sizeof(Pico32xMem->sh2_rom_s))
796 return *(u16 *)(Pico32xMem->sh2_rom_s + a);
798 if ((a & 0xdffc0000) == 0x06000000)
799 return ((u16 *)Pico32xMem->sdram)[(a & 0x3ffff) / 2];
801 if ((a & 0xdfc00000) == 0x02000000)
802 if ((a & 0x003fffff) < Pico.romsize)
803 return ((u16 *)Pico.rom)[(a & 0x3fffff) / 2];
805 if ((a & ~0xfff) == 0xc0000000)
806 return ((u16 *)Pico32xMem->data_array[id])[(a & 0xfff) / 2];
808 if ((a & 0xdffe0000) == 0x04000000)
809 return Pico32xMem->dram[(Pico32x.vdp_regs[0x0a/2] & P32XV_FS) ^ 1][(a & 0x1ffff) / 2];
811 if ((a & 0xdfffff00) == 0x4000) {
812 d = p32x_sh2reg_read16(a, id);
813 if (!(EL_LOGMASK & EL_PWM) && (a & 0x30) == 0x30) // hide PWM
818 if ((a & 0xdfffff00) == 0x4100) {
819 d = p32x_vdp_read16(a);
820 if (p32x_poll_detect(&sh2_poll[id], a, ash2_cycles_done(), 1))
825 if ((a & 0xdfffff00) == 0x4200) {
826 d = Pico32xMem->pal[(a & 0x1ff) / 2];
830 elprintf(EL_UIO, "%csh2 unmapped r16 [%08x] %04x @%06x",
831 id ? 's' : 'm', a, d, sh2_pc(id));
835 elprintf(EL_32X, "%csh2 r16 [%08x] %04x @%06x",
836 id ? 's' : 'm', a, d, sh2_pc(id));
840 u32 p32x_sh2_read32(u32 a, int id)
842 if ((a & 0xfffffe00) == 0xfffffe00)
843 return sh2_peripheral_read32(a, id);
845 // elprintf(EL_UIO, "sh2 r32 [%08x] %08x @%06x", a, d, ash2_pc());
846 return (p32x_sh2_read16(a, id) << 16) | p32x_sh2_read16(a + 2, id);
849 void p32x_sh2_write8(u32 a, u32 d, int id)
851 if ((a & 0xdffffc00) == 0x4000)
852 elprintf(EL_32X, "%csh2 w8 [%08x] %02x @%06x",
853 id ? 's' : 'm', a, d & 0xff, sh2_pc(id));
855 if ((a & 0xdffc0000) == 0x06000000) {
856 Pico32xMem->sdram[(a & 0x3ffff) ^ 1] = d;
860 if ((a & 0xdffc0000) == 0x04000000) {
862 if (!(a & 0x20000) || d) {
863 dram = (u8 *)Pico32xMem->dram[(Pico32x.vdp_regs[0x0a/2] & P32XV_FS) ^ 1];
864 dram[(a & 0x1ffff) ^ 1] = d;
869 if ((a & ~0xfff) == 0xc0000000) {
870 Pico32xMem->data_array[id][(a & 0xfff) ^ 1] = d;
874 if ((a & 0xdfffff00) == 0x4100) {
875 p32x_vdp_write8(a, d);
879 if ((a & 0xdfffff00) == 0x4000) {
880 p32x_sh2reg_write8(a, d, id);
884 if ((a & 0xfffffe00) == 0xfffffe00) {
885 sh2_peripheral_write8(a, d, id);
889 elprintf(EL_UIO, "%csh2 unmapped w8 [%08x] %02x @%06x",
890 id ? 's' : 'm', a, d & 0xff, sh2_pc(id));
893 void p32x_sh2_write16(u32 a, u32 d, int id)
895 if ((a & 0xdffffc00) == 0x4000 && ((EL_LOGMASK & EL_PWM) || (a & 0x30) != 0x30)) // hide PWM
896 elprintf(EL_32X, "%csh2 w16 [%08x] %04x @%06x",
897 id ? 's' : 'm', a, d & 0xffff, sh2_pc(id));
899 // ignore "Associative purge space"
900 if ((a & 0xf8000000) == 0x40000000)
903 if ((a & 0xdffc0000) == 0x06000000) {
904 ((u16 *)Pico32xMem->sdram)[(a & 0x3ffff) / 2] = d;
908 if ((a & ~0xfff) == 0xc0000000) {
909 ((u16 *)Pico32xMem->data_array[id])[(a & 0xfff) / 2] = d;
913 if ((a & 0xdffc0000) == 0x04000000) {
914 u16 *pd = &Pico32xMem->dram[(Pico32x.vdp_regs[0x0a/2] & P32XV_FS) ^ 1][(a & 0x1ffff) / 2];
915 if (!(a & 0x20000)) {
920 if (!(d & 0xff00)) d |= *pd & 0xff00;
921 if (!(d & 0x00ff)) d |= *pd & 0x00ff;
926 if ((a & 0xdfffff00) == 0x4100) {
927 sh2_poll[id].cnt = 0; // for poll before VDP accesses
928 p32x_vdp_write16(a, d);
932 if ((a & 0xdffffe00) == 0x4200) {
933 Pico32xMem->pal[(a & 0x1ff) / 2] = d;
934 Pico32x.dirty_pal = 1;
938 if ((a & 0xdfffff00) == 0x4000) {
939 p32x_sh2reg_write16(a, d, id);
943 elprintf(EL_UIO, "%csh2 unmapped w16 [%08x] %04x @%06x",
944 id ? 's' : 'm', a, d & 0xffff, sh2_pc(id));
947 void p32x_sh2_write32(u32 a, u32 d, int id)
949 if ((a & 0xfffffe00) == 0xfffffe00) {
950 sh2_peripheral_write32(a, d, id);
954 p32x_sh2_write16(a, d >> 16, id);
955 p32x_sh2_write16(a + 2, d, id);
958 #define HWSWAP(x) (((x) << 16) | ((x) >> 16))
959 void PicoMemSetup32x(void)
966 Pico32xMem = calloc(1, sizeof(*Pico32xMem));
967 if (Pico32xMem == NULL) {
968 elprintf(EL_STATUS, "OOM");
972 dmac0 = (void *)&Pico32xMem->sh2_peri_regs[0][0x180 / 4];
975 ps = (unsigned short *)Pico32xMem->m68k_rom;
976 pl = (unsigned int *)Pico32xMem->m68k_rom;
977 for (i = 1; i < 0xc0/4; i++)
978 pl[i] = HWSWAP(0x880200 + (i - 1) * 6);
981 for (i = 0xc0/2; i < 0x100/2; i++)
986 ps[0xc2/2] = 0x2700; // move #0x2700,sr
987 ps[0xfe/2] = 0x60fe; // jump to self
989 ps[0xfe/2] = 0x4e75; // rts
992 // fill remaining mem with ROM
993 memcpy(Pico32xMem->m68k_rom + 0x100, Pico.rom + 0x100, sizeof(Pico32xMem->m68k_rom) - 0x100);
998 FILE *f = fopen("32X_M_BIOS.BIN", "rb");
1001 printf("missing 32X_M_BIOS.BIN\n");
1004 fread(Pico32xMem->sh2_rom_m, 1, sizeof(Pico32xMem->sh2_rom_m), f);
1006 f = fopen("32X_S_BIOS.BIN", "rb");
1008 printf("missing 32X_S_BIOS.BIN\n");
1011 fread(Pico32xMem->sh2_rom_s, 1, sizeof(Pico32xMem->sh2_rom_s), f);
1014 for (i = 0; i < sizeof(Pico32xMem->sh2_rom_m); i += 2) {
1015 int t = Pico32xMem->sh2_rom_m[i];
1016 Pico32xMem->sh2_rom_m[i] = Pico32xMem->sh2_rom_m[i + 1];
1017 Pico32xMem->sh2_rom_m[i + 1] = t;
1019 for (i = 0; i < sizeof(Pico32xMem->sh2_rom_s); i += 2) {
1020 int t = Pico32xMem->sh2_rom_s[i];
1021 Pico32xMem->sh2_rom_s[i] = Pico32xMem->sh2_rom_s[i + 1];
1022 Pico32xMem->sh2_rom_s[i + 1] = t;
1026 // cartridge area becomes unmapped
1027 // XXX: we take the easy way and don't unmap ROM,
1028 // so that we can avoid handling the RV bit.
1029 // m68k_map_unmap(0x000000, 0x3fffff);
1032 rs = sizeof(Pico32xMem->m68k_rom);
1033 cpu68k_map_set(m68k_read8_map, 0x000000, rs - 1, Pico32xMem->m68k_rom, 0);
1034 cpu68k_map_set(m68k_read16_map, 0x000000, rs - 1, Pico32xMem->m68k_rom, 0);
1035 cpu68k_map_set(m68k_write8_map, 0x000000, rs - 1, PicoWrite8_hint, 1); // TODO verify
1036 cpu68k_map_set(m68k_write16_map, 0x000000, rs - 1, PicoWrite16_hint, 1);
1041 // 32X ROM (unbanked, XXX: consider mirroring?)
1042 rs = (Pico.romsize + M68K_BANK_MASK) & ~M68K_BANK_MASK;
1045 cpu68k_map_set(m68k_read8_map, 0x880000, 0x880000 + rs - 1, Pico.rom, 0);
1046 cpu68k_map_set(m68k_read16_map, 0x880000, 0x880000 + rs - 1, Pico.rom, 0);
1051 // setup poll detector
1052 m68k_poll.flag = P32XF_68KPOLL;
1053 m68k_poll.cyc_max = 64;
1054 sh2_poll[0].flag = P32XF_MSH2POLL;
1055 sh2_poll[0].cyc_max = 16;
1056 sh2_poll[1].flag = P32XF_SSH2POLL;
1057 sh2_poll[1].cyc_max = 16;