1 // Memory I/O handlers for Sega/Mega CD.
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2 // (c) Copyright 2007-2009, Grazvydas "notaz" Ignotas
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4 #include "../pico_int.h"
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5 #include "../memory.h"
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10 unsigned long s68k_read8_map [0x1000000 >> M68K_MEM_SHIFT];
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11 unsigned long s68k_read16_map [0x1000000 >> M68K_MEM_SHIFT];
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12 unsigned long s68k_write8_map [0x1000000 >> M68K_MEM_SHIFT];
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13 unsigned long s68k_write16_map[0x1000000 >> M68K_MEM_SHIFT];
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15 MAKE_68K_READ8(s68k_read8, s68k_read8_map)
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16 MAKE_68K_READ16(s68k_read16, s68k_read16_map)
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17 MAKE_68K_READ32(s68k_read32, s68k_read16_map)
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18 MAKE_68K_WRITE8(s68k_write8, s68k_write8_map)
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19 MAKE_68K_WRITE16(s68k_write16, s68k_write16_map)
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20 MAKE_68K_WRITE32(s68k_write32, s68k_write16_map)
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22 // -----------------------------------------------------------------
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25 #define POLL_LIMIT 16
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26 #define POLL_CYCLES 124
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27 unsigned int s68k_poll_adclk, s68k_poll_cnt;
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29 #ifndef _ASM_CD_MEMORY_C
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30 static u32 m68k_reg_read16(u32 a)
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37 d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens
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40 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);
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41 elprintf(EL_CDREG3, "m68k_regs r3: %02x @%06x", (u8)d, SekPc);
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44 d = Pico_mcd->s68k_regs[4]<<8;
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47 d = *(u16 *)(Pico_mcd->bios + 0x72);
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50 d = Read_CDC_Host(0);
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53 elprintf(EL_UIO, "m68k FIXME: reserved read");
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56 d = Pico_mcd->m.timer_stopwatch >> 16;
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57 elprintf(EL_CDREGS, "m68k stopwatch timer read (%04x)", d);
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62 // comm flag/cmd/status (0xE-0x2F)
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63 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
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67 elprintf(EL_UIO, "m68k_regs FIXME invalid read @ %02x", a);
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75 #ifndef _ASM_CD_MEMORY_C
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78 void m68k_reg_write8(u32 a, u32 d)
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86 if ((d&1) && (Pico_mcd->s68k_regs[0x33]&(1<<2))) { elprintf(EL_INTS, "m68k: s68k irq 2"); SekInterruptS68k(2); }
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90 if (!(d&1)) Pico_mcd->m.state_flags |= 1; // reset pending, needed to be sure we fetch the right vectors on reset
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91 if ( (Pico_mcd->m.busreq&1) != (d&1)) elprintf(EL_INTSW, "m68k: s68k reset %i", !(d&1));
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92 if ( (Pico_mcd->m.busreq&2) != (d&2)) elprintf(EL_INTSW, "m68k: s68k brq %i", (d&2)>>1);
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93 if ((Pico_mcd->m.state_flags&1) && (d&3)==1) {
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94 SekResetS68k(); // S68k comes out of RESET or BRQ state
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95 Pico_mcd->m.state_flags&=~1;
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96 elprintf(EL_CDREGS, "m68k: resetting s68k, cycles=%i", SekCyclesLeft);
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99 d |= 2; // verified: reset also gives bus
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100 if ((d ^ Pico_mcd->m.busreq) & 2)
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101 PicoMemRemapCD(Pico_mcd->s68k_regs[3]);
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102 Pico_mcd->m.busreq = d;
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105 elprintf(EL_CDREGS, "m68k: prg wp=%02x", d);
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106 Pico_mcd->s68k_regs[2] = d; // really use s68k side register
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109 dold = Pico_mcd->s68k_regs[3];
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110 elprintf(EL_CDREG3, "m68k_regs w3: %02x @%06x", (u8)d, SekPc);
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111 //if ((Pico_mcd->s68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2);
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112 //if ((Pico_mcd->s68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :
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113 // ((d&2) ? "word ram to s68k" : "word ram to m68k"));
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114 if (dold & 4) { // 1M mode
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115 d ^= 2; // writing 0 to DMNA actually sets it, 1 does nothing
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117 if ((d ^ dold) & d & 2) { // DMNA is being set
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118 dold &= ~1; // return word RAM to s68k
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119 /* Silpheed hack: bset(w3), r3, btst, bne, r3 */
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120 SekEndRun(20+16+10+12+16);
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123 Pico_mcd->s68k_regs[3] = (d & 0xc2) | (dold & 0x1f);
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124 if ((d ^ dold) & 0xc0) {
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125 elprintf(EL_CDREGS, "m68k: prg bank: %i -> %i", (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));
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126 PicoMemRemapCD(Pico_mcd->s68k_regs[3]);
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128 #ifdef USE_POLL_DETECT
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129 if ((s68k_poll_adclk&0xfe) == 2 && s68k_poll_cnt > POLL_LIMIT) {
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130 SekSetStopS68k(0); s68k_poll_adclk = 0;
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131 elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);
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136 Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer
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139 Pico_mcd->bios[0x72] = d;
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140 elprintf(EL_CDREGS, "hint vector set to %04x%04x",
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141 ((u16 *)Pico_mcd->bios)[0x70/2], ((u16 *)Pico_mcd->bios)[0x72/2]);
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144 d = (d << 1) | ((d >> 7) & 1); // rol8 1 (special case)
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146 //dprintf("m68k: comm flag: %02x", d);
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147 Pico_mcd->s68k_regs[0xe] = d;
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148 #ifdef USE_POLL_DETECT
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149 if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {
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150 SekSetStopS68k(0); s68k_poll_adclk = 0;
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151 elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);
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157 if ((a&0xf0) == 0x10) {
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158 Pico_mcd->s68k_regs[a] = d;
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159 #ifdef USE_POLL_DETECT
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160 if ((a&0xfe) == (s68k_poll_adclk&0xfe) && s68k_poll_cnt > POLL_LIMIT) {
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161 SekSetStopS68k(0); s68k_poll_adclk = 0;
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162 elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);
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168 elprintf(EL_UIO, "m68k FIXME: invalid write? [%02x] %02x", a, d);
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171 #ifndef _ASM_CD_MEMORY_C
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174 u32 s68k_poll_detect(u32 a, u32 d)
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176 #ifdef USE_POLL_DETECT
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177 // needed mostly for Cyclone, which doesn't always check it's cycle counter
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178 if (SekIsStoppedS68k()) return d;
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179 // polling detection
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180 if (a == (s68k_poll_adclk&0xff)) {
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181 unsigned int clkdiff = SekCyclesDoneS68k() - (s68k_poll_adclk>>8);
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182 if (clkdiff <= POLL_CYCLES) {
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184 //printf("-- diff: %u, cnt = %i\n", clkdiff, s68k_poll_cnt);
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185 if (s68k_poll_cnt > POLL_LIMIT) {
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187 elprintf(EL_CDPOLL, "s68k poll detected @ %06x, a=%02x", SekPcS68k, a);
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189 s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;
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193 s68k_poll_adclk = (SekCyclesDoneS68k() << 8) | a;
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199 #define READ_FONT_DATA(basemask) \
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201 unsigned int fnt = *(unsigned int *)(Pico_mcd->s68k_regs + 0x4c); \
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202 unsigned int col0 = (fnt >> 8) & 0x0f, col1 = (fnt >> 12) & 0x0f; \
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203 if (fnt & (basemask << 0)) d = col1 ; else d = col0; \
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204 if (fnt & (basemask << 1)) d |= col1 << 4; else d |= col0 << 4; \
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205 if (fnt & (basemask << 2)) d |= col1 << 8; else d |= col0 << 8; \
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206 if (fnt & (basemask << 3)) d |= col1 << 12; else d |= col0 << 12; \
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210 #ifndef _ASM_CD_MEMORY_C
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213 u32 s68k_reg_read16(u32 a)
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219 return ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state
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221 d = (Pico_mcd->s68k_regs[2]<<8) | (Pico_mcd->s68k_regs[3]&0x1f);
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222 elprintf(EL_CDREG3, "s68k_regs r3: %02x @%06x", (u8)d, SekPcS68k);
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223 return s68k_poll_detect(a, d);
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225 return CDC_Read_Reg();
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227 return Read_CDC_Host(1); // Gens returns 0 here on byte reads
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229 d = Pico_mcd->m.timer_stopwatch >> 16;
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230 elprintf(EL_CDREGS, "s68k stopwatch timer read (%04x)", d);
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233 elprintf(EL_CDREGS, "s68k int3 timer read (%02x)", Pico_mcd->s68k_regs[31]);
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234 return Pico_mcd->s68k_regs[31];
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235 case 0x34: // fader
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236 return 0; // no busy bit
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237 case 0x50: // font data (check: Lunar 2, Silpheed)
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238 READ_FONT_DATA(0x00100000);
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241 READ_FONT_DATA(0x00010000);
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244 READ_FONT_DATA(0x10000000);
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247 READ_FONT_DATA(0x01000000);
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251 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
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253 if (a >= 0x0e && a < 0x30)
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254 return s68k_poll_detect(a, d);
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259 #ifndef _ASM_CD_MEMORY_C
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262 void s68k_reg_write8(u32 a, u32 d)
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264 // Warning: d might have upper bits set
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267 return; // only m68k can change WP
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269 int dold = Pico_mcd->s68k_regs[3];
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270 elprintf(EL_CDREG3, "s68k_regs w3: %02x @%06x", (u8)d, SekPcS68k);
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275 if ((d ^ dold) & 5) {
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276 d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit
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279 #ifdef _ASM_CD_MEMORY_C
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280 if ((d ^ dold) & 0x1d)
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281 PicoMemResetCDdecode(d);
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284 elprintf(EL_CDREG3, "wram mode 2M->1M");
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285 wram_2M_to_1M(Pico_mcd->word_ram2M);
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291 elprintf(EL_CDREG3, "wram mode 1M->2M");
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292 if (!(d&1)) { // it didn't set the ret bit, which means it doesn't want to give WRAM to m68k
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294 d |= (dold&1) ? 2 : 1; // then give it to the one which had bank0 in 1M mode
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296 wram_1M_to_2M(Pico_mcd->word_ram2M);
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299 // s68k can only set RET, writing 0 has no effect
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300 else if ((dold ^ d) & d & 1) { // RET being set
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301 SekEndRunS68k(20+16+10+12+16); // see DMNA case
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305 d &= ~2; // DMNA clears
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310 elprintf(EL_CDREGS, "s68k CDC dest: %x", d&7);
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311 Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode
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314 //dprintf("s68k CDC reg addr: %x", d&0xf);
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320 elprintf(EL_CDREGS, "s68k set CDC dma addr");
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324 elprintf(EL_CDREGS, "s68k set stopwatch timer");
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325 Pico_mcd->m.timer_stopwatch = 0;
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328 Pico_mcd->s68k_regs[0xf] = (d>>1) | (d<<7); // ror8 1, Gens note: Dragons lair
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331 elprintf(EL_CDREGS, "s68k set int3 timer: %02x", d);
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332 Pico_mcd->m.timer_int3 = (d & 0xff) << 16;
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334 case 0x33: // IRQ mask
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335 elprintf(EL_CDREGS, "s68k irq mask: %02x", d);
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336 if ((d&(1<<4)) && (Pico_mcd->s68k_regs[0x37]&4) && !(Pico_mcd->s68k_regs[0x33]&(1<<4))) {
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337 CDD_Export_Status();
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340 case 0x34: // fader
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341 Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;
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344 return; // d/m bit is unsetable
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346 u32 d_old = Pico_mcd->s68k_regs[0x37];
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347 Pico_mcd->s68k_regs[0x37] = d&7;
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348 if ((d&4) && !(d_old&4)) {
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349 CDD_Export_Status();
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354 Pico_mcd->s68k_regs[a] = (u8) d;
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355 CDD_Import_Command();
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359 if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))
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361 elprintf(EL_UIO, "s68k FIXME: invalid write @ %02x?", a);
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365 Pico_mcd->s68k_regs[a] = (u8) d;
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368 // -----------------------------------------------------------------
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370 // -----------------------------------------------------------------
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372 #ifndef _ASM_CD_MEMORY_C
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373 #include "cell_map.c"
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376 // WORD RAM, cell aranged area (220000 - 23ffff)
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377 static u32 PicoReadM68k8_cell(u32 a)
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379 int bank = Pico_mcd->s68k_regs[3] & 1;
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380 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged
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381 return Pico_mcd->word_ram1M[bank][a ^ 1];
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384 static u32 PicoReadM68k16_cell(u32 a)
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386 int bank = Pico_mcd->s68k_regs[3] & 1;
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387 a = (a&2) | (cell_map(a >> 2) << 2);
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388 return *(u16 *)(Pico_mcd->word_ram1M[bank] + a);
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391 static void PicoWriteM68k8_cell(u32 a, u32 d)
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393 int bank = Pico_mcd->s68k_regs[3] & 1;
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394 a = (a&3) | (cell_map(a >> 2) << 2);
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395 Pico_mcd->word_ram1M[bank][a ^ 1] = d;
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398 static void PicoWriteM68k16_cell(u32 a, u32 d)
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400 int bank = Pico_mcd->s68k_regs[3] & 1;
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401 a = (a&3) | (cell_map(a >> 2) << 2);
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402 *(u16 *)(Pico_mcd->word_ram1M[bank] + a) = d;
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405 // RAM cart (40000 - 7fffff, optional)
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406 static u32 PicoReadM68k8_ramc(u32 a)
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409 if (a == 0x400001) {
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410 if (SRam.data != NULL)
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415 if ((a & 0xfe0000) == 0x600000) {
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416 if (SRam.data != NULL)
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417 d = SRam.data[((a >> 1) & 0xffff) + 0x2000];
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422 return Pico_mcd->m.bcram_reg;
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424 elprintf(EL_UIO, "m68k unmapped r8 [%06x] @%06x", a, SekPc);
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428 static u32 PicoReadM68k16_ramc(u32 a)
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430 elprintf(EL_ANOMALY, "ramcart r16: [%06x] @%06x", a, SekPcS68k);
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431 return PicoReadM68k8_ramc(a + 1);
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434 static void PicoWriteM68k8_ramc(u32 a, u32 d)
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436 if ((a & 0xfe0000) == 0x600000) {
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437 if (SRam.data != NULL && (Pico_mcd->m.bcram_reg & 1)) {
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438 SRam.data[((a>>1) & 0xffff) + 0x2000] = d;
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444 if (a == 0x7fffff) {
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445 Pico_mcd->m.bcram_reg = d;
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449 elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
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452 static void PicoWriteM68k16_ramc(u32 a, u32 d)
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454 elprintf(EL_ANOMALY, "ramcart w16: [%06x] %04x @%06x", a, d, SekPcS68k);
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455 PicoWriteM68k8_ramc(a + 1, d);
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458 // IO/control/cd registers (a10000 - ...)
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459 static u32 PicoReadM68k8_io(u32 a)
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462 if ((a & 0xff00) == 0x2000) { // a12000 - a120ff
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463 d = m68k_reg_read16(a); // TODO: m68k_reg_read8
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467 elprintf(EL_CDREGS, "m68k_regs r8: [%02x] %02x @%06x", a & 0x3f, d, SekPc);
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471 // fallback to default MD handler
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472 return PicoRead8_io(a);
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475 static u32 PicoReadM68k16_io(u32 a)
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478 if ((a & 0xff00) == 0x2000) {
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479 d = m68k_reg_read16(a);
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480 elprintf(EL_CDREGS, "m68k_regs r16: [%02x] %04x @%06x", a & 0x3f, d, SekPc);
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484 return PicoRead16_io(a);
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487 static void PicoWriteM68k8_io(u32 a, u32 d)
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489 if ((a & 0xff00) == 0x2000) { // a12000 - a120ff
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490 elprintf(EL_CDREGS, "m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);
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491 m68k_reg_write8(a, d);
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495 PicoWrite16_io(a, d);
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498 static void PicoWriteM68k16_io(u32 a, u32 d)
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500 if ((a & 0xff00) == 0x2000) { // a12000 - a120ff
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501 elprintf(EL_CDREGS, "m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);
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503 if (a == 0xe) { // special case, 2 byte writes would be handled differently
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504 Pico_mcd->s68k_regs[0xe] = d >> 8;
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505 #ifdef USE_POLL_DETECT
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506 if ((s68k_poll_adclk&0xfe) == 0xe && s68k_poll_cnt > POLL_LIMIT) {
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507 SekSetStopS68k(0); s68k_poll_adclk = 0;
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508 elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);
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514 m68k_reg_write8(a, d >> 8);
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515 m68k_reg_write8(a + 1, d & 0xff);
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519 PicoWrite16_io(a, d);
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522 // -----------------------------------------------------------------
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524 // -----------------------------------------------------------------
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526 static u32 s68k_unmapped_read8(u32 a)
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528 elprintf(EL_UIO, "s68k unmapped r8 [%06x] @%06x", a, SekPc);
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532 static u32 s68k_unmapped_read16(u32 a)
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534 elprintf(EL_UIO, "s68k unmapped r16 [%06x] @%06x", a, SekPc);
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538 static void s68k_unmapped_write8(u32 a, u32 d)
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540 elprintf(EL_UIO, "s68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
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543 static void s68k_unmapped_write16(u32 a, u32 d)
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545 elprintf(EL_UIO, "s68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
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548 // decode (080000 - 0bffff, in 1M mode)
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549 static u32 PicoReadS68k8_dec(u32 a)
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552 bank = (Pico_mcd->s68k_regs[3] & 1) ^ 1;
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553 d = Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff];
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561 static u32 PicoReadS68k16_dec(u32 a)
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564 bank = (Pico_mcd->s68k_regs[3] & 1) ^ 1;
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565 d = Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff];
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571 /* check: jaguar xj 220 (draws entire world using decode) */
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572 static void PicoWriteS68k8_dec(u32 a, u32 d)
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574 u8 r3 = Pico_mcd->s68k_regs[3];
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575 u8 *pd = &Pico_mcd->word_ram1M[(r3 & 1) ^ 1][((a >> 1) ^ 1) & 0x1ffff];
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576 u8 oldmask = (a & 1) ? 0xf0 : 0x0f;
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584 if ((!(*pd & (~oldmask))) && d)
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586 } else if (r3 > 8) {
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595 *pd = d | (*pd & oldmask);
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598 static void PicoWriteS68k16_dec(u32 a, u32 d)
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600 u8 r3 = Pico_mcd->s68k_regs[3];
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601 u8 *pd = &Pico_mcd->word_ram1M[(r3 & 1) ^ 1][((a >> 1) ^ 1) & 0x1ffff];
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603 //if ((a & 0x3ffff) < 0x28000) return;
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611 if (!(dold & 0xf0)) dold |= d & 0xf0;
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612 if (!(dold & 0x0f)) dold |= d & 0x0f;
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614 } else if (r3 > 8) {
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616 if (!(d & 0xf0)) d |= dold & 0xf0;
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617 if (!(d & 0x0f)) d |= dold & 0x0f;
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624 // backup RAM (fe0000 - feffff)
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625 static u32 PicoReadS68k8_bram(u32 a)
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627 return Pico_mcd->bram[(a>>1)&0x1fff];
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630 static u32 PicoReadS68k16_bram(u32 a)
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633 elprintf(EL_ANOMALY, "FIXME: s68k_bram r16: [%06x] @%06x", a, SekPcS68k);
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634 a = (a >> 1) & 0x1fff;
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635 d = Pico_mcd->bram[a++];
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636 d|= Pico_mcd->bram[a++] << 8; // probably wrong, TODO: verify
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640 static void PicoWriteS68k8_bram(u32 a, u32 d)
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642 Pico_mcd->bram[(a >> 1) & 0x1fff] = d;
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646 static void PicoWriteS68k16_bram(u32 a, u32 d)
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648 elprintf(EL_ANOMALY, "s68k_bram w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
649 a = (a >> 1) & 0x1fff;
\r
650 Pico_mcd->bram[a++] = d;
\r
651 Pico_mcd->bram[a++] = d >> 8; // TODO: verify..
\r
655 // PCM and registers (ff0000 - ffffff)
\r
656 static u32 PicoReadS68k8_pr(u32 a)
\r
661 if ((a & 0xfe00) == 0x8000) {
\r
663 elprintf(EL_CDREGS, "s68k_regs r8: [%02x] @ %06x", a, SekPcS68k);
\r
664 if (a >= 0x0e && a < 0x30) {
\r
665 d = Pico_mcd->s68k_regs[a];
\r
666 s68k_poll_detect(a, d);
\r
667 elprintf(EL_CDREGS, "ret = %02x", (u8)d);
\r
670 else if (a >= 0x58 && a < 0x68)
\r
671 d = gfx_cd_read(a & ~1);
\r
672 else d = s68k_reg_read16(a & ~1);
\r
675 elprintf(EL_CDREGS, "ret = %02x", (u8)d);
\r
680 if ((a & 0x8000) == 0x0000) {
\r
683 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a >> 1) & 0xfff];
\r
684 else if (a >= 0x20) {
\r
686 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
693 return s68k_unmapped_read8(a);
\r
696 static u32 PicoReadS68k16_pr(u32 a)
\r
701 if ((a & 0xfe00) == 0x8000) {
\r
703 elprintf(EL_CDREGS, "s68k_regs r16: [%02x] @ %06x", a, SekPcS68k);
\r
704 if (0x58 <= a && a < 0x68)
\r
705 d = gfx_cd_read(a);
\r
706 else d = s68k_reg_read16(a);
\r
707 elprintf(EL_CDREGS, "ret = %04x", d);
\r
712 if ((a & 0x8000) == 0x0000) {
\r
713 //elprintf(EL_ANOMALY, "FIXME: s68k_pcm r16: [%06x] @%06x", a, SekPcS68k);
\r
716 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];
\r
717 else if (a >= 0x20) {
\r
719 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
720 if (a & 2) d >>= 8;
\r
722 elprintf(EL_CDREGS, "ret = %04x", d);
\r
726 return s68k_unmapped_read16(a);
\r
729 static void PicoWriteS68k8_pr(u32 a, u32 d)
\r
732 if ((a & 0xfe00) == 0x8000) {
\r
734 elprintf(EL_CDREGS, "s68k_regs w8: [%02x] %02x @ %06x", a, d, SekPcS68k);
\r
735 if (0x58 <= a && a < 0x68)
\r
736 gfx_cd_write16(a&~1, (d<<8)|d);
\r
737 else s68k_reg_write8(a,d);
\r
742 if ((a & 0x8000) == 0x0000) {
\r
745 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
\r
747 pcm_write(a>>1, d);
\r
751 s68k_unmapped_write8(a, d);
\r
754 static void PicoWriteS68k16_pr(u32 a, u32 d)
\r
757 if ((a & 0xfe00) == 0x8000) {
\r
759 elprintf(EL_CDREGS, "s68k_regs w16: [%02x] %04x @ %06x", a, d, SekPcS68k);
\r
760 if (a >= 0x58 && a < 0x68)
\r
761 gfx_cd_write16(a, d);
\r
764 // special case, 2 byte writes would be handled differently
\r
766 Pico_mcd->s68k_regs[0xf] = d;
\r
769 s68k_reg_write8(a, d >> 8);
\r
770 s68k_reg_write8(a + 1, d & 0xff);
\r
776 if ((a & 0x8000) == 0x0000) {
\r
779 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
\r
781 pcm_write(a>>1, d & 0xff);
\r
785 s68k_unmapped_write16(a, d);
\r
788 // -----------------------------------------------------------------
\r
791 static __inline int PicoMemBaseM68k(u32 pc)
\r
793 if ((pc&0xe00000)==0xe00000)
\r
794 return (int)Pico.ram-(pc&0xff0000); // Program Counter in Ram
\r
797 return (int)Pico_mcd->bios; // Program Counter in BIOS
\r
799 if ((pc&0xfc0000)==0x200000)
\r
801 if (!(Pico_mcd->s68k_regs[3]&4))
\r
802 return (int)Pico_mcd->word_ram2M - 0x200000; // Program Counter in Word Ram
\r
803 if (pc < 0x220000) {
\r
804 int bank = Pico_mcd->s68k_regs[3]&1;
\r
805 return (int)Pico_mcd->word_ram1M[bank] - 0x200000;
\r
809 // Error - Program Counter is invalid
\r
810 elprintf(EL_ANOMALY, "m68k FIXME: unhandled jump to %06x", pc);
\r
812 return (int)Pico_mcd->bios;
\r
816 static u32 PicoCheckPcM68k(u32 pc)
\r
818 pc-=PicoCpuCM68k.membase; // Get real pc
\r
821 PicoCpuCM68k.membase=PicoMemBaseM68k(pc);
\r
823 return PicoCpuCM68k.membase+pc;
\r
827 static __inline int PicoMemBaseS68k(u32 pc)
\r
829 if (pc < 0x80000) // PRG RAM
\r
830 return (int)Pico_mcd->prg_ram;
\r
832 if ((pc&0xfc0000)==0x080000) // WORD RAM 2M area (assume we are in the right mode..)
\r
833 return (int)Pico_mcd->word_ram2M - 0x080000;
\r
835 if ((pc&0xfe0000)==0x0c0000) { // word RAM 1M area
\r
836 int bank = (Pico_mcd->s68k_regs[3]&1)^1;
\r
837 return (int)Pico_mcd->word_ram1M[bank] - 0x0c0000;
\r
840 // Error - Program Counter is invalid
\r
841 elprintf(EL_ANOMALY, "s68k FIXME: unhandled jump to %06x", pc);
\r
843 return (int)Pico_mcd->prg_ram;
\r
847 static u32 PicoCheckPcS68k(u32 pc)
\r
849 pc-=PicoCpuCS68k.membase; // Get real pc
\r
852 PicoCpuCS68k.membase=PicoMemBaseS68k(pc);
\r
854 return PicoCpuCS68k.membase+pc;
\r
858 // TODO: probably split
\r
859 void PicoMemRemapCD(int r3)
\r
864 if (Pico_mcd->m.busreq & 2) {
\r
865 bank = Pico_mcd->prg_ram_b[Pico_mcd->s68k_regs[3] >> 6];
\r
866 cpu68k_map_all_ram(0x020000, 0x03ffff, bank, 0);
\r
869 m68k_map_unmap(0x020000, 0x03ffff);
\r
874 // 2M mode. XXX: allowing access in all cases for simplicity
\r
875 bank = Pico_mcd->word_ram2M;
\r
876 cpu68k_map_all_ram(0x200000, 0x23ffff, bank, 0);
\r
877 cpu68k_map_all_ram(0x080000, 0x0bffff, bank, 1);
\r
878 // TODO: handle 0x0c0000
\r
881 bank = Pico_mcd->word_ram1M[r3 & 1];
\r
882 cpu68k_map_all_ram(0x200000, 0x21ffff, bank, 0);
\r
883 bank = Pico_mcd->word_ram1M[(r3 & 1) ^ 1];
\r
884 cpu68k_map_all_ram(0x0c0000, 0x0effff, bank, 1);
\r
885 // "cell arrange" on m68k
\r
886 cpu68k_map_set(m68k_read8_map, 0x220000, 0x23ffff, PicoReadM68k8_cell, 1);
\r
887 cpu68k_map_set(m68k_read16_map, 0x220000, 0x23ffff, PicoReadM68k16_cell, 1);
\r
888 cpu68k_map_set(m68k_write8_map, 0x220000, 0x23ffff, PicoWriteM68k8_cell, 1);
\r
889 cpu68k_map_set(m68k_write16_map, 0x220000, 0x23ffff, PicoWriteM68k16_cell, 1);
\r
890 // "decode format" on s68k
\r
891 cpu68k_map_set(s68k_read8_map, 0x080000, 0x0bffff, PicoReadS68k8_dec, 1);
\r
892 cpu68k_map_set(s68k_read16_map, 0x080000, 0x0bffff, PicoReadS68k16_dec, 1);
\r
893 cpu68k_map_set(s68k_write8_map, 0x080000, 0x0bffff, PicoWriteS68k8_dec, 1);
\r
894 cpu68k_map_set(s68k_write16_map, 0x080000, 0x0bffff, PicoWriteS68k16_dec, 1);
\r
898 // update fetchmap..
\r
902 for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x240000; i++)
\r
903 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram2M - 0x200000;
\r
907 for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x220000; i++)
\r
908 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram1M[r3 & 1] - 0x200000;
\r
909 for (i = M68K_FETCHBANK1*0x0c/0x100; (i<<(24-FAMEC_FETCHBITS)) < 0x0e0000; i++)
\r
910 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram1M[(r3&1)^1] - 0x0c0000;
\r
916 static void m68k_mem_setup_cd(void);
\r
919 PICO_INTERNAL void PicoMemSetupCD(void)
\r
921 // setup default main68k map
\r
924 // PicoMemRemapCD() will set up RAMs, so not done here
\r
926 // main68k map (BIOS mapped by PicoMemSetup()):
\r
928 if (PicoOpt & POPT_EN_MCD_RAMCART) {
\r
929 cpu68k_map_set(m68k_read8_map, 0x400000, 0x7fffff, PicoReadM68k8_ramc, 1);
\r
930 cpu68k_map_set(m68k_read16_map, 0x400000, 0x7fffff, PicoReadM68k16_ramc, 1);
\r
931 cpu68k_map_set(m68k_write8_map, 0x400000, 0x7fffff, PicoWriteM68k8_ramc, 1);
\r
932 cpu68k_map_set(m68k_write16_map, 0x400000, 0x7fffff, PicoWriteM68k16_ramc, 1);
\r
936 cpu68k_map_set(m68k_read8_map, 0xa10000, 0xa1ffff, PicoReadM68k8_io, 1);
\r
937 cpu68k_map_set(m68k_read16_map, 0xa10000, 0xa1ffff, PicoReadM68k16_io, 1);
\r
938 cpu68k_map_set(m68k_write8_map, 0xa10000, 0xa1ffff, PicoWriteM68k8_io, 1);
\r
939 cpu68k_map_set(m68k_write16_map, 0xa10000, 0xa1ffff, PicoWriteM68k16_io, 1);
\r
942 cpu68k_map_set(s68k_read8_map, 0x000000, 0xffffff, s68k_unmapped_read8, 1);
\r
943 cpu68k_map_set(s68k_read16_map, 0x000000, 0xffffff, s68k_unmapped_read16, 1);
\r
944 cpu68k_map_set(s68k_write8_map, 0x000000, 0xffffff, s68k_unmapped_write8, 1);
\r
945 cpu68k_map_set(s68k_write16_map, 0x000000, 0xffffff, s68k_unmapped_write16, 1);
\r
948 cpu68k_map_set(s68k_read8_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);
\r
949 cpu68k_map_set(s68k_read16_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);
\r
950 cpu68k_map_set(s68k_write8_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);
\r
951 cpu68k_map_set(s68k_write16_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);
\r
954 cpu68k_map_set(s68k_read8_map, 0xfe0000, 0xfeffff, PicoReadS68k8_bram, 1);
\r
955 cpu68k_map_set(s68k_read16_map, 0xfe0000, 0xfeffff, PicoReadS68k16_bram, 1);
\r
956 cpu68k_map_set(s68k_write8_map, 0xfe0000, 0xfeffff, PicoWriteS68k8_bram, 1);
\r
957 cpu68k_map_set(s68k_write16_map, 0xfe0000, 0xfeffff, PicoWriteS68k16_bram, 1);
\r
960 cpu68k_map_set(s68k_read8_map, 0xff0000, 0xffffff, PicoReadS68k8_pr, 1);
\r
961 cpu68k_map_set(s68k_read16_map, 0xff0000, 0xffffff, PicoReadS68k16_pr, 1);
\r
962 cpu68k_map_set(s68k_write8_map, 0xff0000, 0xffffff, PicoWriteS68k8_pr, 1);
\r
963 cpu68k_map_set(s68k_write16_map, 0xff0000, 0xffffff, PicoWriteS68k16_pr, 1);
\r
966 PicoCpuCM68k.checkpc = PicoCheckPcM68k;
\r
968 PicoCpuCS68k.checkpc = PicoCheckPcS68k;
\r
969 PicoCpuCS68k.fetch8 = PicoCpuCS68k.read8 = s68k_read8;
\r
970 PicoCpuCS68k.fetch16 = PicoCpuCS68k.read16 = s68k_read16;
\r
971 PicoCpuCS68k.fetch32 = PicoCpuCS68k.read32 = s68k_read32;
\r
972 PicoCpuCS68k.write8 = s68k_write8;
\r
973 PicoCpuCS68k.write16 = s68k_write16;
\r
974 PicoCpuCS68k.write32 = s68k_write32;
\r
978 PicoCpuFS68k.read_byte = s68k_read8;
\r
979 PicoCpuFS68k.read_word = s68k_read16;
\r
980 PicoCpuFS68k.read_long = s68k_read32;
\r
981 PicoCpuFS68k.write_byte = s68k_write8;
\r
982 PicoCpuFS68k.write_word = s68k_write16;
\r
983 PicoCpuFS68k.write_long = s68k_write32;
\r
985 // setup FAME fetchmap
\r
989 // by default, point everything to fitst 64k of ROM (BIOS)
\r
990 for (i = 0; i < M68K_FETCHBANK1; i++)
\r
991 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom - (i<<(24-FAMEC_FETCHBITS));
\r
992 // now real ROM (BIOS)
\r
993 for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)
\r
994 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom;
\r
996 for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)
\r
997 PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.ram - (i<<(24-FAMEC_FETCHBITS));
\r
999 // PRG RAM is default
\r
1000 for (i = 0; i < M68K_FETCHBANK1; i++)
\r
1001 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->prg_ram - (i<<(24-FAMEC_FETCHBITS));
\r
1003 for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0x80000; i++)
\r
1004 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->prg_ram;
\r
1005 // WORD RAM 2M area
\r
1006 for (i = M68K_FETCHBANK1*0x08/0x100; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0xc0000; i++)
\r
1007 PicoCpuFS68k.Fetch[i] = (unsigned int)Pico_mcd->word_ram2M - 0x80000;
\r
1008 // PicoMemRemapCD() will setup word ram for both
\r
1012 m68k_mem_setup_cd();
\r
1015 // m68k_poll_addr = m68k_poll_cnt = 0;
\r
1016 s68k_poll_adclk = s68k_poll_cnt = 0;
\r
1021 u32 m68k_read8(u32 a);
\r
1022 u32 m68k_read16(u32 a);
\r
1023 u32 m68k_read32(u32 a);
\r
1024 void m68k_write8(u32 a, u8 d);
\r
1025 void m68k_write16(u32 a, u16 d);
\r
1026 void m68k_write32(u32 a, u32 d);
\r
1028 static unsigned int PicoReadCD8w (unsigned int a) {
\r
1029 return m68ki_cpu_p == &PicoCpuMS68k ? s68k_read8(a) : m68k_read8(a);
\r
1031 static unsigned int PicoReadCD16w(unsigned int a) {
\r
1032 return m68ki_cpu_p == &PicoCpuMS68k ? s68k_read16(a) : m68k_read16(a);
\r
1034 static unsigned int PicoReadCD32w(unsigned int a) {
\r
1035 return m68ki_cpu_p == &PicoCpuMS68k ? s68k_read32(a) : m68k_read32(a);
\r
1037 static void PicoWriteCD8w (unsigned int a, unsigned char d) {
\r
1038 if (m68ki_cpu_p == &PicoCpuMS68k) s68k_write8(a, d); else m68k_write8(a, d);
\r
1040 static void PicoWriteCD16w(unsigned int a, unsigned short d) {
\r
1041 if (m68ki_cpu_p == &PicoCpuMS68k) s68k_write16(a, d); else m68k_write16(a, d);
\r
1043 static void PicoWriteCD32w(unsigned int a, unsigned int d) {
\r
1044 if (m68ki_cpu_p == &PicoCpuMS68k) s68k_write32(a, d); else m68k_write32(a, d);
\r
1047 extern unsigned int (*pm68k_read_memory_8) (unsigned int address);
\r
1048 extern unsigned int (*pm68k_read_memory_16)(unsigned int address);
\r
1049 extern unsigned int (*pm68k_read_memory_32)(unsigned int address);
\r
1050 extern void (*pm68k_write_memory_8) (unsigned int address, unsigned char value);
\r
1051 extern void (*pm68k_write_memory_16)(unsigned int address, unsigned short value);
\r
1052 extern void (*pm68k_write_memory_32)(unsigned int address, unsigned int value);
\r
1054 static void m68k_mem_setup_cd(void)
\r
1056 pm68k_read_memory_8 = PicoReadCD8w;
\r
1057 pm68k_read_memory_16 = PicoReadCD16w;
\r
1058 pm68k_read_memory_32 = PicoReadCD32w;
\r
1059 pm68k_write_memory_8 = PicoWriteCD8w;
\r
1060 pm68k_write_memory_16 = PicoWriteCD16w;
\r
1061 pm68k_write_memory_32 = PicoWriteCD32w;
\r
1063 #endif // EMU_M68K
\r