2 * Memory I/O handlers for Sega/Mega CD.
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3 * (C) notaz, 2007-2009
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5 * This work is licensed under the terms of MAME license.
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6 * See COPYING file in the top-level directory.
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9 #include "../pico_int.h"
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10 #include "../memory.h"
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15 uptr s68k_read8_map [0x1000000 >> M68K_MEM_SHIFT];
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16 uptr s68k_read16_map [0x1000000 >> M68K_MEM_SHIFT];
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17 uptr s68k_write8_map [0x1000000 >> M68K_MEM_SHIFT];
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18 uptr s68k_write16_map[0x1000000 >> M68K_MEM_SHIFT];
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20 MAKE_68K_READ8(s68k_read8, s68k_read8_map)
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21 MAKE_68K_READ16(s68k_read16, s68k_read16_map)
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22 MAKE_68K_READ32(s68k_read32, s68k_read16_map)
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23 MAKE_68K_WRITE8(s68k_write8, s68k_write8_map)
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24 MAKE_68K_WRITE16(s68k_write16, s68k_write16_map)
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25 MAKE_68K_WRITE32(s68k_write32, s68k_write16_map)
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27 // -----------------------------------------------------------------
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29 // provided by ASM code:
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30 #ifdef _ASM_CD_MEMORY_C
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31 u32 PicoReadM68k8_io(u32 a);
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32 u32 PicoReadM68k16_io(u32 a);
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33 void PicoWriteM68k8_io(u32 a, u32 d);
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34 void PicoWriteM68k16_io(u32 a, u32 d);
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36 u32 PicoReadS68k8_pr(u32 a);
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37 u32 PicoReadS68k16_pr(u32 a);
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38 void PicoWriteS68k8_pr(u32 a, u32 d);
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39 void PicoWriteS68k16_pr(u32 a, u32 d);
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41 u32 PicoReadM68k8_cell0(u32 a);
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42 u32 PicoReadM68k8_cell1(u32 a);
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43 u32 PicoReadM68k16_cell0(u32 a);
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44 u32 PicoReadM68k16_cell1(u32 a);
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45 void PicoWriteM68k8_cell0(u32 a, u32 d);
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46 void PicoWriteM68k8_cell1(u32 a, u32 d);
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47 void PicoWriteM68k16_cell0(u32 a, u32 d);
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48 void PicoWriteM68k16_cell1(u32 a, u32 d);
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50 u32 PicoReadS68k8_dec0(u32 a);
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51 u32 PicoReadS68k8_dec1(u32 a);
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52 u32 PicoReadS68k16_dec0(u32 a);
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53 u32 PicoReadS68k16_dec1(u32 a);
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54 void PicoWriteS68k8_dec_m0b0(u32 a, u32 d);
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55 void PicoWriteS68k8_dec_m1b0(u32 a, u32 d);
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56 void PicoWriteS68k8_dec_m2b0(u32 a, u32 d);
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57 void PicoWriteS68k8_dec_m0b1(u32 a, u32 d);
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58 void PicoWriteS68k8_dec_m1b1(u32 a, u32 d);
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59 void PicoWriteS68k8_dec_m2b1(u32 a, u32 d);
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60 void PicoWriteS68k16_dec_m0b0(u32 a, u32 d);
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61 void PicoWriteS68k16_dec_m1b0(u32 a, u32 d);
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62 void PicoWriteS68k16_dec_m2b0(u32 a, u32 d);
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63 void PicoWriteS68k16_dec_m0b1(u32 a, u32 d);
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64 void PicoWriteS68k16_dec_m1b1(u32 a, u32 d);
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65 void PicoWriteS68k16_dec_m2b1(u32 a, u32 d);
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68 static void remap_prg_window(int r3);
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69 static void remap_word_ram(int r3);
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72 #define POLL_LIMIT 16
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73 #define POLL_CYCLES 124
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75 u32 m68k_comm_check(u32 a, u32 d)
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77 pcd_sync_s68k(SekCyclesDone(), 0);
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78 if (a != Pico_mcd->m.m68k_poll_a) {
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79 Pico_mcd->m.m68k_poll_a = a;
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80 Pico_mcd->m.m68k_poll_cnt = 0;
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83 Pico_mcd->m.m68k_poll_cnt++;
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87 #ifndef _ASM_CD_MEMORY_C
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88 static u32 m68k_reg_read16(u32 a)
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95 d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens
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98 d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);
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99 elprintf(EL_CDREG3, "m68k_regs r3: %02x @%06x", (u8)d, SekPc);
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102 d = Pico_mcd->s68k_regs[4]<<8;
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105 d = *(u16 *)(Pico_mcd->bios + 0x72);
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108 d = Read_CDC_Host(0);
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111 elprintf(EL_UIO, "m68k FIXME: reserved read");
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113 case 0xC: // 384 cycle stopwatch timer
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115 d = pcd_cycles_m68k_to_s68k(SekCyclesDone());
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116 d = (d - Pico_mcd->m.stopwatch_base_c) / 384;
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118 elprintf(EL_CDREGS, "m68k stopwatch timer read (%04x)", d);
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123 // comm flag/cmd/status (0xE-0x2F)
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124 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
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128 elprintf(EL_UIO, "m68k_regs FIXME invalid read @ %02x", a);
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134 return m68k_comm_check(a, d);
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138 #ifndef _ASM_CD_MEMORY_C
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141 void m68k_reg_write8(u32 a, u32 d)
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146 Pico_mcd->m.m68k_poll_a =
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147 Pico_mcd->m.m68k_poll_cnt = 0;
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152 if (d && (Pico_mcd->s68k_regs[0x33] & PCDS_IEN2)) {
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153 elprintf(EL_INTS, "m68k: s68k irq 2");
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154 pcd_sync_s68k(SekCyclesDone(), 0);
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155 SekInterruptS68k(2);
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160 elprintf(EL_CDREGS, "d m.busreq %u %u", d, Pico_mcd->m.busreq);
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161 if (d == Pico_mcd->m.busreq)
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163 pcd_sync_s68k(SekCyclesDone(), 0);
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165 if ((Pico_mcd->m.busreq ^ d) & 1) {
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166 elprintf(EL_INTSW, "m68k: s68k reset %i", !(d&1));
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168 d |= 2; // verified: reset also gives bus
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170 elprintf(EL_CDREGS, "m68k: resetting s68k");
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174 if ((Pico_mcd->m.busreq ^ d) & 2) {
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175 elprintf(EL_INTSW, "m68k: s68k brq %i", d >> 1);
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176 remap_prg_window(Pico_mcd->s68k_regs[3]);
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178 Pico_mcd->m.busreq = d;
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181 elprintf(EL_CDREGS, "m68k: prg wp=%02x", d);
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182 Pico_mcd->s68k_regs[2] = d; // really use s68k side register
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185 dold = Pico_mcd->s68k_regs[3];
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186 elprintf(EL_CDREG3, "m68k_regs w3: %02x @%06x", (u8)d, SekPc);
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187 //if ((Pico_mcd->s68k_regs[3]&4) != (d&4)) dprintf("m68k: ram mode %i mbit", (d&4) ? 1 : 2);
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188 //if ((Pico_mcd->s68k_regs[3]&2) != (d&2)) dprintf("m68k: %s", (d&4) ? ((d&2) ? "word swap req" : "noop?") :
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189 // ((d&2) ? "word ram to s68k" : "word ram to m68k"));
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190 if (dold & 4) { // 1M mode
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191 d ^= 2; // writing 0 to DMNA actually sets it, 1 does nothing
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193 if ((d ^ dold) & d & 2) { // DMNA is being set
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194 dold &= ~1; // return word RAM to s68k
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195 /* Silpheed hack: bset(w3), r3, btst, bne, r3 */
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196 SekEndRun(20+16+10+12+16);
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199 d = (d & 0xc2) | (dold & 0x1f);
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200 if ((d ^ dold) & 0xc0) {
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201 elprintf(EL_CDREGS, "m68k: prg bank: %i -> %i",
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202 (Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));
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203 remap_prg_window(d);
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207 Pico_mcd->bios[0x72 + 1] = d; // simple hint vector changer
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210 Pico_mcd->bios[0x72] = d;
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211 elprintf(EL_CDREGS, "hint vector set to %04x%04x",
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212 ((u16 *)Pico_mcd->bios)[0x70/2], ((u16 *)Pico_mcd->bios)[0x72/2]);
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215 d = (d << 1) | ((d >> 7) & 1); // rol8 1 (special case)
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221 if ((a&0xf0) == 0x10)
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224 elprintf(EL_UIO, "m68k FIXME: invalid write? [%02x] %02x", a, d);
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228 if (d == Pico_mcd->s68k_regs[a])
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231 Pico_mcd->s68k_regs[a] = d;
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232 pcd_sync_s68k(SekCyclesDone(), 0);
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233 if (Pico_mcd->m.s68k_poll_a == a && Pico_mcd->m.s68k_poll_cnt > POLL_LIMIT) {
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235 Pico_mcd->m.s68k_poll_a = 0;
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236 elprintf(EL_CDPOLL, "s68k poll release, a=%02x", a);
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240 #ifndef _ASM_CD_MEMORY_C
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243 u32 s68k_poll_detect(u32 a, u32 d)
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245 #ifdef USE_POLL_DETECT
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246 u32 cycles, cnt = 0;
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247 if (SekIsStoppedS68k())
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250 cycles = SekCyclesDoneS68k();
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251 if (a == Pico_mcd->m.s68k_poll_a) {
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252 u32 clkdiff = cycles - Pico_mcd->m.s68k_poll_clk;
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253 if (clkdiff <= POLL_CYCLES) {
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254 cnt = Pico_mcd->m.s68k_poll_cnt + 1;
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255 //printf("-- diff: %u, cnt = %i\n", clkdiff, cnt);
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256 if (Pico_mcd->m.s68k_poll_cnt > POLL_LIMIT) {
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258 elprintf(EL_CDPOLL, "s68k poll detected @ %06x, a=%02x",
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263 Pico_mcd->m.s68k_poll_a = a;
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264 Pico_mcd->m.s68k_poll_clk = cycles;
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265 Pico_mcd->m.s68k_poll_cnt = cnt;
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270 #define READ_FONT_DATA(basemask) \
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272 unsigned int fnt = *(unsigned int *)(Pico_mcd->s68k_regs + 0x4c); \
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273 unsigned int col0 = (fnt >> 8) & 0x0f, col1 = (fnt >> 12) & 0x0f; \
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274 if (fnt & (basemask << 0)) d = col1 ; else d = col0; \
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275 if (fnt & (basemask << 1)) d |= col1 << 4; else d |= col0 << 4; \
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276 if (fnt & (basemask << 2)) d |= col1 << 8; else d |= col0 << 8; \
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277 if (fnt & (basemask << 3)) d |= col1 << 12; else d |= col0 << 12; \
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281 #ifndef _ASM_CD_MEMORY_C
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284 u32 s68k_reg_read16(u32 a)
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290 return ((Pico_mcd->s68k_regs[0]&3)<<8) | 1; // ver = 0, not in reset state
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292 d = (Pico_mcd->s68k_regs[2]<<8) | (Pico_mcd->s68k_regs[3]&0x1f);
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293 elprintf(EL_CDREG3, "s68k_regs r3: %02x @%06x", (u8)d, SekPcS68k);
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294 return s68k_poll_detect(a, d);
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296 return CDC_Read_Reg();
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298 return Read_CDC_Host(1); // Gens returns 0 here on byte reads
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300 d = SekCyclesDoneS68k() - Pico_mcd->m.stopwatch_base_c;
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303 elprintf(EL_CDREGS, "s68k stopwatch timer read (%04x)", d);
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306 elprintf(EL_CDREGS, "s68k int3 timer read (%02x)", Pico_mcd->s68k_regs[31]);
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307 return Pico_mcd->s68k_regs[31];
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308 case 0x34: // fader
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309 return 0; // no busy bit
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310 case 0x50: // font data (check: Lunar 2, Silpheed)
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311 READ_FONT_DATA(0x00100000);
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314 READ_FONT_DATA(0x00010000);
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317 READ_FONT_DATA(0x10000000);
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320 READ_FONT_DATA(0x01000000);
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324 d = (Pico_mcd->s68k_regs[a]<<8) | Pico_mcd->s68k_regs[a+1];
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326 if (a >= 0x0e && a < 0x30)
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327 return s68k_poll_detect(a, d);
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332 #ifndef _ASM_CD_MEMORY_C
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335 void s68k_reg_write8(u32 a, u32 d)
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337 // Warning: d might have upper bits set
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340 return; // only m68k can change WP
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342 int dold = Pico_mcd->s68k_regs[3];
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343 elprintf(EL_CDREG3, "s68k_regs w3: %02x @%06x", (u8)d, SekPcS68k);
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348 if ((d ^ dold) & 0x1d) {
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349 d &= ~2; // in case of mode or bank change we clear DMNA (m68k req) bit
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353 elprintf(EL_CDREG3, "wram mode 2M->1M");
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354 wram_2M_to_1M(Pico_mcd->word_ram2M);
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360 elprintf(EL_CDREG3, "wram mode 1M->2M");
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361 if (!(d&1)) { // it didn't set the ret bit, which means it doesn't want to give WRAM to m68k
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363 d |= (dold&1) ? 2 : 1; // then give it to the one which had bank0 in 1M mode
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365 wram_1M_to_2M(Pico_mcd->word_ram2M);
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368 // s68k can only set RET, writing 0 has no effect
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369 else if ((dold ^ d) & d & 1) { // RET being set
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370 SekEndRunS68k(20+16+10+12+16); // see DMNA case
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374 d &= ~2; // DMNA clears
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379 elprintf(EL_CDREGS, "s68k CDC dest: %x", d&7);
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380 Pico_mcd->s68k_regs[4] = (Pico_mcd->s68k_regs[4]&0xC0) | (d&7); // CDC mode
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383 //dprintf("s68k CDC reg addr: %x", d&0xf);
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389 elprintf(EL_CDREGS, "s68k set CDC dma addr");
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392 case 0xd: // 384 cycle stopwatch timer
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393 elprintf(EL_CDREGS|EL_CD, "s68k clear stopwatch (%x)", d);
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394 // does this also reset internal 384 cycle counter?
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395 Pico_mcd->m.stopwatch_base_c = SekCyclesDoneS68k();
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399 d = (d>>1) | (d<<7); // ror8 1, Gens note: Dragons lair
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403 case 0x31: // 384 cycle int3 timer
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405 elprintf(EL_CDREGS|EL_CD, "s68k set int3 timer: %02x", d);
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406 Pico_mcd->s68k_regs[a] = (u8) d;
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407 if (d) // d or d+1??
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408 pcd_event_schedule_s68k(PCD_EVENT_TIMER3, d * 384);
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410 pcd_event_schedule(0, PCD_EVENT_TIMER3, 0);
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412 case 0x33: // IRQ mask
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413 elprintf(EL_CDREGS|EL_CD, "s68k irq mask: %02x", d);
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415 if ((d ^ Pico_mcd->s68k_regs[0x33]) & d & PCDS_IEN4) {
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416 if (Pico_mcd->s68k_regs[0x37] & 4)
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417 CDD_Export_Status();
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420 case 0x34: // fader
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421 Pico_mcd->s68k_regs[a] = (u8) d & 0x7f;
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424 return; // d/m bit is unsetable
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426 u32 d_old = Pico_mcd->s68k_regs[0x37];
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427 Pico_mcd->s68k_regs[0x37] = d&7;
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428 if ((d&4) && !(d_old&4)) {
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429 CDD_Export_Status();
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434 Pico_mcd->s68k_regs[a] = (u8) d;
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435 CDD_Import_Command();
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439 if ((a&0x1f0) == 0x20)
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442 if ((a&0x1f0) == 0x10 || (a >= 0x38 && a < 0x42))
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444 elprintf(EL_UIO, "s68k FIXME: invalid write @ %02x?", a);
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448 Pico_mcd->s68k_regs[a] = (u8) d;
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452 Pico_mcd->s68k_regs[a] = (u8) d;
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453 if (Pico_mcd->m.m68k_poll_cnt)
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455 Pico_mcd->m.m68k_poll_cnt = 0;
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458 // -----------------------------------------------------------------
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460 // -----------------------------------------------------------------
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462 #ifndef _ASM_CD_MEMORY_C
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463 #include "cell_map.c"
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465 // WORD RAM, cell aranged area (220000 - 23ffff)
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466 static u32 PicoReadM68k8_cell0(u32 a)
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468 a = (a&3) | (cell_map(a >> 2) << 2); // cell arranged
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469 return Pico_mcd->word_ram1M[0][a ^ 1];
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472 static u32 PicoReadM68k8_cell1(u32 a)
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474 a = (a&3) | (cell_map(a >> 2) << 2);
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475 return Pico_mcd->word_ram1M[1][a ^ 1];
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478 static u32 PicoReadM68k16_cell0(u32 a)
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480 a = (a&2) | (cell_map(a >> 2) << 2);
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481 return *(u16 *)(Pico_mcd->word_ram1M[0] + a);
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484 static u32 PicoReadM68k16_cell1(u32 a)
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486 a = (a&2) | (cell_map(a >> 2) << 2);
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487 return *(u16 *)(Pico_mcd->word_ram1M[1] + a);
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490 static void PicoWriteM68k8_cell0(u32 a, u32 d)
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492 a = (a&3) | (cell_map(a >> 2) << 2);
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493 Pico_mcd->word_ram1M[0][a ^ 1] = d;
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496 static void PicoWriteM68k8_cell1(u32 a, u32 d)
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498 a = (a&3) | (cell_map(a >> 2) << 2);
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499 Pico_mcd->word_ram1M[1][a ^ 1] = d;
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502 static void PicoWriteM68k16_cell0(u32 a, u32 d)
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504 a = (a&3) | (cell_map(a >> 2) << 2);
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505 *(u16 *)(Pico_mcd->word_ram1M[0] + a) = d;
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508 static void PicoWriteM68k16_cell1(u32 a, u32 d)
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510 a = (a&3) | (cell_map(a >> 2) << 2);
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511 *(u16 *)(Pico_mcd->word_ram1M[1] + a) = d;
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515 // RAM cart (40000 - 7fffff, optional)
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516 static u32 PicoReadM68k8_ramc(u32 a)
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519 if (a == 0x400001) {
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520 if (SRam.data != NULL)
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525 if ((a & 0xfe0000) == 0x600000) {
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526 if (SRam.data != NULL)
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527 d = SRam.data[((a >> 1) & 0xffff) + 0x2000];
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532 return Pico_mcd->m.bcram_reg;
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534 elprintf(EL_UIO, "m68k unmapped r8 [%06x] @%06x", a, SekPc);
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538 static u32 PicoReadM68k16_ramc(u32 a)
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540 elprintf(EL_ANOMALY, "ramcart r16: [%06x] @%06x", a, SekPcS68k);
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541 return PicoReadM68k8_ramc(a + 1);
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544 static void PicoWriteM68k8_ramc(u32 a, u32 d)
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546 if ((a & 0xfe0000) == 0x600000) {
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547 if (SRam.data != NULL && (Pico_mcd->m.bcram_reg & 1)) {
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548 SRam.data[((a>>1) & 0xffff) + 0x2000] = d;
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554 if (a == 0x7fffff) {
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555 Pico_mcd->m.bcram_reg = d;
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559 elprintf(EL_UIO, "m68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
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562 static void PicoWriteM68k16_ramc(u32 a, u32 d)
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564 elprintf(EL_ANOMALY, "ramcart w16: [%06x] %04x @%06x", a, d, SekPcS68k);
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565 PicoWriteM68k8_ramc(a + 1, d);
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568 // IO/control/cd registers (a10000 - ...)
\r
569 #ifndef _ASM_CD_MEMORY_C
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570 static u32 PicoReadM68k8_io(u32 a)
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573 if ((a & 0xff00) == 0x2000) { // a12000 - a120ff
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574 d = m68k_reg_read16(a); // TODO: m68k_reg_read8
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578 elprintf(EL_CDREGS, "m68k_regs r8: [%02x] %02x @%06x", a & 0x3f, d, SekPc);
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582 // fallback to default MD handler
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583 return PicoRead8_io(a);
\r
586 static u32 PicoReadM68k16_io(u32 a)
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589 if ((a & 0xff00) == 0x2000) {
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590 d = m68k_reg_read16(a);
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591 elprintf(EL_CDREGS, "m68k_regs r16: [%02x] %04x @%06x", a & 0x3f, d, SekPc);
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595 return PicoRead16_io(a);
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598 static void PicoWriteM68k8_io(u32 a, u32 d)
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600 if ((a & 0xff00) == 0x2000) { // a12000 - a120ff
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601 elprintf(EL_CDREGS, "m68k_regs w8: [%02x] %02x @%06x", a&0x3f, d, SekPc);
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602 m68k_reg_write8(a, d);
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606 PicoWrite16_io(a, d);
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609 static void PicoWriteM68k16_io(u32 a, u32 d)
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611 if ((a & 0xff00) == 0x2000) { // a12000 - a120ff
\r
612 elprintf(EL_CDREGS, "m68k_regs w16: [%02x] %04x @%06x", a&0x3f, d, SekPc);
\r
614 m68k_reg_write8(a, d >> 8);
\r
615 if ((a & 0x3e) != 0x0e) // special case
\r
616 m68k_reg_write8(a + 1, d & 0xff);
\r
620 PicoWrite16_io(a, d);
\r
624 // -----------------------------------------------------------------
\r
626 // -----------------------------------------------------------------
\r
628 static u32 s68k_unmapped_read8(u32 a)
\r
630 elprintf(EL_UIO, "s68k unmapped r8 [%06x] @%06x", a, SekPc);
\r
634 static u32 s68k_unmapped_read16(u32 a)
\r
636 elprintf(EL_UIO, "s68k unmapped r16 [%06x] @%06x", a, SekPc);
\r
640 static void s68k_unmapped_write8(u32 a, u32 d)
\r
642 elprintf(EL_UIO, "s68k unmapped w8 [%06x] %02x @%06x", a, d & 0xff, SekPc);
\r
645 static void s68k_unmapped_write16(u32 a, u32 d)
\r
647 elprintf(EL_UIO, "s68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);
\r
650 // PRG RAM protected range (000000 - 00ff00)?
\r
651 // XXX verify: ff00 or 1fe00 max?
\r
652 static void PicoWriteS68k8_prgwp(u32 a, u32 d)
\r
654 if (a >= (Pico_mcd->s68k_regs[2] << 8))
\r
655 Pico_mcd->prg_ram[a ^ 1] = d;
\r
658 static void PicoWriteS68k16_prgwp(u32 a, u32 d)
\r
660 if (a >= (Pico_mcd->s68k_regs[2] << 8))
\r
661 *(u16 *)(Pico_mcd->prg_ram + a) = d;
\r
664 #ifndef _ASM_CD_MEMORY_C
\r
666 // decode (080000 - 0bffff, in 1M mode)
\r
667 static u32 PicoReadS68k8_dec0(u32 a)
\r
669 u32 d = Pico_mcd->word_ram1M[0][((a >> 1) ^ 1) & 0x1ffff];
\r
677 static u32 PicoReadS68k8_dec1(u32 a)
\r
679 u32 d = Pico_mcd->word_ram1M[1][((a >> 1) ^ 1) & 0x1ffff];
\r
687 static u32 PicoReadS68k16_dec0(u32 a)
\r
689 u32 d = Pico_mcd->word_ram1M[0][((a >> 1) ^ 1) & 0x1ffff];
\r
695 static u32 PicoReadS68k16_dec1(u32 a)
\r
697 u32 d = Pico_mcd->word_ram1M[1][((a >> 1) ^ 1) & 0x1ffff];
\r
703 /* check: jaguar xj 220 (draws entire world using decode) */
\r
704 #define mk_decode_w8(bank) \
\r
705 static void PicoWriteS68k8_dec_m0b##bank(u32 a, u32 d) \
\r
707 u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \
\r
710 *pd = (*pd & 0x0f) | (d << 4); \
\r
712 *pd = (*pd & 0xf0) | (d & 0x0f); \
\r
715 static void PicoWriteS68k8_dec_m1b##bank(u32 a, u32 d) \
\r
717 u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \
\r
718 u8 mask = (a & 1) ? 0x0f : 0xf0; \
\r
720 if (!(*pd & mask) && (d & 0x0f)) /* underwrite */ \
\r
721 PicoWriteS68k8_dec_m0b##bank(a, d); \
\r
724 static void PicoWriteS68k8_dec_m2b##bank(u32 a, u32 d) /* ...and m3? */ \
\r
726 if (d & 0x0f) /* overwrite */ \
\r
727 PicoWriteS68k8_dec_m0b##bank(a, d); \
\r
733 #define mk_decode_w16(bank) \
\r
734 static void PicoWriteS68k16_dec_m0b##bank(u32 a, u32 d) \
\r
736 u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \
\r
739 *pd = d | (d >> 4); \
\r
742 static void PicoWriteS68k16_dec_m1b##bank(u32 a, u32 d) \
\r
744 u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \
\r
746 d &= 0x0f0f; /* underwrite */ \
\r
747 if (!(*pd & 0xf0)) *pd |= d >> 4; \
\r
748 if (!(*pd & 0x0f)) *pd |= d; \
\r
751 static void PicoWriteS68k16_dec_m2b##bank(u32 a, u32 d) \
\r
753 u8 *pd = &Pico_mcd->word_ram1M[bank][((a >> 1) ^ 1) & 0x1ffff]; \
\r
755 d &= 0x0f0f; /* overwrite */ \
\r
758 if (!(d & 0xf0)) d |= *pd & 0xf0; \
\r
759 if (!(d & 0x0f)) d |= *pd & 0x0f; \
\r
768 // backup RAM (fe0000 - feffff)
\r
769 static u32 PicoReadS68k8_bram(u32 a)
\r
771 return Pico_mcd->bram[(a>>1)&0x1fff];
\r
774 static u32 PicoReadS68k16_bram(u32 a)
\r
777 elprintf(EL_ANOMALY, "FIXME: s68k_bram r16: [%06x] @%06x", a, SekPcS68k);
\r
778 a = (a >> 1) & 0x1fff;
\r
779 d = Pico_mcd->bram[a++];
\r
780 d|= Pico_mcd->bram[a++] << 8; // probably wrong, TODO: verify
\r
784 static void PicoWriteS68k8_bram(u32 a, u32 d)
\r
786 Pico_mcd->bram[(a >> 1) & 0x1fff] = d;
\r
790 static void PicoWriteS68k16_bram(u32 a, u32 d)
\r
792 elprintf(EL_ANOMALY, "s68k_bram w16: [%06x] %04x @%06x", a, d, SekPcS68k);
\r
793 a = (a >> 1) & 0x1fff;
\r
794 Pico_mcd->bram[a++] = d;
\r
795 Pico_mcd->bram[a++] = d >> 8; // TODO: verify..
\r
799 #ifndef _ASM_CD_MEMORY_C
\r
801 // PCM and registers (ff0000 - ffffff)
\r
802 static u32 PicoReadS68k8_pr(u32 a)
\r
807 if ((a & 0xfe00) == 0x8000) {
\r
809 elprintf(EL_CDREGS, "s68k_regs r8: [%02x] @ %06x", a, SekPcS68k);
\r
810 if (a >= 0x0e && a < 0x30) {
\r
811 d = Pico_mcd->s68k_regs[a];
\r
812 s68k_poll_detect(a, d);
\r
813 elprintf(EL_CDREGS, "ret = %02x", (u8)d);
\r
816 else if (a >= 0x58 && a < 0x68)
\r
817 d = gfx_cd_read(a & ~1);
\r
818 else d = s68k_reg_read16(a & ~1);
\r
821 elprintf(EL_CDREGS, "ret = %02x", (u8)d);
\r
826 // XXX: verify: probably odd addrs only?
\r
827 if ((a & 0x8000) == 0x0000) {
\r
830 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a >> 1) & 0xfff];
\r
831 else if (a >= 0x20) {
\r
833 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
840 return s68k_unmapped_read8(a);
\r
843 static u32 PicoReadS68k16_pr(u32 a)
\r
848 if ((a & 0xfe00) == 0x8000) {
\r
850 elprintf(EL_CDREGS, "s68k_regs r16: [%02x] @ %06x", a, SekPcS68k);
\r
851 if (0x58 <= a && a < 0x68)
\r
852 d = gfx_cd_read(a);
\r
853 else d = s68k_reg_read16(a);
\r
854 elprintf(EL_CDREGS, "ret = %04x", d);
\r
859 if ((a & 0x8000) == 0x0000) {
\r
860 //elprintf(EL_ANOMALY, "FIXME: s68k_pcm r16: [%06x] @%06x", a, SekPcS68k);
\r
863 d = Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff];
\r
864 else if (a >= 0x20) {
\r
866 d = Pico_mcd->pcm.ch[a>>2].addr >> PCM_STEP_SHIFT;
\r
867 if (a & 2) d >>= 8;
\r
869 elprintf(EL_CDREGS, "ret = %04x", d);
\r
873 return s68k_unmapped_read16(a);
\r
876 static void PicoWriteS68k8_pr(u32 a, u32 d)
\r
879 if ((a & 0xfe00) == 0x8000) {
\r
881 elprintf(EL_CDREGS, "s68k_regs w8: [%02x] %02x @ %06x", a, d, SekPcS68k);
\r
882 if (0x58 <= a && a < 0x68)
\r
883 gfx_cd_write16(a&~1, (d<<8)|d);
\r
884 else s68k_reg_write8(a,d);
\r
889 if ((a & 0x8000) == 0x0000) {
\r
892 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
\r
894 pcm_write(a>>1, d);
\r
898 s68k_unmapped_write8(a, d);
\r
901 static void PicoWriteS68k16_pr(u32 a, u32 d)
\r
904 if ((a & 0xfe00) == 0x8000) {
\r
906 elprintf(EL_CDREGS, "s68k_regs w16: [%02x] %04x @ %06x", a, d, SekPcS68k);
\r
907 if (a >= 0x58 && a < 0x68)
\r
908 gfx_cd_write16(a, d);
\r
911 // special case, 2 byte writes would be handled differently
\r
913 Pico_mcd->s68k_regs[0xf] = d;
\r
916 s68k_reg_write8(a, d >> 8);
\r
917 s68k_reg_write8(a + 1, d & 0xff);
\r
923 if ((a & 0x8000) == 0x0000) {
\r
926 Pico_mcd->pcm_ram_b[Pico_mcd->pcm.bank][(a>>1)&0xfff] = d;
\r
928 pcm_write(a>>1, d & 0xff);
\r
932 s68k_unmapped_write16(a, d);
\r
937 static const void *m68k_cell_read8[] = { PicoReadM68k8_cell0, PicoReadM68k8_cell1 };
\r
938 static const void *m68k_cell_read16[] = { PicoReadM68k16_cell0, PicoReadM68k16_cell1 };
\r
939 static const void *m68k_cell_write8[] = { PicoWriteM68k8_cell0, PicoWriteM68k8_cell1 };
\r
940 static const void *m68k_cell_write16[] = { PicoWriteM68k16_cell0, PicoWriteM68k16_cell1 };
\r
942 static const void *s68k_dec_read8[] = { PicoReadS68k8_dec0, PicoReadS68k8_dec1 };
\r
943 static const void *s68k_dec_read16[] = { PicoReadS68k16_dec0, PicoReadS68k16_dec1 };
\r
945 static const void *s68k_dec_write8[2][4] = {
\r
946 { PicoWriteS68k8_dec_m0b0, PicoWriteS68k8_dec_m1b0, PicoWriteS68k8_dec_m2b0, PicoWriteS68k8_dec_m2b0 },
\r
947 { PicoWriteS68k8_dec_m0b1, PicoWriteS68k8_dec_m1b1, PicoWriteS68k8_dec_m2b1, PicoWriteS68k8_dec_m2b1 },
\r
950 static const void *s68k_dec_write16[2][4] = {
\r
951 { PicoWriteS68k16_dec_m0b0, PicoWriteS68k16_dec_m1b0, PicoWriteS68k16_dec_m2b0, PicoWriteS68k16_dec_m2b0 },
\r
952 { PicoWriteS68k16_dec_m0b1, PicoWriteS68k16_dec_m1b1, PicoWriteS68k16_dec_m2b1, PicoWriteS68k16_dec_m2b1 },
\r
955 // -----------------------------------------------------------------
\r
957 static void remap_prg_window(int r3)
\r
960 if (Pico_mcd->m.busreq & 2) {
\r
961 void *bank = Pico_mcd->prg_ram_b[r3 >> 6];
\r
962 cpu68k_map_all_ram(0x020000, 0x03ffff, bank, 0);
\r
965 m68k_map_unmap(0x020000, 0x03ffff);
\r
969 static void remap_word_ram(int r3)
\r
975 // 2M mode. XXX: allowing access in all cases for simplicity
\r
976 bank = Pico_mcd->word_ram2M;
\r
977 cpu68k_map_all_ram(0x200000, 0x23ffff, bank, 0);
\r
978 cpu68k_map_all_ram(0x080000, 0x0bffff, bank, 1);
\r
979 // TODO: handle 0x0c0000
\r
983 int m = (r3 & 0x18) >> 3;
\r
984 bank = Pico_mcd->word_ram1M[b0];
\r
985 cpu68k_map_all_ram(0x200000, 0x21ffff, bank, 0);
\r
986 bank = Pico_mcd->word_ram1M[b0 ^ 1];
\r
987 cpu68k_map_all_ram(0x0c0000, 0x0effff, bank, 1);
\r
988 // "cell arrange" on m68k
\r
989 cpu68k_map_set(m68k_read8_map, 0x220000, 0x23ffff, m68k_cell_read8[b0], 1);
\r
990 cpu68k_map_set(m68k_read16_map, 0x220000, 0x23ffff, m68k_cell_read16[b0], 1);
\r
991 cpu68k_map_set(m68k_write8_map, 0x220000, 0x23ffff, m68k_cell_write8[b0], 1);
\r
992 cpu68k_map_set(m68k_write16_map, 0x220000, 0x23ffff, m68k_cell_write16[b0], 1);
\r
993 // "decode format" on s68k
\r
994 cpu68k_map_set(s68k_read8_map, 0x080000, 0x0bffff, s68k_dec_read8[b0 ^ 1], 1);
\r
995 cpu68k_map_set(s68k_read16_map, 0x080000, 0x0bffff, s68k_dec_read16[b0 ^ 1], 1);
\r
996 cpu68k_map_set(s68k_write8_map, 0x080000, 0x0bffff, s68k_dec_write8[b0 ^ 1][m], 1);
\r
997 cpu68k_map_set(s68k_write16_map, 0x080000, 0x0bffff, s68k_dec_write16[b0 ^ 1][m], 1);
\r
1001 // update fetchmap..
\r
1005 for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x240000; i++)
\r
1006 PicoCpuFM68k.Fetch[i] = (unsigned long)Pico_mcd->word_ram2M - 0x200000;
\r
1010 for (i = M68K_FETCHBANK1*2/16; (i<<(24-FAMEC_FETCHBITS)) < 0x220000; i++)
\r
1011 PicoCpuFM68k.Fetch[i] = (unsigned long)Pico_mcd->word_ram1M[r3 & 1] - 0x200000;
\r
1012 for (i = M68K_FETCHBANK1*0x0c/0x100; (i<<(24-FAMEC_FETCHBITS)) < 0x0e0000; i++)
\r
1013 PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->word_ram1M[(r3&1)^1] - 0x0c0000;
\r
1018 void pcd_state_loaded_mem(void)
\r
1020 int r3 = Pico_mcd->s68k_regs[3];
\r
1022 /* after load events */
\r
1023 if (r3 & 4) // 1M mode?
\r
1024 wram_2M_to_1M(Pico_mcd->word_ram2M);
\r
1025 remap_word_ram(r3);
\r
1026 remap_prg_window(r3);
\r
1028 // restore hint vector
\r
1029 *(unsigned short *)(Pico_mcd->bios + 0x72) = Pico_mcd->m.hint_vector;
\r
1033 static void m68k_mem_setup_cd(void);
\r
1036 PICO_INTERNAL void PicoMemSetupCD(void)
\r
1038 // setup default main68k map
\r
1041 // main68k map (BIOS mapped by PicoMemSetup()):
\r
1043 if (PicoOpt & POPT_EN_MCD_RAMCART) {
\r
1044 cpu68k_map_set(m68k_read8_map, 0x400000, 0x7fffff, PicoReadM68k8_ramc, 1);
\r
1045 cpu68k_map_set(m68k_read16_map, 0x400000, 0x7fffff, PicoReadM68k16_ramc, 1);
\r
1046 cpu68k_map_set(m68k_write8_map, 0x400000, 0x7fffff, PicoWriteM68k8_ramc, 1);
\r
1047 cpu68k_map_set(m68k_write16_map, 0x400000, 0x7fffff, PicoWriteM68k16_ramc, 1);
\r
1051 cpu68k_map_set(m68k_read8_map, 0xa10000, 0xa1ffff, PicoReadM68k8_io, 1);
\r
1052 cpu68k_map_set(m68k_read16_map, 0xa10000, 0xa1ffff, PicoReadM68k16_io, 1);
\r
1053 cpu68k_map_set(m68k_write8_map, 0xa10000, 0xa1ffff, PicoWriteM68k8_io, 1);
\r
1054 cpu68k_map_set(m68k_write16_map, 0xa10000, 0xa1ffff, PicoWriteM68k16_io, 1);
\r
1057 cpu68k_map_set(s68k_read8_map, 0x000000, 0xffffff, s68k_unmapped_read8, 1);
\r
1058 cpu68k_map_set(s68k_read16_map, 0x000000, 0xffffff, s68k_unmapped_read16, 1);
\r
1059 cpu68k_map_set(s68k_write8_map, 0x000000, 0xffffff, s68k_unmapped_write8, 1);
\r
1060 cpu68k_map_set(s68k_write16_map, 0x000000, 0xffffff, s68k_unmapped_write16, 1);
\r
1063 cpu68k_map_set(s68k_read8_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);
\r
1064 cpu68k_map_set(s68k_read16_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);
\r
1065 cpu68k_map_set(s68k_write8_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);
\r
1066 cpu68k_map_set(s68k_write16_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);
\r
1067 cpu68k_map_set(s68k_write8_map, 0x000000, 0x00ffff, PicoWriteS68k8_prgwp, 1);
\r
1068 cpu68k_map_set(s68k_write16_map, 0x000000, 0x00ffff, PicoWriteS68k16_prgwp, 1);
\r
1071 cpu68k_map_set(s68k_read8_map, 0xfe0000, 0xfeffff, PicoReadS68k8_bram, 1);
\r
1072 cpu68k_map_set(s68k_read16_map, 0xfe0000, 0xfeffff, PicoReadS68k16_bram, 1);
\r
1073 cpu68k_map_set(s68k_write8_map, 0xfe0000, 0xfeffff, PicoWriteS68k8_bram, 1);
\r
1074 cpu68k_map_set(s68k_write16_map, 0xfe0000, 0xfeffff, PicoWriteS68k16_bram, 1);
\r
1077 cpu68k_map_set(s68k_read8_map, 0xff0000, 0xffffff, PicoReadS68k8_pr, 1);
\r
1078 cpu68k_map_set(s68k_read16_map, 0xff0000, 0xffffff, PicoReadS68k16_pr, 1);
\r
1079 cpu68k_map_set(s68k_write8_map, 0xff0000, 0xffffff, PicoWriteS68k8_pr, 1);
\r
1080 cpu68k_map_set(s68k_write16_map, 0xff0000, 0xffffff, PicoWriteS68k16_pr, 1);
\r
1083 remap_word_ram(1);
\r
1087 PicoCpuCS68k.read8 = (void *)s68k_read8_map;
\r
1088 PicoCpuCS68k.read16 = (void *)s68k_read16_map;
\r
1089 PicoCpuCS68k.read32 = (void *)s68k_read16_map;
\r
1090 PicoCpuCS68k.write8 = (void *)s68k_write8_map;
\r
1091 PicoCpuCS68k.write16 = (void *)s68k_write16_map;
\r
1092 PicoCpuCS68k.write32 = (void *)s68k_write16_map;
\r
1093 PicoCpuCS68k.checkpc = NULL; /* unused */
\r
1094 PicoCpuCS68k.fetch8 = NULL;
\r
1095 PicoCpuCS68k.fetch16 = NULL;
\r
1096 PicoCpuCS68k.fetch32 = NULL;
\r
1100 PicoCpuFS68k.read_byte = s68k_read8;
\r
1101 PicoCpuFS68k.read_word = s68k_read16;
\r
1102 PicoCpuFS68k.read_long = s68k_read32;
\r
1103 PicoCpuFS68k.write_byte = s68k_write8;
\r
1104 PicoCpuFS68k.write_word = s68k_write16;
\r
1105 PicoCpuFS68k.write_long = s68k_write32;
\r
1107 // setup FAME fetchmap
\r
1111 // by default, point everything to fitst 64k of ROM (BIOS)
\r
1112 for (i = 0; i < M68K_FETCHBANK1; i++)
\r
1113 PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom - (i<<(24-FAMEC_FETCHBITS));
\r
1114 // now real ROM (BIOS)
\r
1115 for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)
\r
1116 PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom;
\r
1118 for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)
\r
1119 PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.ram - (i<<(24-FAMEC_FETCHBITS));
\r
1121 // PRG RAM is default
\r
1122 for (i = 0; i < M68K_FETCHBANK1; i++)
\r
1123 PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->prg_ram - (i<<(24-FAMEC_FETCHBITS));
\r
1125 for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0x80000; i++)
\r
1126 PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->prg_ram;
\r
1127 // WORD RAM 2M area
\r
1128 for (i = M68K_FETCHBANK1*0x08/0x100; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < 0xc0000; i++)
\r
1129 PicoCpuFS68k.Fetch[i] = (unsigned long)Pico_mcd->word_ram2M - 0x80000;
\r
1130 // remap_word_ram() will setup word ram for both
\r
1134 m68k_mem_setup_cd();
\r
1140 u32 m68k_read8(u32 a);
\r
1141 u32 m68k_read16(u32 a);
\r
1142 u32 m68k_read32(u32 a);
\r
1143 void m68k_write8(u32 a, u8 d);
\r
1144 void m68k_write16(u32 a, u16 d);
\r
1145 void m68k_write32(u32 a, u32 d);
\r
1147 static unsigned int PicoReadCD8w (unsigned int a) {
\r
1148 return m68ki_cpu_p == &PicoCpuMS68k ? s68k_read8(a) : m68k_read8(a);
\r
1150 static unsigned int PicoReadCD16w(unsigned int a) {
\r
1151 return m68ki_cpu_p == &PicoCpuMS68k ? s68k_read16(a) : m68k_read16(a);
\r
1153 static unsigned int PicoReadCD32w(unsigned int a) {
\r
1154 return m68ki_cpu_p == &PicoCpuMS68k ? s68k_read32(a) : m68k_read32(a);
\r
1156 static void PicoWriteCD8w (unsigned int a, unsigned char d) {
\r
1157 if (m68ki_cpu_p == &PicoCpuMS68k) s68k_write8(a, d); else m68k_write8(a, d);
\r
1159 static void PicoWriteCD16w(unsigned int a, unsigned short d) {
\r
1160 if (m68ki_cpu_p == &PicoCpuMS68k) s68k_write16(a, d); else m68k_write16(a, d);
\r
1162 static void PicoWriteCD32w(unsigned int a, unsigned int d) {
\r
1163 if (m68ki_cpu_p == &PicoCpuMS68k) s68k_write32(a, d); else m68k_write32(a, d);
\r
1166 extern unsigned int (*pm68k_read_memory_8) (unsigned int address);
\r
1167 extern unsigned int (*pm68k_read_memory_16)(unsigned int address);
\r
1168 extern unsigned int (*pm68k_read_memory_32)(unsigned int address);
\r
1169 extern void (*pm68k_write_memory_8) (unsigned int address, unsigned char value);
\r
1170 extern void (*pm68k_write_memory_16)(unsigned int address, unsigned short value);
\r
1171 extern void (*pm68k_write_memory_32)(unsigned int address, unsigned int value);
\r
1173 static void m68k_mem_setup_cd(void)
\r
1175 pm68k_read_memory_8 = PicoReadCD8w;
\r
1176 pm68k_read_memory_16 = PicoReadCD16w;
\r
1177 pm68k_read_memory_32 = PicoReadCD32w;
\r
1178 pm68k_write_memory_8 = PicoWriteCD8w;
\r
1179 pm68k_write_memory_16 = PicoWriteCD16w;
\r
1180 pm68k_write_memory_32 = PicoWriteCD32w;
\r
1182 #endif // EMU_M68K
\r
1184 // vim:shiftwidth=2:ts=2:expandtab
\r