3 * (c) Copyright Dave, 2004
\r
4 * (C) notaz, 2006-2010
\r
5 * (C) irixxxx, 2020-2024
\r
7 * This work is licensed under the terms of MAME license.
\r
8 * See COPYING file in the top-level directory.
\r
11 #include "pico_int.h"
\r
12 #include "sound/ym2612.h"
\r
15 struct PicoMem PicoMem;
\r
16 PicoInterface PicoIn;
\r
18 void (*PicoResetHook)(void) = NULL;
\r
19 void (*PicoLineHook)(void) = NULL;
\r
21 // to be called once on emu init
\r
24 // Blank space for state:
\r
25 memset(&Pico,0,sizeof(Pico));
\r
26 memset(&PicoMem,0,sizeof(PicoMem));
\r
27 memset(&PicoIn.pad,0,sizeof(PicoIn.pad));
\r
28 memset(&PicoIn.padInt,0,sizeof(PicoIn.padInt));
\r
30 Pico.est.Pico = &Pico;
\r
31 Pico.est.PicoMem_vram = PicoMem.vram;
\r
32 Pico.est.PicoMem_cram = PicoMem.cram;
\r
33 Pico.est.PicoOpt = &PicoIn.opt;
\r
37 z80_init(); // init even if we aren't going to use it
\r
49 // to be called once on emu exit
\r
52 if (PicoIn.AHW & PAHW_MCD)
\r
59 Pico.sv.data = NULL;
\r
60 Pico.sv.start = Pico.sv.end = 0;
\r
64 void PicoPower(void)
\r
66 Pico.m.frame_count = 0;
\r
67 Pico.t.m68c_cnt = Pico.t.m68c_aim = 0;
\r
69 // clear all memory of the emulated machine
\r
70 memset(&PicoMem,0,sizeof(PicoMem));
\r
72 memset(&Pico.video,0,sizeof(Pico.video));
\r
73 memset(&Pico.m,0,sizeof(Pico.m));
\r
74 memset(&Pico.t,0,sizeof(Pico.t));
\r
76 // my MD1 VA6 console has this in IO
\r
77 PicoMem.ioports[1] = PicoMem.ioports[2] = PicoMem.ioports[3] = 0xff;
\r
79 Pico.video.hint_irq = (PicoIn.AHW & PAHW_PICO ? 5 : 4);
\r
81 if (PicoIn.AHW & PAHW_MCD)
\r
84 if (PicoIn.opt & POPT_EN_32X)
\r
89 // powerup default VDP register values from TMSS BIOS
\r
90 Pico.video.reg[0] = Pico.video.reg[1] = 0x04;
\r
91 Pico.video.reg[0xc] = 0x81;
\r
92 Pico.video.reg[0xf] = 0x02;
\r
97 PICO_INTERNAL void PicoDetectRegion(void)
\r
99 int support=0, hw=0, i;
\r
100 unsigned char pal=0;
\r
101 char *pr = (char *)(Pico.rom + 0x1f0);
\r
103 if (PicoIn.regionOverride)
\r
105 support = PicoIn.regionOverride;
\r
107 else if (strcmp(pr, "EUROPE") == 0 || strcmp(pr, "Europe") == 0)
\r
109 // Unusual cartridge region 'code'
\r
114 // Read cartridge region data:
\r
115 unsigned short *rd = (unsigned short *)pr;
\r
116 int region = (rd[0] << 16) | rd[1];
\r
118 for (i = 0; i < 4; i++)
\r
122 c = region >> (i<<3);
\r
124 if (c <= ' ') continue;
\r
126 if (c=='J') support|=1;
\r
127 else if (c=='U') support|=4;
\r
128 else if (c=='E') support|=8;
\r
129 else if (c=='j') {support|=1; break; }
\r
130 else if (c=='u') {support|=4; break; }
\r
131 else if (c=='e') {support|=8; break; }
\r
137 support|=strtol(s,NULL,16);
\r
142 // auto detection order override
\r
143 if (PicoIn.autoRgnOrder) {
\r
144 if (((PicoIn.autoRgnOrder>>0)&0xf) & support) support = (PicoIn.autoRgnOrder>>0)&0xf;
\r
145 else if (((PicoIn.autoRgnOrder>>4)&0xf) & support) support = (PicoIn.autoRgnOrder>>4)&0xf;
\r
146 else if (((PicoIn.autoRgnOrder>>8)&0xf) & support) support = (PicoIn.autoRgnOrder>>8)&0xf;
\r
149 // Try to pick the best hardware value for English/50hz:
\r
150 if (support&8) { hw=0xc0; pal=1; } // Europe
\r
151 else if (support&4) hw=0x80; // USA
\r
152 else if (support&2) { hw=0x40; pal=1; } // Japan PAL
\r
153 else if (support&1) hw=0x00; // Japan NTSC
\r
154 else hw=0x80; // USA
\r
156 if (!(PicoIn.AHW & PAHW_MCD)) hw |= 0x20; // No disk attached
\r
158 Pico.m.hardware=(unsigned char)hw;
\r
162 int PicoReset(void)
\r
164 if (Pico.romsize <= 0)
\r
167 #if defined(CPU_CMP_R) || defined(CPU_CMP_W) || defined(DRC_CMP)
\r
168 PicoIn.opt |= POPT_DIS_VDP_FIFO|POPT_DIS_IDLE_DET;
\r
171 /* must call now, so that banking is reset, and correct vectors get fetched */
\r
175 memset(&PicoIn.padInt, 0, sizeof(PicoIn.padInt));
\r
178 if (PicoIn.AHW & PAHW_SMS) {
\r
184 // ..but do not reset SekCycle* to not desync with addons
\r
186 // s68k doesn't have the TAS quirk, so we just globally set normal TAS handler in MCD mode (used by Batman games).
\r
187 SekSetRealTAS(PicoIn.AHW & PAHW_MCD);
\r
189 Pico.m.z80_bank68k = 0;
\r
190 Pico.m.z80_reset = 1;
\r
192 PicoDetectRegion();
\r
196 PsndReset(); // pal must be known here
\r
198 // create an empty "dma" to cause 68k exec start at random frame location
\r
199 Pico.t.m68c_line_start = Pico.t.m68c_aim;
\r
200 PicoVideoFIFOWrite(rand() & 0x1fff, 0, 0, PVS_CPURD);
\r
202 SekFinishIdleDet();
\r
204 if (PicoIn.opt & POPT_EN_32X)
\r
207 if (PicoIn.AHW & PAHW_MCD) {
\r
212 // reinit, so that checksum checks pass
\r
213 if (!(PicoIn.opt & POPT_DIS_IDLE_DET))
\r
216 // reset sram state; enable sram access by default if it doesn't overlap with ROM
\r
217 Pico.m.sram_reg = 0;
\r
218 if ((Pico.sv.flags & SRF_EEPROM) || Pico.romsize <= Pico.sv.start)
\r
219 Pico.m.sram_reg |= SRR_MAPPED;
\r
221 if (Pico.sv.flags & SRF_ENABLED)
\r
222 elprintf(EL_STATUS, "sram: %06x - %06x; eeprom: %i", Pico.sv.start, Pico.sv.end,
\r
223 !!(Pico.sv.flags & SRF_EEPROM));
\r
228 // flush config changes before emu loop starts
\r
229 void PicoLoopPrepare(void)
\r
231 if (PicoIn.regionOverride)
\r
232 // force setting possibly changed..
\r
233 Pico.m.pal = (PicoIn.regionOverride == 2 || PicoIn.regionOverride == 8) ? 1 : 0;
\r
236 Pico.t.vcnt_wrap = 0x103;
\r
237 Pico.t.vcnt_adj = 57;
\r
240 Pico.t.vcnt_wrap = 0xEB;
\r
241 Pico.t.vcnt_adj = 6;
\r
243 PicoVideoFIFOMode(Pico.video.reg[1]&0x40, Pico.video.reg[12]&1);
\r
245 Pico.m.dirtyPal = 1;
\r
246 rendstatus_old = -1;
\r
248 if (PicoIn.AHW & PAHW_MCD)
\r
250 if (PicoIn.AHW & PAHW_32X)
\r
254 #include "pico_cmn.c"
\r
256 /* sync z80 to 68k */
\r
257 PICO_INTERNAL void PicoSyncZ80(unsigned int m68k_cycles_done)
\r
262 m68k_cnt = m68k_cycles_done - Pico.t.m68c_frame_start;
\r
263 Pico.t.z80c_aim = cycles_68k_to_z80(m68k_cnt);
\r
264 cnt = Pico.t.z80c_aim - Pico.t.z80c_cnt;
\r
268 elprintf(EL_BUSREQ, "z80 sync %i (%u|%u -> %u|%u)", cnt,
\r
269 Pico.t.z80c_cnt, Pico.t.z80c_cnt * 15 / 7 / 488,
\r
270 Pico.t.z80c_aim, Pico.t.z80c_aim * 15 / 7 / 488);
\r
273 Pico.t.z80c_cnt += z80_run(cnt);
\r
279 void PicoFrame(void)
\r
281 pprof_start(frame);
\r
283 Pico.m.frame_count++;
\r
285 if (PicoIn.AHW & PAHW_SMS) {
\r
290 if (PicoIn.AHW & PAHW_32X) {
\r
291 PicoFrame32x(); // also does MCD+32X
\r
295 if (PicoIn.AHW & PAHW_MCD) {
\r
300 //if(Pico.video.reg[12]&0x2) Pico.video.status ^= SR_ODD; // change odd bit in interlace mode
\r
309 void PicoFrameDrawOnly(void)
\r
311 if (!(PicoIn.AHW & PAHW_SMS)) {
\r
313 PicoDrawSync(Pico.m.pal?239:223, 0, 0);
\r
315 PicoFrameDrawOnlyMS();
\r
319 void PicoGetInternal(pint_t which, pint_ret_t *r)
\r
323 case PI_ROM: r->vptr = Pico.rom; break;
\r
324 case PI_ISPAL: r->vint = Pico.m.pal; break;
\r
325 case PI_IS40_CELL: r->vint = Pico.video.reg[12]&1; break;
\r
326 case PI_IS240_LINES: r->vint = Pico.m.pal && (Pico.video.reg[1]&8); break;
\r
330 // vim:ts=2:sw=2:expandtab
\r