2 * common code for base/cd/32x
3 * (C) notaz, 2007-2009,2013
4 * (C) irixxxx, 2020-2024
6 * This work is licensed under the terms of MAME license.
7 * See COPYING file in the top-level directory.
10 #define CYCLES_M68K_LINE 488 // suitable for both PAL/NTSC
11 #define CYCLES_M68K_VINT_LAG 112
13 // pad delay (for 6 button pads)
14 #define PAD_DELAY() { \
15 if(Pico.m.padDelay[0]++ > 25) Pico.m.padTHPhase[0]=0; \
16 if(Pico.m.padDelay[1]++ > 25) Pico.m.padTHPhase[1]=0; \
21 #define CPUS_RUN(m68k_cycles) \
22 SekRunM68k(m68k_cycles)
25 // sync m68k to Pico.t.m68c_aim
26 static void SekExecM68k(int cyc_do)
28 Pico.t.m68c_cnt += cyc_do;
31 PicoCpuCM68k.cycles = cyc_do;
32 CycloneRun(&PicoCpuCM68k);
33 Pico.t.m68c_cnt -= PicoCpuCM68k.cycles;
34 #elif defined(EMU_M68K)
35 Pico.t.m68c_cnt += m68k_execute(cyc_do) - cyc_do;
36 #elif defined(EMU_F68K)
37 Pico.t.m68c_cnt += fm68k_emulate(&PicoCpuFM68k, cyc_do, 0) - cyc_do;
42 static int SekSyncM68k(int once)
47 pevt_log_m68k_o(EVT_RUN_START);
49 while ((cyc_do = Pico.t.m68c_aim - Pico.t.m68c_cnt) > 0) {
50 // the Z80 CPU is stealing some bus cycles from the 68K main CPU when
51 // accessing the main bus. Account for these by shortening the time
53 int z80_buscyc = Pico.t.z80_buscycles >> (4+(~Pico.m.scanline & 1));
54 // NB the Z80 isn't fast enough to steal more than half the bandwidth.
55 // the fastest would be POP cc which takes 10+~3.3*2 z-cyc (~35 cyc) for a
56 // 16 bit value, but 68k is only blocked for ~16 cyc for the 2 bus cycles.
57 if (z80_buscyc > cyc_do/2)
58 z80_buscyc = cyc_do/2;
59 SekExecM68k(cyc_do - z80_buscyc);
60 Pico.t.m68c_cnt += z80_buscyc;
61 Pico.t.z80_buscycles -= z80_buscyc<<4;
66 pevt_log_m68k_o(EVT_RUN_END);
69 return Pico.t.m68c_aim > Pico.t.m68c_cnt;
72 static __inline void SekAimM68k(int cyc, int mult)
74 // refresh slowdown, for cart: 2 cycles every 128 - make this 1 every 64,
75 // for RAM: seems to be 0-3 every 128. Carts usually run from the cart
76 // area, but MCD games only use RAM, hence a different multiplier is needed.
77 // NB must be quite accurate, so handle fractions as well (c/f OutRunners)
78 int delay = (Pico.t.refresh_delay += cyc*mult) >> 14;
79 Pico.t.m68c_cnt += delay;
80 Pico.t.refresh_delay -= delay << 14;
81 Pico.t.m68c_aim += cyc;
84 static __inline void SekRunM68k(int cyc)
86 // TODO 0x100 would be 2 cycles/128, moreover far too sensitive
87 SekAimM68k(cyc, 0x108); // OutRunners, testpico, VDPFIFOTesting
91 static void SyncCPUs(unsigned int cycles)
94 if (Pico.m.z80Run && !Pico.m.z80_reset && (PicoIn.opt&POPT_EN_Z80))
98 if (PicoIn.AHW & PAHW_MCD)
99 pcd_sync_s68k(cycles, 0);
102 p32x_sync_sh2s(cycles);
106 static void do_hint(struct PicoVideo *pv)
108 pv->pending_ints |= 0x10;
109 if (pv->reg[0] & 0x10) {
110 elprintf(EL_INTS, "hint: @ %06x [%u]", SekPc, SekCyclesDone());
111 if (SekIrqLevel < pv->hint_irq)
112 SekInterrupt(pv->hint_irq);
116 static void do_timing_hacks_end(struct PicoVideo *pv)
118 PicoVideoFIFOSync(CYCLES_M68K_LINE);
120 // need rather tight Z80 sync for emulation of main bus cycle stealing
121 if (Pico.m.scanline&1)
122 if (Pico.m.z80Run && !Pico.m.z80_reset && (PicoIn.opt&POPT_EN_Z80))
123 PicoSyncZ80(Pico.t.m68c_aim);
126 static void do_timing_hacks_start(struct PicoVideo *pv)
128 int cycles = PicoVideoFIFOHint();
130 SekCyclesBurn(cycles); // prolong cpu HOLD if necessary
131 // XXX how to handle Z80 bus cycle stealing during DMA correctly?
132 if ((Pico.t.z80_buscycles -= cycles<<4) < 0)
133 Pico.t.z80_buscycles = 0;
134 Pico.t.m68c_aim += Pico.m.scanline&1; // add 1 every 2 lines for 488.5 cycles
137 static int PicoFrameHints(void)
139 struct PicoVideo *pv = &Pico.video;
140 int lines, y, lines_vis, skip;
141 int hint; // Hint counter
143 pevt_log_m68k_o(EVT_FRAME_START);
145 skip = PicoIn.skipFrame;
147 Pico.t.m68c_frame_start = Pico.t.m68c_aim;
152 // === active display ===
153 pv->status |= PVS_ACTIVE;
155 for (y = 0; y < 240; y++)
157 if (y == 224 && !(pv->reg[1] & 8))
161 pv->v_counter = PicoVideoGetV(y, 0);
168 hint = pv->reg[10]; // Reload H-Int counter
172 // decide if we draw this line
173 if (unlikely(PicoIn.opt & POPT_ALT_RENDERER) && !skip)
175 // find the right moment for frame renderer, when display is no longer blanked
176 if ((pv->reg[1]&0x40) || y > 100) {
177 if (Pico.est.rendstatus & PDRAW_SYNC_NEEDED)
179 #ifdef DRAW_FINISH_FUNC
182 Pico.est.rendstatus &= ~PDRAW_SYNC_NEEDED;
188 Pico.t.m68c_line_start = Pico.t.m68c_aim;
189 do_timing_hacks_start(pv);
190 CPUS_RUN(CYCLES_M68K_LINE);
191 do_timing_hacks_end(pv);
193 if (PicoLineHook) PicoLineHook();
194 pevt_log_m68k_o(EVT_NEXT_LINE);
197 SyncCPUs(Pico.t.m68c_aim);
201 if (Pico.est.DrawScanline < y)
203 #ifdef DRAW_FINISH_FUNC
206 Pico.est.rendstatus &= ~PDRAW_SYNC_NEEDED;
212 // === VBLANK, 1st line ===
213 lines_vis = (pv->reg[1] & 8) ? 240 : 224;
215 pv->status &= ~PVS_ACTIVE;
217 pv->v_counter = PicoVideoGetV(y, 0);
219 memcpy(PicoIn.padInt, PicoIn.pad, sizeof(PicoIn.padInt));
222 // Last H-Int (normally):
225 hint = pv->reg[10]; // Reload H-Int counter
229 pv->status |= SR_VB | PVS_VB2; // go into vblank
234 // the following SekRun is there for several reasons:
235 // there must be a delay after vblank bit is set and irq is asserted (Mazin Saga)
236 // also delay between F bit (bit 7) is set in SR and IRQ happens (Ex-Mutants)
237 // also delay between last H-int and V-int (Golden Axe 3)
238 Pico.t.m68c_line_start = Pico.t.m68c_aim;
239 PicoVideoFIFOMode(pv->reg[1]&0x40, pv->reg[12]&1);
240 do_timing_hacks_start(pv);
241 CPUS_RUN(CYCLES_M68K_VINT_LAG);
243 SyncCPUs(Pico.t.m68c_aim);
247 pv->pending_ints |= 0x20;
249 if (pv->reg[1] & 0x20) {
250 // as per https://gendev.spritesmind.net/forum/viewtopic.php?t=2202, IRQ
251 // is usually sampled after operand reading, so the next instruction will
252 // be executed before the IRQ is taken.
253 if (Pico.t.m68c_cnt - Pico.t.m68c_aim < 40) // CPU blocked?
255 elprintf(EL_INTS, "vint: @ %06x [%u]", SekPc, SekCyclesDone());
256 // TODO: IRQ usually sampled after operand reading, so insn can't turn it
257 // off? single exception is MOVE.L which samples IRQ after the 1st write?
263 pv->status ^= SR_ODD; // change odd bit in interlace modes
265 pv->status &= ~SR_ODD; // never set in non-interlace modes
267 // assert Z80 interrupt for one scanline even in busrq hold (Teddy Blues)
268 if (/*Pico.m.z80Run &&*/ !Pico.m.z80_reset && (PicoIn.opt&POPT_EN_Z80)) {
269 elprintf(EL_INTS, "zint");
274 CPUS_RUN(CYCLES_M68K_LINE - CYCLES_M68K_VINT_LAG);
275 do_timing_hacks_end(pv);
277 if (PicoLineHook) PicoLineHook();
278 pevt_log_m68k_o(EVT_NEXT_LINE);
280 if (Pico.m.z80Run && !Pico.m.z80_reset && (PicoIn.opt&POPT_EN_Z80))
281 PicoSyncZ80(Pico.t.m68c_aim);
285 lines = Pico.m.pal ? 313 : 262;
286 for (y++; y < lines - 1; y++)
289 pv->v_counter = PicoVideoGetV(y, 1);
293 if (unlikely(pv->status & PVS_ACTIVE) && --hint < 0)
295 hint = pv->reg[10]; // Reload H-Int counter
300 Pico.t.m68c_line_start = Pico.t.m68c_aim;
301 do_timing_hacks_start(pv);
302 CPUS_RUN(CYCLES_M68K_LINE);
303 do_timing_hacks_end(pv);
305 if (PicoLineHook) PicoLineHook();
306 pevt_log_m68k_o(EVT_NEXT_LINE);
309 if (unlikely(PicoIn.overclockM68k)) {
310 unsigned int l = PicoIn.overclockM68k * lines / 100;
312 Pico.t.m68c_cnt -= CYCLES_M68K_LINE;
313 do_timing_hacks_start(pv);
315 do_timing_hacks_end(pv);
319 // === VBLANK last line ===
320 pv->status &= ~(SR_VB | PVS_VB2);
321 pv->status |= ((pv->reg[1] >> 3) ^ SR_VB) & SR_VB; // forced blanking
324 Pico.m.scanline = y++;
325 pv->v_counter = 0xff;
329 if (unlikely(pv->status & PVS_ACTIVE)) {
331 hint = pv->reg[10]; // Reload H-Int counter
339 Pico.t.m68c_line_start = Pico.t.m68c_aim;
340 PicoVideoFIFOMode(pv->reg[1]&0x40, pv->reg[12]&1);
341 do_timing_hacks_start(pv);
342 CPUS_RUN(CYCLES_M68K_LINE);
343 do_timing_hacks_end(pv);
345 if (PicoLineHook) PicoLineHook();
346 pevt_log_m68k_o(EVT_NEXT_LINE);
348 SyncCPUs(Pico.t.m68c_aim);
353 // get samples from sound chips
356 timers_cycle(cycles_68k_to_z80(Pico.t.m68c_aim - Pico.t.m68c_frame_start));
367 // vim:shiftwidth=2:ts=2:expandtab