5 * This work is licensed under the terms of MAME license.
6 * See COPYING file in the top-level directory.
9 #include "../pico_int.h"
10 #include "../sound/ym2612.h"
12 extern unsigned char formatted_bram[4*0x10];
13 extern unsigned int s68k_poll_adclk;
15 void (*PicoMCDopenTray)(void) = NULL;
16 void (*PicoMCDcloseTray)(void) = NULL;
19 PICO_INTERNAL void PicoInitMCD(void)
25 PICO_INTERNAL void PicoExitMCD(void)
30 PICO_INTERNAL void PicoPowerMCD(void)
32 int fmt_size = sizeof(formatted_bram);
33 memset(Pico_mcd->prg_ram, 0, sizeof(Pico_mcd->prg_ram));
34 memset(Pico_mcd->word_ram2M, 0, sizeof(Pico_mcd->word_ram2M));
35 memset(Pico_mcd->pcm_ram, 0, sizeof(Pico_mcd->pcm_ram));
36 memset(Pico_mcd->bram, 0, sizeof(Pico_mcd->bram));
37 memcpy(Pico_mcd->bram + sizeof(Pico_mcd->bram) - fmt_size, formatted_bram, fmt_size);
40 PICO_INTERNAL int PicoResetMCD(void)
42 memset(Pico_mcd->s68k_regs, 0, sizeof(Pico_mcd->s68k_regs));
43 memset(&Pico_mcd->pcm, 0, sizeof(Pico_mcd->pcm));
44 memset(&Pico_mcd->m, 0, sizeof(Pico_mcd->m));
46 *(unsigned int *)(Pico_mcd->bios + 0x70) = 0xffffffff; // reset hint vector (simplest way to implement reg6)
47 Pico_mcd->m.state_flags |= 1; // s68k reset pending
48 Pico_mcd->s68k_regs[3] = 1; // 2M word RAM mode with m68k access after reset
53 #ifdef _ASM_CD_MEMORY_C
54 //PicoMemResetCDdecode(1); // don't have to call this in 2M mode
57 // use SRam.data for RAM cart
58 if (PicoOpt & POPT_EN_MCD_RAMCART) {
59 if (SRam.data == NULL)
60 SRam.data = calloc(1, 0x12000);
62 else if (SRam.data != NULL) {
66 SRam.start = SRam.end = 0; // unused
71 static __inline void SekRunM68k(int cyc)
78 if ((cyc_do=SekCycleAim-SekCycleCnt) <= 0) return;
79 #if defined(EMU_CORE_DEBUG)
80 SekCycleCnt+=CM_compareRun(cyc_do, 0);
81 #elif defined(EMU_C68K)
82 PicoCpuCM68k.cycles=cyc_do;
83 CycloneRun(&PicoCpuCM68k);
84 SekCycleCnt+=cyc_do-PicoCpuCM68k.cycles;
85 #elif defined(EMU_M68K)
86 m68k_set_context(&PicoCpuMM68k);
87 SekCycleCnt+=m68k_execute(cyc_do);
88 #elif defined(EMU_F68K)
89 g_m68kcontext=&PicoCpuFM68k;
90 SekCycleCnt+=fm68k_emulate(cyc_do, 0, 0);
95 static __inline void SekRunS68k(int cyc)
99 if ((cyc_do=SekCycleAimS68k-SekCycleCntS68k) <= 0) return;
100 #if defined(EMU_CORE_DEBUG)
101 SekCycleCntS68k+=CM_compareRun(cyc_do, 1);
102 #elif defined(EMU_C68K)
103 PicoCpuCS68k.cycles=cyc_do;
104 CycloneRun(&PicoCpuCS68k);
105 SekCycleCntS68k+=cyc_do-PicoCpuCS68k.cycles;
106 #elif defined(EMU_M68K)
107 m68k_set_context(&PicoCpuMS68k);
108 SekCycleCntS68k+=m68k_execute(cyc_do);
109 #elif defined(EMU_F68K)
110 g_m68kcontext=&PicoCpuFS68k;
111 SekCycleCntS68k+=fm68k_emulate(cyc_do, 0, 0);
115 #define PS_STEP_M68K ((488<<16)/20) // ~24
116 //#define PS_STEP_S68K 13
118 #if defined(_ASM_CD_PICO_C)
119 extern void SekRunPS(int cyc_m68k, int cyc_s68k);
120 #elif defined(EMU_F68K)
121 static __inline void SekRunPS(int cyc_m68k, int cyc_s68k)
123 SekCycleAim+=cyc_m68k;
124 SekCycleAimS68k+=cyc_s68k;
125 fm68k_emulate(0, 1, 0);
128 static __inline void SekRunPS(int cyc_m68k, int cyc_s68k)
130 int cycn, cycn_s68k, cyc_do;
131 SekCycleAim+=cyc_m68k;
132 SekCycleAimS68k+=cyc_s68k;
134 // fprintf(stderr, "=== start %3i/%3i [%3i/%3i] {%05i.%i} ===\n", cyc_m68k, cyc_s68k,
135 // SekCycleAim-SekCycleCnt, SekCycleAimS68k-SekCycleCntS68k, Pico.m.frame_count, Pico.m.scanline);
137 /* loop 488 downto 0 in steps of PS_STEP */
138 for (cycn = (488<<16)-PS_STEP_M68K; cycn >= 0; cycn -= PS_STEP_M68K)
140 cycn_s68k = (cycn + cycn/2 + cycn/8) >> 16;
141 if ((cyc_do = SekCycleAim-SekCycleCnt-(cycn>>16)) > 0) {
142 #if defined(EMU_C68K)
143 PicoCpuCM68k.cycles = cyc_do;
144 CycloneRun(&PicoCpuCM68k);
145 SekCycleCnt += cyc_do - PicoCpuCM68k.cycles;
146 #elif defined(EMU_M68K)
147 m68k_set_context(&PicoCpuMM68k);
148 SekCycleCnt += m68k_execute(cyc_do);
149 #elif defined(EMU_F68K)
150 g_m68kcontext = &PicoCpuFM68k;
151 SekCycleCnt += fm68k_emulate(cyc_do, 0, 0);
154 if ((cyc_do = SekCycleAimS68k-SekCycleCntS68k-cycn_s68k) > 0) {
155 #if defined(EMU_C68K)
156 PicoCpuCS68k.cycles = cyc_do;
157 CycloneRun(&PicoCpuCS68k);
158 SekCycleCntS68k += cyc_do - PicoCpuCS68k.cycles;
159 #elif defined(EMU_M68K)
160 m68k_set_context(&PicoCpuMS68k);
161 SekCycleCntS68k += m68k_execute(cyc_do);
162 #elif defined(EMU_F68K)
163 g_m68kcontext = &PicoCpuFS68k;
164 SekCycleCntS68k += fm68k_emulate(cyc_do, 0, 0);
172 static __inline void check_cd_dma(void)
176 if (!(Pico_mcd->scd.Status_CDC & 0x08)) return;
178 ddx = Pico_mcd->s68k_regs[4] & 7;
179 if (ddx < 2) return; // invalid
181 Pico_mcd->s68k_regs[4] |= 0x40; // Data set ready in host port
184 if (ddx == 6) return; // invalid
186 Update_CDC_TRansfer(ddx); // now go and do the actual transfer
189 static __inline void update_chips(void)
191 int counter_timer, int3_set;
192 int counter75hz_lim = Pico.m.pal ? 2080 : 2096;
195 if ((Pico_mcd->m.counter75hz+=10) >= counter75hz_lim) {
196 Pico_mcd->m.counter75hz -= counter75hz_lim;
201 counter_timer = Pico.m.pal ? 0x21630 : 0x2121c; // 136752 : 135708;
202 Pico_mcd->m.timer_stopwatch += counter_timer;
203 if ((int3_set = Pico_mcd->s68k_regs[0x31])) {
204 Pico_mcd->m.timer_int3 -= counter_timer;
205 if (Pico_mcd->m.timer_int3 < 0) {
206 if (Pico_mcd->s68k_regs[0x33] & (1<<3)) {
207 elprintf(EL_INTS, "s68k: timer irq 3");
209 Pico_mcd->m.timer_int3 += int3_set << 16;
211 // is this really what happens if irq3 is masked out?
212 Pico_mcd->m.timer_int3 &= 0xffffff;
217 if (Pico_mcd->rot_comp.Reg_58 & 0x8000)
223 #define CPUS_RUN(m68k_cycles,s68k_cycles) \
225 if ((PicoOpt&POPT_EN_MCD_PSYNC) && (Pico_mcd->m.busreq&3) == 1) { \
226 SekRunPS(m68k_cycles, s68k_cycles); /* "better/perfect sync" */ \
228 SekRunM68k(m68k_cycles); \
229 if ((Pico_mcd->m.busreq&3) == 1) /* no busreq/no reset */ \
230 SekRunS68k(s68k_cycles); \
233 #include "../pico_cmn.c"
236 PICO_INTERNAL void PicoFrameMCD(void)
238 if (!(PicoOpt&POPT_ALT_RENDERER))