13 #include "internals.h"
18 #include "../psxdma.h"
20 #include "../psxmem.h"
21 #include "../r3000a.h"
22 #include "../psxinterpreter.h"
23 #include "../psxhle.h"
24 #include "../psxevents.h"
26 #include "../frontend/main.h"
31 #if (defined(__arm__) || defined(__aarch64__)) && !defined(ALLOW_LIGHTREC_ON_ARM)
32 #error "Lightrec should not be used on ARM (please specify DYNAREC=ari64 to make)"
35 #define ARRAY_SIZE(x) (sizeof(x) ? sizeof(x) / sizeof((x)[0]) : 0)
37 #if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
38 # define LE32TOH(x) __builtin_bswap32(x)
39 # define HTOLE32(x) __builtin_bswap32(x)
40 # define LE16TOH(x) __builtin_bswap16(x)
41 # define HTOLE16(x) __builtin_bswap16(x)
43 # define LE32TOH(x) (x)
44 # define HTOLE32(x) (x)
45 # define LE16TOH(x) (x)
46 # define HTOLE16(x) (x)
50 # define likely(x) __builtin_expect(!!(x),1)
51 # define unlikely(x) __builtin_expect(!!(x),0)
53 # define likely(x) (x)
54 # define unlikely(x) (x)
62 static struct lightrec_state *lightrec_state;
64 static char *name = "retroarch.exe";
66 static bool use_lightrec_interpreter;
67 static bool use_pcsx_interpreter;
68 static bool block_stepping;
70 extern u32 lightrec_hacks;
97 static void (*cp2_ops[])(struct psxCP2Regs *) = {
98 [OP_CP2_RTPS] = gteRTPS,
99 [OP_CP2_RTPS] = gteRTPS,
100 [OP_CP2_NCLIP] = gteNCLIP,
102 [OP_CP2_DPCS] = gteDPCS,
103 [OP_CP2_INTPL] = gteINTPL,
104 [OP_CP2_MVMVA] = gteMVMVA,
105 [OP_CP2_NCDS] = gteNCDS,
106 [OP_CP2_CDP] = gteCDP,
107 [OP_CP2_NCDT] = gteNCDT,
108 [OP_CP2_NCCS] = gteNCCS,
110 [OP_CP2_NCS] = gteNCS,
111 [OP_CP2_NCT] = gteNCT,
112 [OP_CP2_SQR] = gteSQR,
113 [OP_CP2_DCPL] = gteDCPL,
114 [OP_CP2_DPCT] = gteDPCT,
115 [OP_CP2_AVSZ3] = gteAVSZ3,
116 [OP_CP2_AVSZ4] = gteAVSZ4,
117 [OP_CP2_RTPT] = gteRTPT,
118 [OP_CP2_GPF] = gteGPF,
119 [OP_CP2_GPL] = gteGPL,
120 [OP_CP2_NCCT] = gteNCCT,
123 static char cache_buf[64 * 1024];
125 static void cop2_op(struct lightrec_state *state, u32 func)
127 struct lightrec_registers *regs = lightrec_get_registers(state);
131 if (unlikely(!cp2_ops[func & 0x3f])) {
132 fprintf(stderr, "Invalid CP2 function %u\n", func);
134 /* This works because regs->cp2c comes right after regs->cp2d,
135 * so it can be cast to a pcsxCP2Regs pointer. */
136 cp2_ops[func & 0x3f]((psxCP2Regs *) regs->cp2d);
140 static bool has_interrupt(void)
142 struct lightrec_registers *regs = lightrec_get_registers(lightrec_state);
144 return ((psxHu32(0x1070) & psxHu32(0x1074)) &&
145 (regs->cp0[12] & 0x401) == 0x401) ||
146 (regs->cp0[12] & regs->cp0[13] & 0x0300);
149 static void lightrec_tansition_to_pcsx(struct lightrec_state *state)
151 psxRegs.cycle += lightrec_current_cycle_count(state) / 1024;
152 lightrec_reset_cycle_count(state, 0);
155 static void lightrec_tansition_from_pcsx(struct lightrec_state *state)
157 s32 cycles_left = next_interupt - psxRegs.cycle;
159 if (block_stepping || cycles_left <= 0 || has_interrupt())
160 lightrec_set_exit_flags(state, LIGHTREC_EXIT_CHECK_INTERRUPT);
162 lightrec_set_target_cycle_count(state, cycles_left * 1024);
166 static void hw_write_byte(struct lightrec_state *state,
167 u32 op, void *host, u32 mem, u32 val)
169 lightrec_tansition_to_pcsx(state);
171 psxHwWrite8(mem, val);
173 lightrec_tansition_from_pcsx(state);
176 static void hw_write_half(struct lightrec_state *state,
177 u32 op, void *host, u32 mem, u32 val)
179 lightrec_tansition_to_pcsx(state);
181 psxHwWrite16(mem, val);
183 lightrec_tansition_from_pcsx(state);
186 static void hw_write_word(struct lightrec_state *state,
187 u32 op, void *host, u32 mem, u32 val)
189 lightrec_tansition_to_pcsx(state);
191 psxHwWrite32(mem, val);
193 lightrec_tansition_from_pcsx(state);
196 static u8 hw_read_byte(struct lightrec_state *state, u32 op, void *host, u32 mem)
200 lightrec_tansition_to_pcsx(state);
202 val = psxHwRead8(mem);
204 lightrec_tansition_from_pcsx(state);
209 static u16 hw_read_half(struct lightrec_state *state,
210 u32 op, void *host, u32 mem)
214 lightrec_tansition_to_pcsx(state);
216 val = psxHwRead16(mem);
218 lightrec_tansition_from_pcsx(state);
223 static u32 hw_read_word(struct lightrec_state *state,
224 u32 op, void *host, u32 mem)
228 lightrec_tansition_to_pcsx(state);
230 val = psxHwRead32(mem);
232 lightrec_tansition_from_pcsx(state);
237 static struct lightrec_mem_map_ops hw_regs_ops = {
246 static u32 cache_ctrl;
248 static void cache_ctrl_write_word(struct lightrec_state *state,
249 u32 op, void *host, u32 mem, u32 val)
254 static u32 cache_ctrl_read_word(struct lightrec_state *state,
255 u32 op, void *host, u32 mem)
260 static struct lightrec_mem_map_ops cache_ctrl_ops = {
261 .sw = cache_ctrl_write_word,
262 .lw = cache_ctrl_read_word,
265 static struct lightrec_mem_map lightrec_map[] = {
266 [PSX_MAP_KERNEL_USER_RAM] = {
267 /* Kernel and user memory */
276 [PSX_MAP_SCRATCH_PAD] = {
281 [PSX_MAP_PARALLEL_PORT] = {
286 [PSX_MAP_HW_REGISTERS] = {
287 /* Hardware registers */
292 [PSX_MAP_CACHE_CONTROL] = {
296 .ops = &cache_ctrl_ops,
299 /* Mirrors of the kernel/user memory */
300 [PSX_MAP_MIRROR1] = {
303 .mirror_of = &lightrec_map[PSX_MAP_KERNEL_USER_RAM],
305 [PSX_MAP_MIRROR2] = {
308 .mirror_of = &lightrec_map[PSX_MAP_KERNEL_USER_RAM],
310 [PSX_MAP_MIRROR3] = {
313 .mirror_of = &lightrec_map[PSX_MAP_KERNEL_USER_RAM],
316 /* Mirror of the parallel port. Only used by the PS2/PS3 BIOS */
317 [PSX_MAP_PPORT_MIRROR] = {
320 .mirror_of = &lightrec_map[PSX_MAP_PARALLEL_PORT],
324 [PSX_MAP_CODE_BUFFER] = {
325 .length = CODE_BUFFER_SIZE,
329 static void lightrec_enable_ram(struct lightrec_state *state, bool enable)
332 memcpy(psxM, cache_buf, sizeof(cache_buf));
334 memcpy(cache_buf, psxM, sizeof(cache_buf));
337 static bool lightrec_can_hw_direct(u32 kaddr, bool is_write, u8 size)
339 if (is_write && size != 32) {
340 // force32 so must go through handlers
341 if (0x1f801000 <= kaddr && kaddr < 0x1f801024)
343 if ((kaddr & 0x1fffff80) == 0x1f801080) // dma
385 return kaddr < 0x1f801c00 || kaddr >= 0x1f801e00;
416 return !is_write || kaddr < 0x1f801c00 || kaddr >= 0x1f801e00;
421 #if defined(HW_DOL) || defined(HW_RVL)
422 static void lightrec_code_inv(void *ptr, uint32_t len)
424 extern void DCFlushRange(void *ptr, u32 len);
425 extern void ICInvalidateRange(void *ptr, u32 len);
427 DCFlushRange(ptr, len);
428 ICInvalidateRange(ptr, len);
430 #elif defined(HW_WUP)
431 static void lightrec_code_inv(void *ptr, uint32_t len)
433 wiiu_clear_cache(ptr, (void *)((uintptr_t)ptr + len));
437 static const struct lightrec_ops lightrec_ops = {
439 .enable_ram = lightrec_enable_ram,
440 .hw_direct = lightrec_can_hw_direct,
441 #if defined(HW_DOL) || defined(HW_RVL) || defined(HW_WUP)
442 .code_inv = lightrec_code_inv,
446 static int lightrec_plugin_init(void)
448 lightrec_map[PSX_MAP_KERNEL_USER_RAM].address = psxM;
449 lightrec_map[PSX_MAP_BIOS].address = psxR;
450 lightrec_map[PSX_MAP_SCRATCH_PAD].address = psxH;
451 lightrec_map[PSX_MAP_HW_REGISTERS].address = psxH + 0x1000;
452 lightrec_map[PSX_MAP_PARALLEL_PORT].address = psxP;
454 if (!LIGHTREC_CUSTOM_MAP) {
456 code_buffer = mmap(0, CODE_BUFFER_SIZE,
457 PROT_EXEC | PROT_READ | PROT_WRITE,
458 MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
459 if (code_buffer == MAP_FAILED)
462 code_buffer = malloc(CODE_BUFFER_SIZE);
468 if (LIGHTREC_CUSTOM_MAP) {
469 lightrec_map[PSX_MAP_MIRROR1].address = psxM + 0x200000;
470 lightrec_map[PSX_MAP_MIRROR2].address = psxM + 0x400000;
471 lightrec_map[PSX_MAP_MIRROR3].address = psxM + 0x600000;
474 lightrec_map[PSX_MAP_CODE_BUFFER].address = code_buffer;
476 use_lightrec_interpreter = !!getenv("LIGHTREC_INTERPRETER");
478 lightrec_state = lightrec_init(name,
479 lightrec_map, ARRAY_SIZE(lightrec_map),
482 // fprintf(stderr, "M=0x%lx, P=0x%lx, R=0x%lx, H=0x%lx\n",
486 // (uintptr_t) psxH);
489 signal(SIGPIPE, exit);
494 static void lightrec_plugin_sync_regs_to_pcsx(bool need_cp2);
495 static void lightrec_plugin_sync_regs_from_pcsx(bool need_cp2);
497 static void lightrec_plugin_execute_internal(bool block_only)
499 struct lightrec_registers *regs;
500 u32 flags, cycles_pcsx;
502 regs = lightrec_get_registers(lightrec_state);
503 gen_interupt((psxCP0Regs *)regs->cp0);
504 if (!block_only && stop)
507 cycles_pcsx = next_interupt - psxRegs.cycle;
508 assert((s32)cycles_pcsx > 0);
510 // step during early boot so that 0x80030000 fastboot hack works
511 block_stepping = block_only;
515 if (use_pcsx_interpreter) {
518 u32 cycles_lightrec = cycles_pcsx * 1024;
519 if (unlikely(use_lightrec_interpreter)) {
520 psxRegs.pc = lightrec_run_interpreter(lightrec_state,
524 psxRegs.pc = lightrec_execute(lightrec_state,
525 psxRegs.pc, cycles_lightrec);
528 lightrec_tansition_to_pcsx(lightrec_state);
530 flags = lightrec_exit_flags(lightrec_state);
532 if (flags & LIGHTREC_EXIT_SEGFAULT) {
533 fprintf(stderr, "Exiting at cycle 0x%08x\n",
538 if (flags & LIGHTREC_EXIT_SYSCALL)
539 psxException(R3000E_Syscall << 2, 0, (psxCP0Regs *)regs->cp0);
540 if (flags & LIGHTREC_EXIT_BREAK)
541 psxException(R3000E_Bp << 2, 0, (psxCP0Regs *)regs->cp0);
542 else if (flags & LIGHTREC_EXIT_UNKNOWN_OP) {
543 u32 op = intFakeFetch(psxRegs.pc);
544 u32 hlec = op & 0x03ffffff;
545 if ((op >> 26) == 0x3b && hlec < ARRAY_SIZE(psxHLEt) && Config.HLE) {
546 lightrec_plugin_sync_regs_to_pcsx(0);
548 lightrec_plugin_sync_regs_from_pcsx(0);
551 psxException(R3000E_RI << 2, 0, (psxCP0Regs *)regs->cp0);
555 if ((regs->cp0[13] & regs->cp0[12] & 0x300) && (regs->cp0[12] & 0x1)) {
556 /* Handle software interrupts */
557 regs->cp0[13] &= ~0x7c;
558 psxException(regs->cp0[13], 0, (psxCP0Regs *)regs->cp0);
562 static void lightrec_plugin_execute(void)
565 lightrec_plugin_execute_internal(false);
568 static void lightrec_plugin_execute_block(enum blockExecCaller caller)
570 lightrec_plugin_execute_internal(true);
573 static void lightrec_plugin_clear(u32 addr, u32 size)
575 if ((addr == 0 && size == UINT32_MAX)
576 || (lightrec_hacks & LIGHTREC_OPT_INV_DMA_ONLY))
577 lightrec_invalidate_all(lightrec_state);
579 /* size * 4: PCSX uses DMA units */
580 lightrec_invalidate(lightrec_state, addr, size * 4);
583 static void lightrec_plugin_notify(enum R3000Anote note, void *data)
587 case R3000ACPU_NOTIFY_CACHE_ISOLATED:
588 case R3000ACPU_NOTIFY_CACHE_UNISOLATED:
589 /* not used, lightrec calls lightrec_enable_ram() instead */
591 case R3000ACPU_NOTIFY_BEFORE_SAVE:
592 /* non-null 'data' means this is HLE related sync */
593 lightrec_plugin_sync_regs_to_pcsx(data == NULL);
595 case R3000ACPU_NOTIFY_AFTER_LOAD:
596 lightrec_plugin_sync_regs_from_pcsx(data == NULL);
598 lightrec_invalidate_all(lightrec_state);
603 static void lightrec_plugin_apply_config()
605 static u32 cycles_per_op_old;
606 u32 cycle_mult = Config.cycle_multiplier_override && Config.cycle_multiplier == CYCLE_MULT_DEFAULT
607 ? Config.cycle_multiplier_override : Config.cycle_multiplier;
608 u32 cycles_per_op = cycle_mult * 1024 / 100;
609 assert(cycles_per_op);
611 if (cycles_per_op_old && cycles_per_op_old != cycles_per_op) {
612 SysPrintf("lightrec: reinit block cache for cycles_per_op %.2f\n",
613 cycles_per_op / 1024.f);
614 lightrec_plugin_clear_block_caches(lightrec_state);
616 cycles_per_op_old = cycles_per_op;
617 lightrec_set_cycles_per_opcode(lightrec_state, cycles_per_op);
620 static void lightrec_plugin_shutdown(void)
622 lightrec_destroy(lightrec_state);
624 if (!LIGHTREC_CUSTOM_MAP) {
626 munmap(code_buffer, CODE_BUFFER_SIZE);
633 static void lightrec_plugin_reset(void)
635 struct lightrec_registers *regs;
637 regs = lightrec_get_registers(lightrec_state);
639 /* Invalidate all blocks */
640 lightrec_invalidate_all(lightrec_state);
642 /* Reset registers */
643 memset(regs, 0, sizeof(*regs));
645 regs->cp0[12] = 0x10900000; // COP0 enabled | BEV = 1 | TS = 1
646 regs->cp0[15] = 0x00000002; // PRevID = Revision ID, same as R3000A
648 lightrec_set_unsafe_opt_flags(lightrec_state, lightrec_hacks);
651 static void lightrec_plugin_sync_regs_from_pcsx(bool need_cp2)
653 struct lightrec_registers *regs;
655 regs = lightrec_get_registers(lightrec_state);
656 memcpy(regs->gpr, &psxRegs.GPR, sizeof(regs->gpr));
657 memcpy(regs->cp0, &psxRegs.CP0, sizeof(regs->cp0));
659 memcpy(regs->cp2d, &psxRegs.CP2, sizeof(regs->cp2d) + sizeof(regs->cp2c));
662 static void lightrec_plugin_sync_regs_to_pcsx(bool need_cp2)
664 struct lightrec_registers *regs;
666 regs = lightrec_get_registers(lightrec_state);
667 memcpy(&psxRegs.GPR, regs->gpr, sizeof(regs->gpr));
668 memcpy(&psxRegs.CP0, regs->cp0, sizeof(regs->cp0));
670 memcpy(&psxRegs.CP2, regs->cp2d, sizeof(regs->cp2d) + sizeof(regs->cp2c));
675 lightrec_plugin_init,
676 lightrec_plugin_reset,
677 lightrec_plugin_execute,
678 lightrec_plugin_execute_block,
679 lightrec_plugin_clear,
680 lightrec_plugin_notify,
681 lightrec_plugin_apply_config,
682 lightrec_plugin_shutdown,