1 /* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
2 * Mupen64plus - r4300.c *
3 * Mupen64Plus homepage: http://code.google.com/p/mupen64plus/ *
4 * Copyright (C) 2002 Hacktarux *
6 * This program is free software; you can redistribute it and/or modify *
7 * it under the terms of the GNU General Public License as published by *
8 * the Free Software Foundation; either version 2 of the License, or *
9 * (at your option) any later version. *
11 * This program is distributed in the hope that it will be useful, *
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
14 * GNU General Public License for more details. *
16 * You should have received a copy of the GNU General Public License *
17 * along with this program; if not, write to the *
18 * Free Software Foundation, Inc., *
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. *
20 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */
25 #include "api/m64p_types.h"
26 #include "api/callbacks.h"
27 #include "api/debugger.h"
28 #include "memory/memory.h"
29 #include "main/main.h"
34 #include "exception.h"
39 #include "new_dynarec/new_dynarec.h"
42 #include "debugger/dbg_types.h"
43 #include "debugger/debugger.h"
46 unsigned int r4300emu = 0;
47 int no_compiled_jump = 0;
49 #if NEW_DYNAREC != NEW_DYNAREC_ARM
51 long long int reg[32], hi, lo;
52 unsigned int reg_cop0[32];
53 float *reg_cop1_simple[32];
54 double *reg_cop1_double[32];
56 unsigned int next_interupt;
59 long long int local_rs;
60 long long int reg_cop1_fgr_64[32];
62 unsigned int delay_slot, skip_jump = 0, dyna_interp = 0, last_addr;
63 unsigned int CIC_Chip;
64 char invalid_code[0x100000];
66 precomp_block *blocks[0x100000], *actual;
67 int rounding_mode = 0x33F, trunc_mode = 0xF3F, round_mode = 0x33F,
68 ceil_mode = 0xB3F, floor_mode = 0x73F;
70 // -----------------------------------------------------------
71 // Cached interpreter functions (and fallback for dynarec).
72 // -----------------------------------------------------------
74 #define UPDATE_DEBUGGER() if (g_DebuggerActive) update_debugger(PC->addr)
76 #define UPDATE_DEBUGGER() do { } while(0)
79 #define PCADDR PC->addr
80 #define ADD_TO_PC(x) PC += x;
81 #define DECLARE_INSTRUCTION(name) static void name(void)
83 #define DECLARE_JUMP(name, destination, condition, link, likely, cop1) \
84 static void name(void) \
86 const int take_jump = (condition); \
87 const unsigned int jump_target = (destination); \
88 long long int *link_register = (link); \
89 if (cop1 && check_cop1_unusable()) return; \
90 if (!likely || take_jump) \
98 if (take_jump && !skip_jump) \
100 if (link_register != ®[0]) \
102 *link_register=PC->addr; \
103 sign_extended(*link_register); \
105 PC=actual->block+((jump_target-actual->start)>>2); \
113 last_addr = PC->addr; \
114 if (next_interupt <= Count) gen_interupt(); \
116 static void name##_OUT(void) \
118 const int take_jump = (condition); \
119 const unsigned int jump_target = (destination); \
120 long long int *link_register = (link); \
121 if (cop1 && check_cop1_unusable()) return; \
122 if (!likely || take_jump) \
130 if (take_jump && !skip_jump) \
132 if (link_register != ®[0]) \
134 *link_register=PC->addr; \
135 sign_extended(*link_register); \
137 jump_to(jump_target); \
145 last_addr = PC->addr; \
146 if (next_interupt <= Count) gen_interupt(); \
148 static void name##_IDLE(void) \
150 const int take_jump = (condition); \
152 if (cop1 && check_cop1_unusable()) return; \
156 skip = next_interupt - Count; \
157 if (skip > 3) Count += (skip & 0xFFFFFFFC); \
163 #define CHECK_MEMORY() \
164 if (!invalid_code[address>>12]) \
165 if (blocks[address>>12]->block[(address&0xFFF)/4].ops != \
166 current_instruction_table.NOTCOMPILED) \
167 invalid_code[address>>12] = 1;
169 #include "interpreter.def"
171 // two functions are defined from the macros above but never used
172 // these prototype declarations will prevent a warning
173 #if defined(__GNUC__)
174 void JR_IDLE(void) __attribute__((used));
175 void JALR_IDLE(void) __attribute__((used));
178 // -----------------------------------------------------------
179 // Flow control 'fake' instructions
180 // -----------------------------------------------------------
181 static void FIN_BLOCK(void)
185 jump_to((PC-1)->addr+4);
187 if (g_DebuggerActive) update_debugger(PC->addr);
189 Used by dynarec only, check should be unnecessary
192 if (r4300emu == CORE_DYNAREC) dyna_jump();
196 precomp_block *blk = actual;
197 precomp_instr *inst = PC;
198 jump_to((PC-1)->addr+4);
201 if (g_DebuggerActive) update_debugger(PC->addr);
203 Used by dynarec only, check should be unnecessary
214 if (r4300emu == CORE_DYNAREC) dyna_jump();
218 static void NOTCOMPILED(void)
220 unsigned int *mem = fast_mem_access(blocks[PC->addr>>12]->start);
222 DebugMessage(M64MSG_INFO, "NOTCOMPILED: addr = %x ops = %lx", PC->addr, (long) PC->ops);
226 recompile_block((int *)mem, blocks[PC->addr >> 12], PC->addr);
228 DebugMessage(M64MSG_ERROR, "not compiled exception");
231 if (g_DebuggerActive) update_debugger(PC->addr);
233 The preceeding update_debugger SHOULD be unnecessary since it should have been
234 called before NOTCOMPILED would have been executed
237 if (r4300emu == CORE_DYNAREC)
241 static void NOTCOMPILED2(void)
246 // -----------------------------------------------------------
247 // Cached interpreter instruction table
248 // -----------------------------------------------------------
249 const cpu_instruction_table cached_interpreter_table = {
322 // Use the _OUT versions of JR and JALR, since we don't know
323 // until runtime if they're going to jump inside or outside the block
528 cpu_instruction_table current_instruction_table;
530 static unsigned int update_invalid_addr(unsigned int addr)
532 if (addr >= 0x80000000 && addr < 0xa0000000)
534 if (invalid_code[addr>>12]) invalid_code[(addr+0x20000000)>>12] = 1;
535 if (invalid_code[(addr+0x20000000)>>12]) invalid_code[addr>>12] = 1;
538 else if (addr >= 0xa0000000 && addr < 0xc0000000)
540 if (invalid_code[addr>>12]) invalid_code[(addr-0x20000000)>>12] = 1;
541 if (invalid_code[(addr-0x20000000)>>12]) invalid_code[addr>>12] = 1;
546 unsigned int paddr = virtual_to_physical_address(addr, 2);
549 unsigned int beg_paddr = paddr - (addr - (addr&~0xFFF));
550 update_invalid_addr(paddr);
551 if (invalid_code[(beg_paddr+0x000)>>12]) invalid_code[addr>>12] = 1;
552 if (invalid_code[(beg_paddr+0xFFC)>>12]) invalid_code[addr>>12] = 1;
553 if (invalid_code[addr>>12]) invalid_code[(beg_paddr+0x000)>>12] = 1;
554 if (invalid_code[addr>>12]) invalid_code[(beg_paddr+0xFFC)>>12] = 1;
560 #define addr jump_to_address
561 unsigned int jump_to_address;
562 void jump_to_func(void)
565 if (skip_jump) return;
566 paddr = update_invalid_addr(addr);
568 actual = blocks[addr>>12];
569 if (invalid_code[addr>>12])
571 if (!blocks[addr>>12])
573 blocks[addr>>12] = (precomp_block *) malloc(sizeof(precomp_block));
574 actual = blocks[addr>>12];
575 blocks[addr>>12]->code = NULL;
576 blocks[addr>>12]->block = NULL;
577 blocks[addr>>12]->jumps_table = NULL;
578 blocks[addr>>12]->riprel_table = NULL;
580 blocks[addr>>12]->start = addr & ~0xFFF;
581 blocks[addr>>12]->end = (addr & ~0xFFF) + 0x1000;
582 init_block(blocks[addr>>12]);
584 PC=actual->block+((addr-actual->start)>>2);
586 if (r4300emu == CORE_DYNAREC) dyna_jump();
590 void generic_jump_to(unsigned int address)
592 if (r4300emu == CORE_PURE_INTERPRETER)
596 if (r4300emu == CORE_DYNAREC)
606 /* Refer to Figure 6-2 on page 155 and explanation on page B-11
607 of MIPS R4000 Microprocessor User's Manual (Second Edition)
610 void shuffle_fpr_data(int oldStatus, int newStatus)
612 #if defined(M64P_BIG_ENDIAN)
613 const int isBigEndian = 1;
615 const int isBigEndian = 0;
618 if ((newStatus & 0x04000000) != (oldStatus & 0x04000000))
623 // pack or unpack the FGR register data
624 if (newStatus & 0x04000000)
625 { // switching into 64-bit mode
626 // retrieve 32 FPR values from packed 32-bit FGR registers
627 for (i = 0; i < 32; i++)
629 temp_fgr_32[i] = *((int *) ®_cop1_fgr_64[i>>1] + ((i & 1) ^ isBigEndian));
631 // unpack them into 32 64-bit registers, taking the high 32-bits from their temporary place in the upper 16 FGRs
632 for (i = 0; i < 32; i++)
634 int high32 = *((int *) ®_cop1_fgr_64[(i>>1)+16] + (i & 1));
635 *((int *) ®_cop1_fgr_64[i] + isBigEndian) = temp_fgr_32[i];
636 *((int *) ®_cop1_fgr_64[i] + (isBigEndian^1)) = high32;
640 { // switching into 32-bit mode
641 // retrieve the high 32 bits from each 64-bit FGR register and store in temp array
642 for (i = 0; i < 32; i++)
644 temp_fgr_32[i] = *((int *) ®_cop1_fgr_64[i] + (isBigEndian^1));
646 // take the low 32 bits from each register and pack them together into 64-bit pairs
647 for (i = 0; i < 16; i++)
649 unsigned int least32 = *((unsigned int *) ®_cop1_fgr_64[i*2] + isBigEndian);
650 unsigned int most32 = *((unsigned int *) ®_cop1_fgr_64[i*2+1] + isBigEndian);
651 reg_cop1_fgr_64[i] = ((unsigned long long) most32 << 32) | (unsigned long long) least32;
653 // store the high bits in the upper 16 FGRs, which wont be accessible in 32-bit mode
654 for (i = 0; i < 32; i++)
656 *((int *) ®_cop1_fgr_64[(i>>1)+16] + (i & 1)) = temp_fgr_32[i];
662 void set_fpr_pointers(int newStatus)
665 #if defined(M64P_BIG_ENDIAN)
666 const int isBigEndian = 1;
668 const int isBigEndian = 0;
671 // update the FPR register pointers
672 if (newStatus & 0x04000000)
674 for (i = 0; i < 32; i++)
676 reg_cop1_double[i] = (double*) ®_cop1_fgr_64[i];
677 reg_cop1_simple[i] = ((float*) ®_cop1_fgr_64[i]) + isBigEndian;
682 for (i = 0; i < 32; i++)
684 reg_cop1_double[i] = (double*) ®_cop1_fgr_64[i>>1];
685 reg_cop1_simple[i] = ((float*) ®_cop1_fgr_64[i>>1]) + ((i & 1) ^ isBigEndian);
690 int check_cop1_unusable(void)
692 if (!(Status & 0x20000000))
694 Cause = (11 << 2) | 0x10000000;
701 void update_count(void)
704 if (r4300emu != CORE_DYNAREC)
707 Count = Count + (PC->addr - last_addr)/2;
708 last_addr = PC->addr;
715 CoreCompareCallback();
718 if (g_DebuggerActive && !delay_slot) update_debugger(PC->addr);
723 void init_blocks(void)
726 for (i=0; i<0x100000; i++)
733 void free_blocks(void)
736 for (i=0; i<0x100000; i++)
740 free_block(blocks[i]);
747 /* this hard reset function simulates the boot-up state of the R4300 CPU */
748 void r4300_reset_hard(void)
752 // clear r4300 registers and TLB entries
753 for (i = 0; i < 32; i++)
757 reg_cop1_fgr_64[i]=0;
759 // --------------tlb------------------------
773 //tlb_e[i].check_parity_mask=0x1000;
775 tlb_e[i].start_even=0;
777 tlb_e[i].phys_even=0;
778 tlb_e[i].start_odd=0;
782 for (i=0; i<0x100000; i++)
793 // set COP0 registers
796 set_fpr_pointers(Status);
803 BadVAddr = 0xFFFFFFFF;
804 ErrorEPC = 0xFFFFFFFF;
806 rounding_mode = 0x33F;
809 /* this soft reset function simulates the actions of the PIF ROM, which may vary by region
810 * TODO: accurately simulate the effects of the PIF ROM in the case of a soft reset
811 * (e.g. Goldeneye crashes) */
812 void r4300_reset_soft(void)
817 // copy boot code from ROM to SP_DMEM
818 memcpy((char *)SP_DMEM+0x40, rom+0x40, 0xFC0);
820 // the following values are extracted from the pj64 source code
821 // thanks to Zilmar and Jabo
823 reg[6] = 0xFFFFFFFFA4001F0CLL;
824 reg[7] = 0xFFFFFFFFA4001F08LL;
825 reg[8] = 0x00000000000000C0LL;
826 reg[10]= 0x0000000000000040LL;
827 reg[11]= 0xFFFFFFFFA4000040LL;
828 reg[29]= 0xFFFFFFFFA4001FF0LL;
830 // figure out which ROM type is loaded
831 for (i = 0x40/4; i < (0x1000/4); i++)
834 case 0x000000D0027FDF31LL:
835 case 0x000000CFFB631223LL:
838 case 0x000000D057C85244LL:
841 case 0x000000D6497E414BLL:
844 case 0x0000011A49F60E96LL:
847 case 0x000000D6D5BE5580LL:
854 switch(ROM_PARAMS.systemtype)
859 reg[5] = 0xFFFFFFFFC0F1D859LL;
860 reg[14]= 0x000000002DE108EALL;
863 reg[5] = 0xFFFFFFFFD4646273LL;
864 reg[14]= 0x000000001AF99984LL;
867 SP_IMEM[1] = 0xBDA807FC;
868 reg[5] = 0xFFFFFFFFDECAAAD1LL;
869 reg[14]= 0x000000000CF85C13LL;
870 reg[24]= 0x0000000000000002LL;
873 reg[5] = 0xFFFFFFFFB04DC903LL;
874 reg[14]= 0x000000001AF99984LL;
875 reg[24]= 0x0000000000000002LL;
878 reg[23]= 0x0000000000000006LL;
879 reg[31]= 0xFFFFFFFFA4001554LL;
885 reg[5] = 0xFFFFFFFFC95973D5LL;
886 reg[14]= 0x000000002449A366LL;
889 reg[5] = 0xFFFFFFFF95315A28LL;
890 reg[14]= 0x000000005BACA1DFLL;
893 SP_IMEM[1] = 0x8DA807FC;
894 reg[5] = 0x000000005493FB9ALL;
895 reg[14]= 0xFFFFFFFFC2C20384LL;
898 reg[5] = 0xFFFFFFFFE067221FLL;
899 reg[14]= 0x000000005CD2B70FLL;
902 reg[20]= 0x0000000000000001LL;
903 reg[24]= 0x0000000000000003LL;
904 reg[31]= 0xFFFFFFFFA4001550LL;
908 reg[22]= 0x000000000000003FLL;
911 reg[1] = 0x0000000000000001LL;
912 reg[2] = 0x000000000EBDA536LL;
913 reg[3] = 0x000000000EBDA536LL;
914 reg[4] = 0x000000000000A536LL;
915 reg[12]= 0xFFFFFFFFED10D0B3LL;
916 reg[13]= 0x000000001402A4CCLL;
917 reg[15]= 0x000000003103E121LL;
918 reg[22]= 0x000000000000003FLL;
919 reg[25]= 0xFFFFFFFF9DEBB54FLL;
922 reg[1] = 0x0000000000000001LL;
923 reg[2] = 0x0000000049A5EE96LL;
924 reg[3] = 0x0000000049A5EE96LL;
925 reg[4] = 0x000000000000EE96LL;
926 reg[12]= 0xFFFFFFFFCE9DFBF7LL;
927 reg[13]= 0xFFFFFFFFCE9DFBF7LL;
928 reg[15]= 0x0000000018B63D28LL;
929 reg[22]= 0x0000000000000078LL;
930 reg[25]= 0xFFFFFFFF825B21C9LL;
933 SP_IMEM[0] = 0x3C0DBFC0;
934 SP_IMEM[2] = 0x25AD07C0;
935 SP_IMEM[3] = 0x31080080;
936 SP_IMEM[4] = 0x5500FFFC;
937 SP_IMEM[5] = 0x3C0DBFC0;
938 SP_IMEM[6] = 0x8DA80024;
939 SP_IMEM[7] = 0x3C0BB000;
940 reg[2] = 0xFFFFFFFFF58B0FBFLL;
941 reg[3] = 0xFFFFFFFFF58B0FBFLL;
942 reg[4] = 0x0000000000000FBFLL;
943 reg[12]= 0xFFFFFFFF9651F81ELL;
944 reg[13]= 0x000000002D42AAC5LL;
945 reg[15]= 0x0000000056584D60LL;
946 reg[22]= 0x0000000000000091LL;
947 reg[25]= 0xFFFFFFFFCDCE565FLL;
950 reg[2] = 0xFFFFFFFFA95930A4LL;
951 reg[3] = 0xFFFFFFFFA95930A4LL;
952 reg[4] = 0x00000000000030A4LL;
953 reg[12]= 0xFFFFFFFFBCB59510LL;
954 reg[13]= 0xFFFFFFFFBCB59510LL;
955 reg[15]= 0x000000007A3C07F4LL;
956 reg[22]= 0x0000000000000085LL;
957 reg[25]= 0x00000000465E3F72LL;
964 static void dynarec_setup_code(void)
966 // The dynarec jumps here after we call dyna_start and it prepares
967 // Here we need to prepare the initial code block and jump to it
970 // Prevent segfault on failed jump_to
971 if (!actual->block || !actual->code)
976 void r4300_execute(void)
978 #if defined(COUNT_INSTR) || (defined(DYNAREC) && defined(PROFILE_R4300))
982 current_instruction_table = cached_interpreter_table;
988 /* clear instruction counters */
989 #if defined(COUNT_INSTR)
990 for (i = 0; i < 131; i++)
994 last_addr = 0xa4000040;
995 next_interupt = 624999;
998 if (r4300emu == CORE_PURE_INTERPRETER)
1000 DebugMessage(M64MSG_INFO, "Starting R4300 emulator: Pure Interpreter");
1001 r4300emu = CORE_PURE_INTERPRETER;
1004 #if defined(DYNAREC)
1005 else if (r4300emu >= 2)
1007 DebugMessage(M64MSG_INFO, "Starting R4300 emulator: Dynamic Recompiler");
1008 r4300emu = CORE_DYNAREC;
1014 new_dynarec_cleanup();
1016 dyna_start(dynarec_setup_code);
1019 #if defined(PROFILE_R4300)
1020 pfProfile = fopen("instructionaddrs.dat", "ab");
1021 for (i=0; i<0x100000; i++)
1022 if (invalid_code[i] == 0 && blocks[i] != NULL && blocks[i]->code != NULL && blocks[i]->block != NULL)
1024 unsigned char *x86addr;
1026 // store final code length for this block
1027 mipsop = -1; /* -1 == end of x86 code block */
1028 x86addr = blocks[i]->code + blocks[i]->code_length;
1029 if (fwrite(&mipsop, 1, 4, pfProfile) != 4 ||
1030 fwrite(&x86addr, 1, sizeof(char *), pfProfile) != sizeof(char *))
1031 DebugMessage(M64MSG_ERROR, "Error writing R4300 instruction address profiling data");
1039 else /* if (r4300emu == CORE_INTERPRETER) */
1041 DebugMessage(M64MSG_INFO, "Starting R4300 emulator: Cached Interpreter");
1042 r4300emu = CORE_INTERPRETER;
1044 jump_to(0xa4000040);
1046 /* Prevent segfault on failed jump_to */
1050 last_addr = PC->addr;
1054 if (PC->ops == FIN_BLOCK && (PC->addr < 0x80000000 || PC->addr >= 0xc0000000))
1055 virtual_to_physical_address(PC->addr, 2);
1056 CoreCompareCallback();
1059 if (g_DebuggerActive) update_debugger(PC->addr);
1067 DebugMessage(M64MSG_INFO, "R4300 emulator finished.");
1069 /* print instruction counts */
1070 #if defined(COUNT_INSTR)
1071 if (r4300emu == CORE_DYNAREC)
1073 unsigned int iTypeCount[11] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
1074 unsigned int iTotal = 0;
1075 char line[128], param[24];
1076 DebugMessage(M64MSG_INFO, "Instruction counters:");
1078 for (i = 0; i < 131; i++)
1080 sprintf(param, "%8s: %08i ", instr_name[i], instr_count[i]);
1081 strcat(line, param);
1084 DebugMessage(M64MSG_INFO, "%s", line);
1087 iTypeCount[instr_type[i]] += instr_count[i];
1088 iTotal += instr_count[i];
1090 DebugMessage(M64MSG_INFO, "Instruction type summary (total instructions = %i)", iTotal);
1091 for (i = 0; i < 11; i++)
1093 DebugMessage(M64MSG_INFO, "%20s: %04.1f%% (%i)", instr_typename[i], (float) iTypeCount[i] * 100.0 / iTotal, iTypeCount[i]);