6 unsigned int r[16]; // 00
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7 unsigned int pc; // 40
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11 unsigned int gbr, vbr; // 50
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12 unsigned int mach, macl; // 58
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14 // interpreter stuff
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15 int icount; // 60 cycles left in current timeslice
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18 unsigned int test_irq;
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21 const void *read8_map; // 70
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22 const void *read16_map;
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23 const void **write8_tab;
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24 const void **write16_tab;
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27 //void **pc_hashtab; // 80
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29 int pending_level; // MAX(pending_irl, pending_int_irq)
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31 int pending_int_irq; // internal irq
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32 int pending_int_vector;
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33 void (*irq_callback)(int id, int level);
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36 unsigned int cycles_aim; // subtract sh2_icount to get global counter
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37 unsigned int cycles_done;
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40 extern SH2 *sh2; // active sh2
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42 int sh2_init(SH2 *sh2, int is_slave);
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43 void sh2_finish(SH2 *sh2);
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44 void sh2_reset(SH2 *sh2);
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45 void sh2_irl_irq(SH2 *sh2, int level);
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46 void sh2_internal_irq(SH2 *sh2, int level, int vector);
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47 void sh2_do_irq(SH2 *sh2, int level, int vector);
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49 void sh2_execute(SH2 *sh2, int cycles);
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52 // XXX: move somewhere else
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53 #if !defined(REGPARM) && defined(__i386__)
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54 #define REGPARM(x) __attribute__((regparm(x)))
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59 unsigned int REGPARM(2) p32x_sh2_read8(unsigned int a, SH2 *sh2);
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60 unsigned int REGPARM(2) p32x_sh2_read16(unsigned int a, SH2 *sh2);
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61 unsigned int REGPARM(2) p32x_sh2_read32(unsigned int a, SH2 *sh2);
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62 void REGPARM(3) p32x_sh2_write8(unsigned int a, unsigned int d, SH2 *sh2);
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63 void REGPARM(3) p32x_sh2_write16(unsigned int a, unsigned int d, SH2 *sh2);
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64 void REGPARM(3) p32x_sh2_write32(unsigned int a, unsigned int d, SH2 *sh2);
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66 #endif /* __SH2_H__ */
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