4 typedef signed char INT8;
5 typedef signed short INT16;
6 typedef signed int INT32;
7 typedef unsigned int UINT32;
8 typedef unsigned short UINT16;
9 typedef unsigned char UINT8;
11 #define RB(a) p32x_sh2_read8(a,sh2->is_slave)
12 #define RW(a) p32x_sh2_read16(a,sh2->is_slave)
13 #define RL(a) p32x_sh2_read32(a,sh2->is_slave)
14 #define WB(a,d) p32x_sh2_write8(a,d,sh2->is_slave)
15 #define WW(a,d) p32x_sh2_write16(a,d,sh2->is_slave)
16 #define WL(a,d) p32x_sh2_write32(a,d,sh2->is_slave)
18 // some stuff from sh2comn.h
27 #define FLAGS (M|Q|I|S|T)
29 #define Rn ((opcode>>8)&15)
30 #define Rm ((opcode>>4)&15)
32 #define sh2_icount sh2->icount
38 void sh2_execute(SH2 *sh2_, int cycles)
41 sh2->cycles_aim += cycles;
42 sh2->icount = cycles = sh2->cycles_aim - sh2->cycles_done;
53 sh2->ppc = sh2->delay;
54 opcode = RW(sh2->delay);
66 switch (opcode & ( 15 << 12))
68 case 0<<12: op0000(opcode); break;
69 case 1<<12: op0001(opcode); break;
70 case 2<<12: op0010(opcode); break;
71 case 3<<12: op0011(opcode); break;
72 case 4<<12: op0100(opcode); break;
73 case 5<<12: op0101(opcode); break;
74 case 6<<12: op0110(opcode); break;
75 case 7<<12: op0111(opcode); break;
76 case 8<<12: op1000(opcode); break;
77 case 9<<12: op1001(opcode); break;
78 case 10<<12: op1010(opcode); break;
79 case 11<<12: op1011(opcode); break;
80 case 12<<12: op1100(opcode); break;
81 case 13<<12: op1101(opcode); break;
82 case 14<<12: op1110(opcode); break;
83 default: op1111(opcode); break;
86 if (sh2->test_irq && !sh2->delay)
88 if (sh2->pending_irl > sh2->pending_int_irq)
89 sh2_irl_irq(sh2, sh2->pending_irl);
91 sh2_internal_irq(sh2, sh2->pending_int_irq, sh2->pending_int_vector);
96 while (sh2->icount > 0 || sh2->delay); /* can't interrupt before delay */
98 sh2->cycles_done += cycles - sh2->icount;
104 void __attribute__((regparm(2))) sh2_do_op(SH2 *sh2_, int opcode)
109 switch (opcode & ( 15 << 12))
111 case 0<<12: op0000(opcode); break;
112 case 1<<12: op0001(opcode); break;
113 case 2<<12: op0010(opcode); break;
114 case 3<<12: op0011(opcode); break;
115 case 4<<12: op0100(opcode); break;
116 case 5<<12: op0101(opcode); break;
117 case 6<<12: op0110(opcode); break;
118 case 7<<12: op0111(opcode); break;
119 case 8<<12: op1000(opcode); break;
120 case 9<<12: op1001(opcode); break;
121 case 10<<12: op1010(opcode); break;
122 case 11<<12: op1011(opcode); break;
123 case 12<<12: op1100(opcode); break;
124 case 13<<12: op1101(opcode); break;
125 case 14<<12: op1110(opcode); break;
126 default: op1111(opcode); break;
131 if (sh2->pending_irl > sh2->pending_int_irq)
132 sh2_irl_irq(sh2, sh2->pending_irl);
134 sh2_internal_irq(sh2, sh2->pending_int_irq, sh2->pending_int_vector);