4 * Copyright (C) 2007 ziggy
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
24 #include <sys/types.h>
31 typedef int (* gen_f)(RSP_REGS & rsp);
57 static opinfo_t opinfo[0x1000/4];
58 static int nb_branches;
59 static branch_t branches[256];
61 static int labels[256];
63 #define OPI(pc) opinfo[(pc)>>2]
64 /*inline*/ void SETLABEL(int pc) {
67 assert(pc >= 0 && pc < 0x1000);
68 if (OPI(pc).labeled != curvisit) {
69 labels[nb_labels] = pc;
70 OPI(pc).label = nb_labels++;
71 assert(nb_labels < sizeof(labels)/sizeof(labels[0]));
72 OPI(pc).labeled = curvisit;
76 #define ABS(addr) (((addr) << 2) & 0xfff)
77 #define REL(offset) ((pc + ((offset) << 2)) & 0xfff)
79 static UINT32 prep_gen(int pc, UINT32 crc, int & len)
84 branches[nb_branches].start = pc;
88 if (OPI(pc).visit == curvisit) {
90 SETLABEL((pc+4)&0xfff);
94 OPI(pc).visit = curvisit;
97 crc = ((crc<<1)|(crc>>31))^op^pc;
103 case 0x00: /* SPECIAL */
110 case 0x09: /* JALR */
113 case 0x0d: /* BREAK */
120 case 0x01: /* REGIMM */
124 case 0x00: /* BLTZ */
125 case 0x01: /* BGEZ */
126 SETLABEL(REL(SIMM16));
128 case 0x11: /* BGEZAL */
136 SETLABEL(ABS(UIMM26));
141 case 0x06: /* BLEZ */
142 case 0x07: /* BGTZ */
143 SETLABEL(REL(SIMM16));
146 //SETLABEL(ABS(UIMM26));
153 branches[nb_branches++].end = pc;
154 assert(nb_branches < sizeof(branches)/sizeof(branches[0]));
159 static char tmps[1024];
160 static char * delayed;
164 has_cond = 1, fprintf
167 if (cont && OPI((pc+4)&0xfff).labeled == curvisit) { \
168 COND(fp, "cond = 1; \n"); \
173 static void D_JUMP_ABS(UINT32 addr)
176 sprintf(tmps, "%s { /*if (rsp.inval_gen) { rsp.nextpc=0x%x; return 0; }*/ %s goto L%d; }", has_cond? "if (cond)":"", a, has_cond? "cond=0; ":"", OPI(a).label);
180 static void D_JUMP_REL(int pc, int offset)
182 D_JUMP_ABS(pc+4 + ((offset) << 2));
187 sprintf(tmps, "%s { return 0; }", has_cond? "if (cond)":"");
191 static void D_JUMPL(int pc)
197 " if (res = rsp_jump(rsp.nextpc)) return res; \n"
198 " if (/*rsp.inval_gen || */sp_pc != 0x%x) return 0; \n"
199 "}", has_cond? "if (cond)":"", has_cond?" cond=0; \n":"", (pc+8)&0xfff);
204 static void dogen(const char * s, UINT32 op, FILE * fp)
206 fprintf(fp, "#define op 0x%x\n%s\n#undef op\n", op, s);
209 #define GEN(s) dogen(s, op, fp)
211 static void rsp_gen(int pc)
214 const char * old_delayed;
219 // we looped, reset all visit counters
220 for (i=0; i<0x1000/4; i++) {
222 opinfo[i].labeled = 0;
231 UINT32 crc = prep_gen(pc, 0, len);
233 for (i=0; i<nb_labels; i++) {
234 if (OPI(labels[i]).visit != curvisit)
235 crc = prep_gen(labels[i], crc, len);
241 sprintf(lib, "z64/rspgen/%x-%x-%x.so", crc, pc, len);
242 sprintf(sym, "doit%x", crc);
244 opinfo_t * opi = &OPI(pc);
246 for (i=0; i<opi->nbgen; i++)
247 if (opi->gentable[i].crc == crc) {
248 opi->curgen = opi->gentable + i;
252 if (opi->nbgen >= opi->szgen) {
257 opi->gentable = (gen_t *) realloc(opi->gentable, sizeof(gen_t)*(opi->szgen));
260 gen = opi->gentable + opi->nbgen++;
264 strcpy(gen->name, lib);
268 gen->lib = dlopen(lib, RTLD_NOW);
270 gen->f = (gen_f) dlsym(gen->lib, sym);
272 fprintf(stderr, "reloaded %s\n", lib);
276 // printf("%s\n", dlerror());
278 sprintf(src, "z64/rspgen/%x-%x-%x.cpp", crc, pc, len);
279 FILE * fp = fopen(src, "w");
282 "#include \"rsp.h\"\n"
289 for (i=0; i<nb_branches; i++) {
292 //fprintf(stderr, "branch %x --> %x\n", branches[i].start, branches[i].end-4);
293 for (pc=branches[i].start; cont || delayed; pc = (pc+4)&0xfff) {
294 UINT32 op = ROPCODE(pc);
296 rsp_dasm_one(s, pc, op);
297 if (cont && OPI(pc).labeled == curvisit)
298 fprintf(fp, "L%d: ;\n", OPI(pc).label);
299 //fprintf(fp, "/* %3x\t%s */\n", pc, s);
300 fprintf(fp, "GENTRACE(\"%3x\t%s\\n\");\n", pc, s);
303 old_delayed = delayed;
306 if (((pc+4)&0xfff)==branches[i].end)
311 case 0x00: /* SPECIAL */
322 case 0x09: /* JALR */
329 case 0x0d: /* BREAK */
331 //delayed = "return 1;";
338 case 0x01: /* REGIMM */
342 case 0x00: /* BLTZ */
344 COND(fp, " cond=(INT32)(_RSVAL(0x%x)) < 0;\n", op);
345 D_JUMP_REL(pc, _SIMM16(op));
349 case 0x01: /* BGEZ */
351 COND(fp, " cond=(INT32)(_RSVAL(0x%x)) >= 0;\n", op);
352 D_JUMP_REL(pc, _SIMM16(op));
356 case 0x11: /* BGEZAL */
358 COND(fp, "cond=(INT32)(_RSVAL(0x%x)) >= 0;\n", op);
368 D_JUMP_ABS(_UIMM26(op) <<2);
374 COND(fp, " cond=_RSVAL(0x%0x) == _RTVAL(0x%0x);\n", op, op);
375 D_JUMP_REL(pc, _SIMM16(op));
381 COND(fp, " cond=_RSVAL(0x%0x) != _RTVAL(0x%0x);\n", op, op);
382 D_JUMP_REL(pc, _SIMM16(op));
386 case 0x06: /* BLEZ */
388 COND(fp, " cond=(INT32)_RSVAL(0x%0x) <= 0;\n", op);
389 D_JUMP_REL(pc, _SIMM16(op));
393 case 0x07: /* BGTZ */
395 COND(fp, " cond=(INT32)_RSVAL(0x%0x) > 0;\n", op);
396 D_JUMP_REL(pc, _SIMM16(op));
409 if (!(br&4) && (!old_delayed || !br)) {
410 if (br && !(br&16)) {
411 fprintf(fp, "sp_pc = 0x%x;\n", (pc + 4)&0xfff);
413 //fprintf(fp, "rsp_execute_one(0x%x);\n", op);
421 case 0x00: /* SPECIAL */
425 case 0x00: /* SLL */ if (RDREG) GEN("RDVAL = (UINT32)RTVAL << SHIFT;"); break;
426 case 0x02: /* SRL */ if (RDREG) GEN("RDVAL = (UINT32)RTVAL >> SHIFT; "); break;
427 case 0x03: /* SRA */ if (RDREG) GEN("RDVAL = (INT32)RTVAL >> SHIFT; "); break;
428 case 0x04: /* SLLV */ if (RDREG) GEN("RDVAL = (UINT32)RTVAL << (RSVAL & 0x1f); "); break;
429 case 0x06: /* SRLV */ if (RDREG) GEN("RDVAL = (UINT32)RTVAL >> (RSVAL & 0x1f); "); break;
430 case 0x07: /* SRAV */ if (RDREG) GEN("RDVAL = (INT32)RTVAL >> (RSVAL & 0x1f); "); break;
431 case 0x08: /* JR */ GEN("JUMP_PC(RSVAL); "); break;
432 case 0x09: /* JALR */ GEN("JUMP_PC_L(RSVAL, RDREG); "); break;
433 case 0x0d: /* BREAK */
437 *z64_rspinfo.SP_STATUS_REG |= (SP_STATUS_HALT | SP_STATUS_BROKE ); \
438 if ((*z64_rspinfo.SP_STATUS_REG & SP_STATUS_INTR_BREAK) != 0 ) { \
439 *z64_rspinfo.MI_INTR_REG |= 1; \
440 z64_rspinfo.CheckInterrupts(); \
447 case 0x20: /* ADD */ if (RDREG) GEN("RDVAL = (INT32)(RSVAL + RTVAL); "); break;
448 case 0x21: /* ADDU */ if (RDREG) GEN("RDVAL = (INT32)(RSVAL + RTVAL); "); break;
449 case 0x22: /* SUB */ if (RDREG) GEN("RDVAL = (INT32)(RSVAL - RTVAL); "); break;
450 case 0x23: /* SUBU */ if (RDREG) GEN("RDVAL = (INT32)(RSVAL - RTVAL); "); break;
451 case 0x24: /* AND */ if (RDREG) GEN("RDVAL = RSVAL & RTVAL; "); break;
452 case 0x25: /* OR */ if (RDREG) GEN("RDVAL = RSVAL | RTVAL; "); break;
453 case 0x26: /* XOR */ if (RDREG) GEN("RDVAL = RSVAL ^ RTVAL; "); break;
454 case 0x27: /* NOR */ if (RDREG) GEN("RDVAL = ~(RSVAL | RTVAL); "); break;
455 case 0x2a: /* SLT */ if (RDREG) GEN("RDVAL = (INT32)RSVAL < (INT32)RTVAL; "); break;
456 case 0x2b: /* SLTU */ if (RDREG) GEN("RDVAL = (UINT32)RSVAL < (UINT32)RTVAL; "); break;
457 default: GEN("unimplemented_opcode(op); "); break;
462 case 0x01: /* REGIMM */
466 case 0x00: /* BLTZ */ GEN("if ((INT32)(RSVAL) < 0) JUMP_REL(SIMM16); "); break;
467 case 0x01: /* BGEZ */ GEN("if ((INT32)(RSVAL) >= 0) JUMP_REL(SIMM16); "); break;
468 // VP according to the doc, link is performed even when condition fails
469 case 0x11: /* BGEZAL */ GEN("LINK(31); if ((INT32)(RSVAL) >= 0) JUMP_REL(SIMM16); "); break;
470 //case 0x11: /* BGEZAL */ if ((INT32)(RSVAL) >= 0) JUMP_REL_L(SIMM16, 31); break;
471 default: GEN("unimplemented_opcode(op); "); break;
476 case 0x02: /* J */ GEN("JUMP_ABS(UIMM26); "); break;
477 case 0x03: /* JAL */ GEN("JUMP_ABS_L(UIMM26, 31); "); break;
478 case 0x04: /* BEQ */ GEN("if (RSVAL == RTVAL) JUMP_REL(SIMM16); "); break;
479 case 0x05: /* BNE */ GEN("if (RSVAL != RTVAL) JUMP_REL(SIMM16); "); break;
480 case 0x06: /* BLEZ */ GEN("if ((INT32)RSVAL <= 0) JUMP_REL(SIMM16); "); break;
481 case 0x07: /* BGTZ */ GEN("if ((INT32)RSVAL > 0) JUMP_REL(SIMM16); "); break;
482 case 0x08: /* ADDI */ if (RTREG) GEN("RTVAL = (INT32)(RSVAL + SIMM16); "); break;
483 case 0x09: /* ADDIU */ if (RTREG) GEN("RTVAL = (INT32)(RSVAL + SIMM16); "); break;
484 case 0x0a: /* SLTI */ if (RTREG) GEN("RTVAL = (INT32)(RSVAL) < ((INT32)SIMM16); "); break;
485 case 0x0b: /* SLTIU */ if (RTREG) GEN("RTVAL = (UINT32)(RSVAL) < (UINT32)((INT32)SIMM16); "); break;
486 case 0x0c: /* ANDI */ if (RTREG) GEN("RTVAL = RSVAL & UIMM16; "); break;
487 case 0x0d: /* ORI */ if (RTREG) GEN("RTVAL = RSVAL | UIMM16; "); break;
488 case 0x0e: /* XORI */ if (RTREG) GEN("RTVAL = RSVAL ^ UIMM16; "); break;
489 case 0x0f: /* LUI */ if (RTREG) GEN("RTVAL = UIMM16 << 16; "); break;
491 case 0x10: /* COP0 */
493 switch ((op >> 21) & 0x1f)
495 case 0x00: /* MFC0 */ if (RTREG) GEN("RTVAL = get_cop0_reg(rsp, RDREG); "); break;
496 case 0x04: /* MTC0 */
498 GEN("set_cop0_reg(rsp, RDREG, RTVAL); \n");
499 if (RDREG == 0x08/4) {
501 "if (rsp.inval_gen) {\n"
502 " rsp.inval_gen = 0;\n"
511 log(M64MSG_WARNING, "unimplemented cop0 %x (%x)\n", (op >> 21) & 0x1f, op);
517 case 0x12: /* COP2 */
519 switch ((op >> 21) & 0x1f)
521 case 0x00: /* MFC2 */
523 // 31 25 20 15 10 6 0
524 // ---------------------------------------------------
525 // | 010010 | 00000 | TTTTT | DDDDD | IIII | 0000000 |
526 // ---------------------------------------------------
529 {int el = (op >> 7) & 0xf;\
530 UINT16 b1 = VREG_B(VS1REG, (el+0) & 0xf);\
531 UINT16 b2 = VREG_B(VS1REG, (el+1) & 0xf);\
532 RTVAL = (INT32)(INT16)((b1 << 8) | (b2));}\
536 case 0x02: /* CFC2 */
539 // ------------------------------------------------
540 // | 010010 | 00010 | TTTTT | DDDDD | 00000000000 |
541 // ------------------------------------------------
544 // VP to sign extend or to not sign extend ?
545 //if (RTREG) RTVAL = (INT16)rsp.flag[RDREG];
546 if (RTREG) GEN("RTVAL = rsp.flag[RDREG];");
549 case 0x04: /* MTC2 */
551 // 31 25 20 15 10 6 0
552 // ---------------------------------------------------
553 // | 010010 | 00100 | TTTTT | DDDDD | IIII | 0000000 |
554 // ---------------------------------------------------
557 {int el = (op >> 7) & 0xf;\
558 VREG_B(VS1REG, (el+0) & 0xf) = (RTVAL >> 8) & 0xff;\
559 VREG_B(VS1REG, (el+1) & 0xf) = (RTVAL >> 0) & 0xff;}\
563 case 0x06: /* CTC2 */
566 // ------------------------------------------------
567 // | 010010 | 00110 | TTTTT | DDDDD | 00000000000 |
568 // ------------------------------------------------
571 GEN("rsp.flag[RDREG] = RTVAL & 0xffff;");
575 case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17:
576 case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f:
578 GEN("handle_vector_ops(rsp, op);");
582 default: GEN("unimplemented_opcode(op); "); break;
587 case 0x20: /* LB */ if (RTREG) GEN("RTVAL = (INT32)(INT8)READ8(RSVAL + SIMM16); "); break;
588 case 0x21: /* LH */ if (RTREG) GEN("RTVAL = (INT32)(INT16)READ16(RSVAL + SIMM16); "); break;
589 case 0x23: /* LW */ if (RTREG) GEN("RTVAL = READ32(RSVAL + SIMM16); "); break;
590 case 0x24: /* LBU */ if (RTREG) GEN("RTVAL = (UINT8)READ8(RSVAL + SIMM16); "); break;
591 case 0x25: /* LHU */ if (RTREG) GEN("RTVAL = (UINT16)READ16(RSVAL + SIMM16); "); break;
592 case 0x28: /* SB */ GEN("WRITE8(RSVAL + SIMM16, RTVAL); "); break;
593 case 0x29: /* SH */ GEN("WRITE16(RSVAL + SIMM16, RTVAL); "); break;
594 case 0x2b: /* SW */ GEN("WRITE32(RSVAL + SIMM16, RTVAL); "); break;
595 case 0x32: /* LWC2 */ GEN("handle_lwc2(rsp, op); "); break;
596 case 0x3a: /* SWC2 */ GEN("handle_swc2(rsp, op); "); break;
600 GEN("unimplemented_opcode(op);");
610 // fprintf(fp, "return 1;\n");
612 // fprintf(fp, "return 0;\n");
616 fprintf(fp, "%s\n", old_delayed);
618 if (!((/*br|*/oldbr)&8) && ((!oldbr && !(br&2)) || has_cond)) {
619 fprintf(fp, "/* jumping back to %x */\ngoto L%d;\n", pc, OPI(pc).label);
620 assert(OPI(pc).labeled == curvisit);
629 // SDL redirect these signals, but we need them untouched for waitpid call
635 // sprintf(s, "gcc -Iz64 -g -shared -O2 %s -o %s", src, lib);
640 //execl("/usr/bin/gcc", "/usr/bin/gcc", "-Iz64", "-shared", "-g", "-O3", "-fomit-frame-pointer", src, "-o", lib, "-finline-limit=10000", 0);
641 //execl("/usr/bin/gcc", "/usr/bin/gcc", "-Iz64", "-shared", "-O3", src, "-o", lib, "-fomit-frame-pointer", "-ffast-math", "-funroll-loops", "-fforce-addr", "-finline-limit=10000", 0);
642 //execl("/usr/bin/gcc", "/usr/bin/gcc", "-Iz64", "-shared", "-O3", src, "-o", lib, "-fomit-frame-pointer", "-ffast-math", "-funroll-loops", "-fforce-addr", "-finline-limit=10000", "-m3dnow", "-mmmx", "-msse", "-msse2", "-mfpmath=sse", 0);
643 execl("/usr/bin/gcc", "/usr/bin/gcc", "-Iz64", "-shared", "-O6", src, "-o", lib, "-fomit-frame-pointer", "-ffast-math", "-funroll-loops", "-fforce-addr", "-finline-limit=10000", "-m3dnow", "-mmmx", "-msse", "-msse2", 0);
647 waitpid(pid, 0, __WALL);
649 gen->lib = dlopen(lib, RTLD_NOW);
651 log(M64MSG_WARNING, "%s\n", dlerror());
653 log(M64MSG_VERBOSE, "created and loaded %s\n", lib);
654 gen->f = (gen_f) dlsym(gen->lib, sym);
658 void rsp_invalidate(int begin, int len)
660 //printf("invalidate %x %x\n", begin, len);
661 begin = 0; len = 0x1000;
662 assert(begin+len<=0x1000);
664 OPI(begin).curgen = 0;
676 opinfo_t * opi = &OPI(pc);
677 gen_t * gen = opi->curgen;
678 if (!gen) rsp_gen(pc);
680 GENTRACE("rsp_jump %x (%s)\n", pc, gen->name);
681 int res = gen->f(rsp);
682 GENTRACE("r31 %x from %x nextpc %x pc %x res %d (%s)\n", rsp.r[31], pc, rsp.nextpc, sp_pc, res, gen->name);
683 if (rsp.nextpc != ~0)
685 sp_pc = (rsp.nextpc & 0xfff);
690 //sp_pc = ((sp_pc+4)&0xfff);