/*
- * (C) Gražvydas "notaz" Ignotas, 2010
+ * (C) Gražvydas "notaz" Ignotas, 2010-2011
*
* This work is licensed under the terms of GNU GPL version 2 or later.
* See the COPYING file in the top-level directory.
#include "../cdrom.h"
#include "../psxdma.h"
#include "../mdec.h"
+#include "../gte_neon.h"
#define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0]))
[PSXINT_MDECOUTDMA] = mdec1Interrupt,
[PSXINT_SPUDMA] = spuInterrupt,
[PSXINT_MDECINDMA] = mdec0Interrupt,
+ [PSXINT_GPUOTCDMA] = gpuotcInterrupt,
+ [PSXINT_CDRDMA] = cdrDmaInterrupt,
+ [PSXINT_CDRLID] = cdrLidSeekInterrupt,
+ [PSXINT_CDRPLAY] = cdrPlayInterrupt,
};
/* local dupe of psxBranchTest, using event_cycles */
next_interupt, next_interupt - psxRegs.cycle);
}
-void MTC0_()
-{
- extern void psxMTC0();
+// from interpreter
+extern void MTC0(int reg, u32 val);
- evprintf("ari64 MTC0 %08x %08x %u\n", psxRegs.code, psxRegs.pc, psxRegs.cycle);
- psxMTC0();
- gen_interupt(); /* FIXME: checking pending irqs should be enough */
+void pcsx_mtc0(u32 reg)
+{
+ evprintf("MTC0 %d #%x @%08x %u\n", reg, readmem_word, psxRegs.pc, psxRegs.cycle);
+ MTC0(reg, readmem_word);
+ gen_interupt();
}
-void check_interupt()
+void pcsx_mtc0_ds(u32 reg)
{
- /* FIXME (also asm) */
- printf("ari64_check_interupt\n");
+ evprintf("MTC0 %d #%x @%08x %u\n", reg, readmem_word, psxRegs.pc, psxRegs.cycle);
+ MTC0(reg, readmem_word);
}
void new_dyna_save(void)
void new_dyna_restore(void)
{
int i;
- for (i = 0; i < PSXINT_NEWDRC_CHECK; i++)
+ for (i = 0; i < PSXINT_COUNT; i++)
event_cycles[i] = psxRegs.intCycle[i].sCycle + psxRegs.intCycle[i].cycle;
}
{
extern void (*psxCP2[64])();
extern void psxNULL();
- extern void *psxH_ptr;
size_t i;
new_dynarec_init();
for (i = 0; i < ARRAY_SIZE(gte_handlers); i++)
if (psxCP2[i] != psxNULL)
gte_handlers[i] = psxCP2[i];
-
+#ifdef __arm__
+ gte_handlers[0x01] = gteRTPS_neon;
+ gte_handlers[0x30] = gteRTPT_neon;
+ gte_handlers[0x12] = gteMVMVA_neon;
+ gte_handlers[0x06] = gteNCLIP_neon;
+#endif
psxH_ptr = psxH;
return 0;
printf("ari64_reset\n");
new_dyna_pcsx_mem_reset();
invalidate_all_pages();
+ new_dyna_restore();
pending_exception = 1;
}
-static void ari64_execute()
+// execute until predefined leave points
+// (HLE softcall exit and BIOS fastboot end)
+static void ari64_execute_until()
{
schedule_timeslice();
psxRegs.cycle, next_interupt, next_interupt - psxRegs.cycle);
}
+static void ari64_execute()
+{
+ while (!stop) {
+ ari64_execute_until();
+ evprintf("drc left @%08x\n", psxRegs.pc);
+ }
+}
+
static void ari64_clear(u32 addr, u32 size)
{
- u32 start, end;
+ u32 start, end, main_ram;
+
+ size *= 4; /* PCSX uses DMA units */
evprintf("ari64_clear %08x %04x\n", addr, size);
/* check for RAM mirrors */
- if ((addr & ~0xe0600000) < 0x200000) {
- addr &= ~0xe0600000;
- addr |= 0x80000000;
- }
+ main_ram = (addr & 0xffe00000) == 0x80000000;
start = addr >> 12;
end = (addr + size) >> 12;
for (; start <= end; start++)
- if (!invalid_code[start])
+ if (!main_ram || !invalid_code[start])
invalidate_block(start);
}
R3000Acpu psxRec = {
ari64_init,
ari64_reset,
-#if 1
- ari64_execute,
+#if defined(__arm__)
ari64_execute,
+ ari64_execute_until,
#else
intExecuteT,
intExecuteBlockT,
fclose(f1);
}
+static u32 memcheck_read(u32 a)
+{
+ if ((a >> 16) == 0x1f80)
+ // scratchpad/IO
+ return *(u32 *)(psxH + (a & 0xfffc));
+
+ if ((a >> 16) == 0x1f00)
+ // parallel
+ return *(u32 *)(psxP + (a & 0xfffc));
+
+// if ((a & ~0xe0600000) < 0x200000)
+ // RAM
+ return *(u32 *)(psxM + (a & 0x1ffffc));
+}
+
void do_insn_trace(void)
{
static psxRegisters oldregs;
static u32 old_io_data = 0xbad0c0de;
u32 *allregs_p = (void *)&psxRegs;
u32 *allregs_o = (void *)&oldregs;
- u32 *io_data;
+ u32 io_data;
int i;
u8 byte;
fwrite(&last_io_addr, 1, 4, f);
old_io_addr = last_io_addr;
}
- io_data = (void *)(psxM + (last_io_addr&0x1ffffc));
- if (old_io_data != *io_data) {
+ io_data = memcheck_read(last_io_addr);
+ if (old_io_data != io_data) {
byte = 0xfe;
fwrite(&byte, 1, 1, f);
- fwrite(io_data, 1, 4, f);
- old_io_data = *io_data;
+ fwrite(&io_data, 1, 4, f);
+ old_io_data = io_data;
}
byte = 0xff;
fwrite(&byte, 1, 1, f);
}
psxRegs.code = rregs.code; // don't care
-psxRegs.cycle = rregs.cycle;
-psxRegs.CP0.r[9] = rregs.CP0.r[9]; // Count
+ psxRegs.cycle = rregs.cycle;
+ psxRegs.CP0.r[9] = rregs.CP0.r[9]; // Count
//if (psxRegs.cycle == 166172) breakme();
-//if (psxRegs.cycle > 11296376) printf("pc=%08x %u %08x\n", psxRegs.pc, psxRegs.cycle, psxRegs.interrupt);
-
- mem_addr &= 0x1ffffc;
if (memcmp(&psxRegs, &rregs, offsetof(psxRegisters, intCycle)) == 0 &&
- mem_val == *(u32 *)(psxM + mem_addr)
+ mem_val == memcheck_read(mem_addr)
) {
failcount = 0;
goto ok;
}
}
- if (mem_val != *(u32 *)(psxM + mem_addr)) {
- printf("bad mem @%08x: %08x %08x\n", mem_addr, *(u32 *)(psxM + mem_addr), mem_val);
+ if (mem_val != memcheck_read(mem_addr)) {
+ printf("bad mem @%08x: %08x %08x\n", mem_addr, memcheck_read(mem_addr), mem_val);
goto end;
}