//static u32 mem_unmrtab[(1+2+4) * 0x1000 / 4];
static u32 mem_unmwtab[(1+2+4) * 0x1000 / 4];
+// When this is called in a loop, and 'h' is a function pointer, clang will crash.
+#ifdef __clang__
+static __attribute__ ((noinline)) void map_item(u32 *out, const void *h, u32 flag)
+#else
static void map_item(u32 *out, const void *h, u32 flag)
+#endif
{
u32 hv = (u32)h;
if (hv & 1) {
static void io_write_ireg16(u32 value)
{
- if (Config.Sio) psxHu16ref(0x1070) |= 0x80;
+ //if (Config.Sio) psxHu16ref(0x1070) |= 0x80;
if (Config.SpuIrq) psxHu16ref(0x1070) |= 0x200;
- psxHu16ref(0x1070) &= psxHu16(0x1074) & value;
+ psxHu16ref(0x1070) &= value;
}
static void io_write_imask16(u32 value)
static void io_write_ireg32(u32 value)
{
- if (Config.Sio) psxHu32ref(0x1070) |= 0x80;
+ //if (Config.Sio) psxHu32ref(0x1070) |= 0x80;
if (Config.SpuIrq) psxHu32ref(0x1070) |= 0x200;
- psxHu32ref(0x1070) &= psxHu32(0x1074) & value;
+ psxHu32ref(0x1070) &= value;
}
static void io_write_imask32(u32 value)
static void io_spu_write16(u32 value)
{
// meh
- SPU_writeRegister(address, value);
+ SPU_writeRegister(address, value, psxRegs.cycle);
}
static void io_spu_write32(u32 value)
SPUwriteRegister wfunc = SPU_writeRegister;
u32 a = address;
- wfunc(a, value & 0xffff);
- wfunc(a + 2, value >> 16);
+ wfunc(a, value & 0xffff, psxRegs.cycle);
+ wfunc(a + 2, value >> 16, psxRegs.cycle);
}
static u32 io_gpu_read_status(void)
map_rcnt_rcount2(rcnts[2].mode);
}
-int pcsxmem_is_handler_dynamic(u_int addr)
+int pcsxmem_is_handler_dynamic(unsigned int addr)
{
if ((addr & 0xfffff000) != 0x1f801000)
return 0;
// scratchpad
map_l1_mem(mem_readtab, 0, 0x1f800000, 0x1000, psxH);
+ map_l1_mem(mem_readtab, 0, 0x9f800000, 0x1000, psxH);
map_l1_mem(mem_writetab, 0, 0x1f800000, 0x1000, psxH);
+ map_l1_mem(mem_writetab, 0, 0x9f800000, 0x1000, psxH);
// I/O
map_item(&mem_readtab[0x1f801000 >> 12], mem_iortab, 1);
+ map_item(&mem_readtab[0x9f801000 >> 12], mem_iortab, 1);
+ map_item(&mem_readtab[0xbf801000 >> 12], mem_iortab, 1);
map_item(&mem_writetab[0x1f801000 >> 12], mem_iowtab, 1);
+ map_item(&mem_writetab[0x9f801000 >> 12], mem_iowtab, 1);
+ map_item(&mem_writetab[0xbf801000 >> 12], mem_iowtab, 1);
// L2
// unmapped tables
map_item(&mem_iowtab[IOMEM32(0x1810)], GPU_writeData, 1);
}
+
+void new_dyna_pcsx_mem_shutdown(void)
+{
+ psxUnmap(mem_readtab, 0x200000 * 4, MAP_TAG_LUTS);
+ mem_writetab = mem_readtab = NULL;
+}