RENDER_STATE_MASK_EVALUATE = 0x20,
} render_state_enum;
+typedef enum
+{
+ RENDER_INTERLACE_ENABLED = 0x1,
+ RENDER_INTERLACE_ODD = 0x2
+} render_interlace_enum;
+
typedef struct
{
u16 left_x;
u32 dirty_textures_8bpp_alternate_mask;
u32 triangle_color;
- u32 primitive_color;
-
u32 dither_table[4];
struct render_block_handler_struct *render_block_handler;
void *texture_page_ptr;
+ void *texture_page_base;
u16 *clut_ptr;
u16 *vram_ptr;
u8 texture_window_y;
u8 primitive_type;
+ u8 interlace_mode;
// Align up to 64 byte boundary to keep the upcoming buffers cache line
// aligned
- u8 reserved_a[1];
+ //u8 reserved_a[0];
// 8KB
block_struct blocks[MAX_BLOCKS_PER_ROW];
u8 texture_4bpp_cache[32][256 * 256];
u8 texture_8bpp_even_cache[16][256 * 256];
u8 texture_8bpp_odd_cache[16][256 * 256];
-
- u32 pixel_count_mode;
- u32 pixel_compare_mode;
-
- u8 *vram_pixel_counts_a;
- u8 *vram_pixel_counts_b;
- u16 *compare_vram;
} psx_gpu_struct;
typedef struct __attribute__((aligned(16)))
void flush_render_block_buffer(psx_gpu_struct *psx_gpu);
void initialize_psx_gpu(psx_gpu_struct *psx_gpu, u16 *vram);
-void gpu_parse(psx_gpu_struct *psx_gpu, u32 *list, u32 size);
+u32 gpu_parse(psx_gpu_struct *psx_gpu, u32 *list, u32 size, u32 *last_command);
void triangle_benchmark(psx_gpu_struct *psx_gpu);