#define MAX_BLOCKS 64
#define MAX_BLOCKS_PER_ROW 128
-#define psx_gpu_test_mask_offset 0
-#define psx_gpu_uvrg_offset 16
-#define psx_gpu_uvrg_dx_offset 32
-#define psx_gpu_uvrg_dy_offset 48
-#define psx_gpu_u_block_span_offset 64
-#define psx_gpu_v_block_span_offset 80
-#define psx_gpu_r_block_span_offset 96
-#define psx_gpu_g_block_span_offset 112
-#define psx_gpu_b_block_span_offset 128
-
-#define psx_gpu_b_dx_offset 132
-
-#define psx_gpu_b_offset 144
-#define psx_gpu_b_dy_offset 148
-#define psx_gpu_triangle_area_offset 152
-#define psx_gpu_texture_window_settings_offset 156
-#define psx_gpu_current_texture_mask_offset 160
-#define psx_gpu_viewport_mask_offset 164
-#define psx_gpu_dirty_textures_4bpp_mask_offset 168
-#define psx_gpu_dirty_textures_8bpp_mask_offset 172
-#define psx_gpu_dirty_textures_8bpp_alternate_mask_offset 176
-#define psx_gpu_triangle_color_offset 180
-#define psx_gpu_dither_table_offset 184
-#define psx_gpu_render_block_handler_offset 200
-#define psx_gpu_texture_page_ptr_offset 204
-#define psx_gpu_texture_page_base_offset 208
-#define psx_gpu_clut_ptr_offset 212
-#define psx_gpu_vram_ptr_offset 216
-
-#define psx_gpu_render_state_base_offset 220
-#define psx_gpu_render_state_offset 222
-#define psx_gpu_num_spans_offset 224
-#define psx_gpu_num_blocks_offset 226
-#define psx_gpu_offset_x_offset 228
-#define psx_gpu_offset_y_offset 230
-#define psx_gpu_clut_settings_offset 232
-#define psx_gpu_texture_settings_offset 234
-#define psx_gpu_viewport_start_x_offset 236
-#define psx_gpu_viewport_start_y_offset 238
-#define psx_gpu_viewport_end_x_offset 240
-#define psx_gpu_viewport_end_y_offset 242
-#define psx_gpu_mask_msb_offset 244
-
-#define psx_gpu_triangle_winding_offset 246
-#define psx_gpu_display_area_draw_enable_offset 247
-#define psx_gpu_current_texture_page_offset 248
-#define psx_gpu_last_8bpp_texture_page_offset 249
-#define psx_gpu_texture_mask_width_offset 250
-#define psx_gpu_texture_mask_height_offset 251
-#define psx_gpu_texture_window_x_offset 252
-#define psx_gpu_texture_window_y_offset 253
-#define psx_gpu_primitive_type_offset 254
-
-#define psx_gpu_reserved_a_offset 255
-
-#define psx_gpu_blocks_offset 0x0100
-#define psx_gpu_span_uvrg_offset_offset 0x2100
-#define psx_gpu_span_edge_data_offset 0x4100
-#define psx_gpu_span_b_offset_offset 0x5100
+#include "psx_gpu_offsets.h"
+
+#define psx_gpu_b_dx_offset (psx_gpu_b_block_span_offset + 4)
#define edge_data_left_x_offset 0
#define edge_data_num_blocks_offset 2
#define uvrg_dx3l d6
#define uvrg_dx3h d7
+#define uvrgb_phase q13
.align 4
+/* FIXME: users of this should be in psx_gpu instead */
+#ifndef __PIC__
+#define load_pointer(register, pointer) \
+ movw register, :lower16:pointer; \
+ movt register, :upper16:pointer; \
+
+#else
+#define load_pointer(register, pointer) \
+ ldr register, =pointer \
+
+#endif
+
#define function(name) \
.global name; \
name: \
vmull.s16 ga_uvrg_y, d0_b, d1_b
rsbmi ga_bx, ga_bx, #0
+ @ r12 = psx_gpu->uvrgb_phase
+ ldr r12, [ psx_gpu, #psx_gpu_uvrgb_phase_offset ]
+
vmlsl.s16 ga_uvrg_y, d2_b, d3_b
movs gs_by, ga_by, asr #31
vshr.u64 d0, d30, #22
- mov b_base, b0, lsl #16
+ add b_base, r12, b0, lsl #16
+
+ vdup.u32 uvrgb_phase, r12
rsbmi ga_by, ga_by, #0
vclt.s32 gs_uvrg_x, ga_uvrg_x, #0 @ gs_uvrg_x = ga_uvrg_x < 0
ldrb r12, [ psx_gpu, #psx_gpu_triangle_winding_offset ]
vclt.s32 gs_uvrg_y, ga_uvrg_y, #0 @ gs_uvrg_y = ga_uvrg_y < 0
- add b_base, b_base, #0x8000
rsb r12, r12, #0 @ r12 = -(triangle->winding)
vdup.u32 w_mask, r12 @ w_mask = { -w, -w, -w, -w }
vshll.u16 uvrg_base, uvrg0, #16 @ uvrg_base = uvrg0 << 16
vdup.u32 r_shift, r14 @ r_shift = { shift, shift, shift, shift }
- vorr.u32 uvrg_base, #0x8000
+ vadd.u32 uvrg_base, uvrgb_phase
vabs.s32 ga_uvrg_x, ga_uvrg_x @ ga_uvrg_x = abs(ga_uvrg_x)
vmov area_r_s, s0 @ area_r_s = triangle_reciprocal
vld1.32 { uvrg }, [ temp ]; \
add temp, psx_gpu, #psx_gpu_uvrg_dy_offset; \
vld1.32 { uvrg_dy }, [ temp ]; \
- movw reciprocal_table_ptr, :lower16:reciprocal_table; \
- movt reciprocal_table_ptr, :upper16:reciprocal_table; \
+ load_pointer(reciprocal_table_ptr, reciprocal_table); \
\
vmov.u32 c_0x01, #0x01 \
\
vdup.u32 edge_shifts, temp; \
vsub.u32 heights_b, heights, c_0x01; \
- vshr.u32 height_reciprocals, edge_shifts, #12; \
+ vshr.u32 height_reciprocals, edge_shifts, #10; \
\
vmla.s32 heights_b, x_starts, heights; \
vbic.u16 edge_shifts, #0xE0; \
vsub.u32 heights_b, heights, c_0x01; \
sub height_b_alt, height_minor_b, #1; \
\
- vshr.u32 height_reciprocals, edge_shifts, #12; \
- lsr height_reciprocal_alt, edge_shift_alt, #12; \
+ vshr.u32 height_reciprocals, edge_shifts, #10; \
+ lsr height_reciprocal_alt, edge_shift_alt, #10; \
\
vmla.s32 heights_b, x_starts, heights; \
mla height_b_alt, height_minor_b, start_c, height_b_alt; \
function(setup_spans_up_right)
setup_spans_up_up(right, left)
+.pool
#define setup_spans_down_down(minor, major) \
setup_spans_prologue(); \
setup_spans_prologue_b()
bal 4b
+.pool
#undef span_uvrg_offset
#undef span_edge_data
add dither_offset_ptr, psx_gpu, #psx_gpu_dither_table_offset; \
\
ldrh y, [ span_edge_data, #edge_data_y_offset ]; \
- ldr fb_ptr, [ psx_gpu, #psx_gpu_vram_ptr_offset ]; \
+ ldr fb_ptr, [ psx_gpu, #psx_gpu_vram_out_ptr_offset ]; \
\
cmp span_num_blocks, #0; \
beq 1f; \
add dither_offset_ptr, psx_gpu, #psx_gpu_dither_table_offset; \
\
ldrh y, [ span_edge_data, #edge_data_y_offset ]; \
- ldr fb_ptr, [ psx_gpu, #psx_gpu_vram_ptr_offset ]; \
+ ldr fb_ptr, [ psx_gpu, #psx_gpu_vram_out_ptr_offset ]; \
\
cmp span_num_blocks, #0; \
beq 1f; \
ldrh span_num_blocks, [ span_edge_data, #edge_data_num_blocks_offset ]
ldrh y, [ span_edge_data, #edge_data_y_offset ]
- ldr fb_ptr, [ psx_gpu, #psx_gpu_vram_ptr_offset ]
+ ldr fb_ptr, [ psx_gpu, #psx_gpu_vram_out_ptr_offset ]
cmp span_num_blocks, #0
beq 1f
ldrh span_num_blocks, [ span_edge_data, #edge_data_num_blocks_offset ]
ldrh y, [ span_edge_data, #edge_data_y_offset ]
- ldr fb_ptr, [ psx_gpu, #psx_gpu_vram_ptr_offset ]
+ ldr fb_ptr, [ psx_gpu, #psx_gpu_vram_out_ptr_offset ]
cmp span_num_blocks, #0
beq 1f
add dither_offset_ptr, psx_gpu, #psx_gpu_dither_table_offset; \
\
ldrh y, [ span_edge_data, #edge_data_y_offset ]; \
- ldr fb_ptr, [ psx_gpu, #psx_gpu_vram_ptr_offset ]; \
+ ldr fb_ptr, [ psx_gpu, #psx_gpu_vram_out_ptr_offset ]; \
\
cmp span_num_blocks, #0; \
beq 1f; \
add dither_offset_ptr, psx_gpu, #psx_gpu_dither_table_offset; \
\
ldrh y, [ span_edge_data, #edge_data_y_offset ]; \
- ldr fb_ptr, [ psx_gpu, #psx_gpu_vram_ptr_offset ]; \
+ ldr fb_ptr, [ psx_gpu, #psx_gpu_vram_out_ptr_offset ]; \
\
cmp span_num_blocks, #0; \
beq 1f; \
\
vmov.u16 d128_0x7C1F, #0x7C00; \
vmov.u16 d128_0x03E0, #0x0300; \
- vmov.u16 d128_0x83E0, #0x8300; \
vmov.u16 d128_0x1C07, #0x1C00; \
- vmov.u16 d128_0x80E0, #0x8000; \
+ vmov.u16 d128_0x00E0, #0x00E0; \
vorr.u16 d128_0x7C1F, #0x001F; \
vorr.u16 d128_0x03E0, #0x00E0; \
- vorr.u16 d128_0x83E0, #0x00E0; \
vorr.u16 d128_0x1C07, #0x0007; \
- vorr.u16 d128_0x80E0, #0x00E0; \
\
vld1.u32 { draw_mask }, [ draw_mask_ptr, :128 ], c_64; \
ldr fb_ptr_next, [ pixel_ptr, #28 ]; \
vld1.u16 { fb_pixels }, [ fb_ptr_next ]; \
blend_blocks_add_mask_set_##mask_evaluate(); \
vshr.s16 pixels_fourth, pixels, #2; \
+ vand.u16 pixels_rb, pixels_fourth, d128_0x1C07; \
\
blend_blocks_add_mask_copy_##mask_evaluate(); \
- vorr.u16 pixels, pixels, msb_mask; \
- vand.u16 pixels_rb, pixels_fourth, d128_0x1C07; \
- vand.u16 fb_pixels_masked, fb_pixels, blend_mask; \
- vand.u16 pixels_mg, pixels_fourth, d128_0x80E0; \
- vand.u16 fb_pixels_rb, fb_pixels_masked, d128_0x7C1F; \
- vand.u16 fb_pixels_g, fb_pixels_masked, d128_0x03E0; \
+ vand.u16 pixels_g, pixels_fourth, d128_0x00E0; \
+ vand.u16 fb_pixels_rb, fb_pixels, d128_0x7C1F; \
+ vand.u16 fb_pixels_g, fb_pixels, d128_0x03E0; \
vadd.u16 fb_pixels_rb, fb_pixels_rb, pixels_rb; \
- vadd.u16 fb_pixels_g, fb_pixels_g, pixels_mg; \
+ vadd.u16 fb_pixels_g, fb_pixels_g, pixels_g; \
vmin.u8 fb_pixels_rb, fb_pixels_rb, d128_0x7C1F; \
- vmin.u16 fb_pixels_g, fb_pixels_g, d128_0x83E0; \
+ vmin.u16 fb_pixels_g, fb_pixels_g, d128_0x03E0; \
\
subs num_blocks, num_blocks, #1; \
beq 1f; \
\
0: \
mov fb_ptr, fb_ptr_next; \
- \
ldr fb_ptr_next, [ pixel_ptr, #28 ]; \
\
+ vorr.u16 blend_pixels, fb_pixels_rb, fb_pixels_g; \
+ vbif.u16 blend_pixels, pixels, blend_mask; \
+ \
vld1.u32 { pixels }, [ pixel_ptr, :128 ], c_64; \
vclt.s16 blend_mask, pixels, #0; \
- \
vshr.s16 pixels_fourth, pixels, #2; \
- vorr.u16 pixels, pixels, msb_mask; \
- vorr.u16 blend_pixels, fb_pixels_rb, fb_pixels_g; \
+ vorr.u16 blend_pixels, blend_pixels, msb_mask; \
vand.u16 pixels_rb, pixels_fourth, d128_0x1C07; \
\
vbit.u16 blend_pixels, fb_pixels, draw_mask; \
\
vld1.u16 { fb_pixels }, [ fb_ptr_next ]; \
blend_blocks_add_mask_set_##mask_evaluate(); \
- vand.u16 fb_pixels_masked, fb_pixels, blend_mask; \
blend_blocks_add_mask_copy_##mask_evaluate(); \
- vand.u16 pixels_mg, pixels_fourth, d128_0x80E0; \
- vand.u16 fb_pixels_rb, fb_pixels_masked, d128_0x7C1F; \
+ vand.u16 pixels_g, pixels_fourth, d128_0x00E0; \
+ vand.u16 fb_pixels_rb, fb_pixels, d128_0x7C1F; \
vst1.u16 { blend_pixels }, [ fb_ptr ]; \
\
3: \
- vand.u16 fb_pixels_g, fb_pixels_masked, d128_0x03E0; \
+ vand.u16 fb_pixels_g, fb_pixels, d128_0x03E0; \
vadd.u16 fb_pixels_rb, fb_pixels_rb, pixels_rb; \
- vadd.u16 fb_pixels_g, fb_pixels_g, pixels_mg; \
+ vadd.u16 fb_pixels_g, fb_pixels_g, pixels_g; \
vmin.u8 fb_pixels_rb, fb_pixels_rb, d128_0x7C1F; \
- vmin.u16 fb_pixels_g, fb_pixels_g, d128_0x83E0; \
+ vmin.u16 fb_pixels_g, fb_pixels_g, d128_0x03E0; \
\
subs num_blocks, num_blocks, #1; \
bne 0b; \
\
1: \
vorr.u16 blend_pixels, fb_pixels_rb, fb_pixels_g; \
+ vorr.u16 blend_pixels, blend_pixels, msb_mask; \
+ vbif.u16 blend_pixels, pixels, blend_mask; \
vbit.u16 blend_pixels, fb_pixels, draw_mask; \
vst1.u16 { blend_pixels }, [ fb_ptr_next ]; \
\
\
2: \
vst1.u16 { blend_pixels }, [ fb_ptr ]; \
- vand.u16 pixels_mg, pixels_fourth, d128_0x80E0; \
+ vand.u16 pixels_g, pixels_fourth, d128_0x00E0; \
\
vld1.u16 { fb_pixels }, [ fb_ptr_next ]; \
blend_blocks_add_mask_set_##mask_evaluate(); \
- vand.u16 fb_pixels_masked, fb_pixels, blend_mask; \
blend_blocks_add_mask_copy_##mask_evaluate(); \
- vand.u16 fb_pixels_rb, fb_pixels_masked, d128_0x7C1F; \
+ vand.u16 fb_pixels_rb, fb_pixels, d128_0x7C1F; \
bal 3b \
+
#define blend_blocks_add_fourth_untextured_builder(mask_evaluate) \
.align 3; \
\
\
vmov.u16 d128_0x7C1F, #0x7C00; \
vmov.u16 d128_0x03E0, #0x0300; \
- vmov.u16 d128_0x83E0, #0x8300; \
vmov.u16 d128_0x1C07, #0x1C00; \
vmov.u16 d128_0x00E0, #0x00E0; \
vorr.u16 d128_0x7C1F, #0x001F; \
vorr.u16 d128_0x03E0, #0x00E0; \
- vorr.u16 d128_0x83E0, #0x00E0; \
vorr.u16 d128_0x1C07, #0x0007; \
\
vld1.u32 { draw_mask }, [ draw_mask_ptr, :128 ], c_64; \
\
0: \
mov fb_ptr, fb_ptr_next; \
- \
ldr fb_ptr_next, [ pixel_ptr, #28 ]; \
\
vld1.u32 { pixels }, [ pixel_ptr, :128 ], c_64; \
bx lr
+#undef vram_ptr
#undef color
-#undef y
+#undef width
#undef height
-
-#define psx_gpu r0
-#define color r1
-#define x r2
-#define y r3
+#undef pitch
#define vram_ptr r0
-#define width r3
-#define height r12
-
-#define parameter_width_offset 0
-#define parameter_height_offset 4
+#define color r1
+#define width r2
+#define height r3
-#define color_r r14
-#define color_g r4
-#define color_b r5
+#define pitch r1
-#define left_unaligned r14
-#define right_unaligned r4
-#define pitch r5
-#define num_unaligned r2
-#define num_width r6
+#define num_width r12
#undef colors_a
#undef colors_b
.align 3
function(render_block_fill_body)
- ldr vram_ptr, [ psx_gpu, #psx_gpu_vram_ptr_offset ]
- ldr height, [ sp, #parameter_height_offset ]
-
- add vram_ptr, vram_ptr, y, lsl #11
- ldr width, [ sp, #parameter_width_offset ]
-
- add vram_ptr, vram_ptr, x, lsl #1
- stmdb sp!, { r4 - r6, r14 }
-
- ubfx color_r, color, #3, #5
- ubfx color_g, color, #11, #5
-
- ubfx color_b, color, #19, #5
- orr color, color_r, color_g, lsl #5
-
- orr color, color, color_b, lsl #10
vdup.u16 colors_a, color
+ mov pitch, #2048
vmov colors_b, colors_a
- mov pitch, #2048
sub pitch, pitch, width, lsl #1
- 0:
- mov num_width, width, lsr #4
+ mov num_width, width
- 1:
- vst1.u32 { colors_a, colors_b }, [ vram_ptr, :128 ]!
+ 0:
+ vst1.u32 { colors_a, colors_b }, [ vram_ptr, :256 ]!
- subs num_width, num_width, #1
- bne 1b
+ subs num_width, num_width, #16
+ bne 0b
add vram_ptr, vram_ptr, pitch
+ mov num_width, width
+
subs height, height, #1
bne 0b
-
- 1:
- ldmia sp!, { r4 - r6, pc }
+ bx lr
+
#undef x
#undef y
and offset_u, u, #0xF; \
\
ldr width, [ sp, #40 ]; \
- ldr fb_ptr, [ psx_gpu, #psx_gpu_vram_ptr_offset ]; \
+ ldr fb_ptr, [ psx_gpu, #psx_gpu_vram_out_ptr_offset ]; \
\
ldr height, [ sp, #44 ]; \
add fb_ptr, fb_ptr, y, lsl #11; \
function(setup_sprite_16bpp)
stmdb sp!, { r4 - r11, r14 }
- ldr fb_ptr, [ psx_gpu, #psx_gpu_vram_ptr_offset ]
+ ldr fb_ptr, [ psx_gpu, #psx_gpu_vram_out_ptr_offset ]
ldr v, [ sp, #36 ]
add fb_ptr, fb_ptr, y, lsl #11
vpop { q0 - q3 }
ldmia sp!, { r4 - r11, pc }
+
+/* void scale2x_tiles8(void *dst, const void *src, int w8, int h) */
+function(scale2x_tiles8)
+ push { r4, r14 }
+
+ mov r4, r1
+ add r12, r0, #1024*2
+ mov r14, r2
+
+0:
+ vld1.u16 { q0 }, [ r1, :128 ]!
+ vld1.u16 { q2 }, [ r1, :128 ]!
+ vmov q1, q0
+ vmov q3, q2
+ vzip.16 q0, q1
+ vzip.16 q2, q3
+ subs r14, #2
+ vst1.u16 { q0, q1 }, [ r0, :128 ]!
+ vst1.u16 { q0, q1 }, [ r12, :128 ]!
+ blt 1f
+ vst1.u16 { q2, q3 }, [ r0, :128 ]!
+ vst1.u16 { q2, q3 }, [ r12, :128 ]!
+ bgt 0b
+1:
+ subs r3, #1
+ mov r14, r2
+ add r0, #1024*2*2
+ add r4, #1024*2
+ sub r0, r2, lsl #4+1
+ mov r1, r4
+ add r12, r0, #1024*2
+ bgt 0b
+ nop
+
+ pop { r4, pc }