- if ((a&0xe700e0)==0xc00000) { PicoVideoWrite(a,(u16)d); return; }
- if ((a&0xff4000)==0xa00000) { if(!(Pico.m.z80Run&1)) Pico.zram[a&0x1fff]=(u8)(d>>8); return; } // Z80 ram (MSB only)
+ if (a==0xa11100) { z80WriteBusReq(d>>8); return; }
+ if ((a&0xffffe0)==0xa10000) { IoWrite8(a, d); return; } // I/O ports
+ if ((a&0xe700f8)==0xc00010||(a&0xff7ff8)==0xa07f10) { if(PicoOpt&2) SN76496Write(d); return; } // PSG Sound
+ if ((a&0xff6000)==0xa04000) { if(PicoOpt&1) emustatus|=ym2612_write_local(a&3, d&0xff, 0)&1; return; } // FM Sound
+ if ((a&0xff4000)==0xa00000) { // Z80 ram (MSB only)
+ if (!(Pico.m.z80Run&1)) Pico.zram[a&0x1fff]=(u8)(d>>8);
+ else elprintf(EL_ANOMALY, "68k z80 write with no bus! [%06x] %02x @ %06x", a, d&0xffff, SekPc);
+ return;
+ }
+ if (a==0xa11200) {
+ elprintf(EL_BUSREQ, "write z80reset: %04x", d);
+ if (!(d&0x100)) { Pico.m.z80_reset = 1; Pico.m.z80Run = 0; YM2612ResetChip(); }
+ else if (Pico.m.z80_reset) {
+ Pico.m.z80_reset = 0;
+ YM2612ResetChip();
+ z80_reset();
+ timers_reset();
+ }
+ return;
+ }
+ if ((a&0xff7f00)==0xa06000) // Z80 BANK register
+ {
+ Pico.m.z80_bank68k>>=1;
+ Pico.m.z80_bank68k|=(d&1)<<8;
+ Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one
+ elprintf(EL_Z80BNK, "z80 bank=%06x", Pico.m.z80_bank68k<<15);
+ return;
+ }