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menu: add reset hotkey
[picodrive.git]
/
cpu
/
cz80
/
cz80.c
diff --git
a/cpu/cz80/cz80.c
b/cpu/cz80/cz80.c
index
461b46a
..
61ca5f8
100644
(file)
--- a/
cpu/cz80/cz80.c
+++ b/
cpu/cz80/cz80.c
@@
-14,12
+14,19
@@
#include "cz80.h"
\r
\r
#if PICODRIVE_HACKS
\r
#include "cz80.h"
\r
\r
#if PICODRIVE_HACKS
\r
-#include <
Pico/PicoInt
.h>
\r
+#include <
pico/memory
.h>
\r
#endif
\r
\r
#ifndef ALIGN_DATA
\r
#endif
\r
\r
#ifndef ALIGN_DATA
\r
+#ifdef _MSC_VER
\r
+#define ALIGN_DATA
\r
+#define inline
\r
+#undef CZ80_USE_JUMPTABLE
\r
+#define CZ80_USE_JUMPTABLE 0
\r
+#else
\r
#define ALIGN_DATA __attribute__((aligned(4)))
\r
#endif
\r
#define ALIGN_DATA __attribute__((aligned(4)))
\r
#endif
\r
+#endif
\r
\r
#define CF 0x01
\r
#define NF 0x02
\r
\r
#define CF 0x01
\r
#define NF 0x02
\r
@@
-99,7
+106,7
@@
void Cz80_Init(cz80_struc *CPU)
\r
for (i = 0; i < CZ80_FETCH_BANK; i++)
\r
{
\r
\r
for (i = 0; i < CZ80_FETCH_BANK; i++)
\r
{
\r
- CPU->Fetch[i] = (
UINT32
)cz80_bad_address;
\r
+ CPU->Fetch[i] = (
FPTR
)cz80_bad_address;
\r
#if CZ80_ENCRYPTED_ROM
\r
CPU->OPFetch[i] = 0;
\r
#endif
\r
#if CZ80_ENCRYPTED_ROM
\r
CPU->OPFetch[i] = 0;
\r
#endif
\r
@@
-203,7
+210,7
@@
void Cz80_Init(cz80_struc *CPU)
\r
void Cz80_Reset(cz80_struc *CPU)
\r
{
\r
\r
void Cz80_Reset(cz80_struc *CPU)
\r
{
\r
- memset(CPU, 0, (
INT32)&CPU->BasePC - (INT32
)CPU);
\r
+ memset(CPU, 0, (
FPTR)&CPU->BasePC - (FPTR
)CPU);
\r
Cz80_Set_Reg(CPU, CZ80_PC, 0);
\r
}
\r
\r
Cz80_Set_Reg(CPU, CZ80_PC, 0);
\r
}
\r
\r
@@
-211,7
+218,10
@@
void Cz80_Reset(cz80_struc *CPU)
#if PICODRIVE_HACKS
\r
static inline unsigned char picodrive_read(unsigned short a)
\r
{
\r
#if PICODRIVE_HACKS
\r
static inline unsigned char picodrive_read(unsigned short a)
\r
{
\r
- return (a < 0x4000) ? Pico.zram[a&0x1fff] : z80_read(a);
\r
+ uptr v = z80_read_map[a >> Z80_MEM_SHIFT];
\r
+ if (map_flag_set(v))
\r
+ return ((z80_read_f *)(v << 1))(a);
\r
+ return *(unsigned char *)((v << 1) + a);
\r
}
\r
#endif
\r
\r
}
\r
#endif
\r
\r
@@
-225,15
+235,16
@@
INT32 Cz80_Exec(cz80_struc *CPU, INT32 cycles)
#include "cz80jmp.c"
\r
#endif
\r
\r
#include "cz80jmp.c"
\r
#endif
\r
\r
-
UINT32
PC;
\r
+
FPTR
PC;
\r
#if CZ80_ENCRYPTED_ROM
\r
#if CZ80_ENCRYPTED_ROM
\r
-
INT32
OPBase;
\r
+
FPTR
OPBase;
\r
#endif
\r
UINT32 Opcode;
\r
UINT32 adr = 0;
\r
UINT32 res;
\r
UINT32 val;
\r
int afterEI = 0;
\r
#endif
\r
UINT32 Opcode;
\r
UINT32 adr = 0;
\r
UINT32 res;
\r
UINT32 val;
\r
int afterEI = 0;
\r
+ union16 *data;
\r
\r
PC = CPU->PC;
\r
#if CZ80_ENCRYPTED_ROM
\r
\r
PC = CPU->PC;
\r
#if CZ80_ENCRYPTED_ROM
\r
@@
-247,7
+258,8
@@
INT32 Cz80_Exec(cz80_struc *CPU, INT32 cycles)
Cz80_Exec:
\r
if (CPU->ICount > 0)
\r
{
\r
Cz80_Exec:
\r
if (CPU->ICount > 0)
\r
{
\r
- union16 *data = pzHL;
\r
+Cz80_Exec_nocheck:
\r
+ data = pzHL;
\r
Opcode = READ_OP();
\r
#if CZ80_EMULATE_R_EXACTLY
\r
zR++;
\r
Opcode = READ_OP();
\r
#if CZ80_EMULATE_R_EXACTLY
\r
zR++;
\r
@@
-262,6
+274,8
@@
Cz80_Check_Interrupt:
if (CPU->IRQState != CLEAR_LINE)
\r
{
\r
CHECK_INT
\r
if (CPU->IRQState != CLEAR_LINE)
\r
{
\r
CHECK_INT
\r
+ CPU->ICount -= CPU->ExtraCycles;
\r
+ CPU->ExtraCycles = 0;
\r
}
\r
goto Cz80_Exec;
\r
}
\r
}
\r
goto Cz80_Exec;
\r
}
\r
@@
-302,9
+316,9
@@
void Cz80_Set_IRQ(cz80_struc *CPU, INT32 line, INT32 state)
\r
if (state != CLEAR_LINE)
\r
{
\r
\r
if (state != CLEAR_LINE)
\r
{
\r
-
UINT32
PC = CPU->PC;
\r
+
FPTR
PC = CPU->PC;
\r
#if CZ80_ENCRYPTED_ROM
\r
#if CZ80_ENCRYPTED_ROM
\r
-
INT32
OPBase = CPU->OPBase;
\r
+
FPTR
OPBase = CPU->OPBase;
\r
#endif
\r
\r
CPU->IRQLine = line;
\r
#endif
\r
\r
CPU->IRQLine = line;
\r
@@
-380,8
+394,8
@@
void Cz80_Set_Reg(cz80_struc *CPU, INT32 regnum, UINT32 val)
case CZ80_R: zR = val; break;
\r
case CZ80_I: zI = val; break;
\r
case CZ80_IM: zIM = val; break;
\r
case CZ80_R: zR = val; break;
\r
case CZ80_I: zI = val; break;
\r
case CZ80_IM: zIM = val; break;
\r
- case CZ80_IFF1: zIFF1 = val; break;
\r
- case CZ80_IFF2: zIFF2 = val; break;
\r
+ case CZ80_IFF1: zIFF1 = val
? (1 << 2) : 0
; break;
\r
+ case CZ80_IFF2: zIFF2 = val
? (1 << 2) : 0
; break;
\r
case CZ80_HALT: CPU->HaltState = val; break;
\r
case CZ80_IRQ: CPU->IRQState = val; break;
\r
default: break;
\r
case CZ80_HALT: CPU->HaltState = val; break;
\r
case CZ80_IRQ: CPU->IRQState = val; break;
\r
default: break;
\r
@@
-393,7
+407,7
@@
void Cz80_Set_Reg(cz80_struc *CPU, INT32 regnum, UINT32 val)
\83
t
\83
F
\83
b
\83
`
\83
A
\83
h
\83
\8c
\83
X
\90
Ý
\92
è
\r
--------------------------------------------------------*/
\r
\r
\83
t
\83
F
\83
b
\83
`
\83
A
\83
h
\83
\8c
\83
X
\90
Ý
\92
è
\r
--------------------------------------------------------*/
\r
\r
-void Cz80_Set_Fetch(cz80_struc *CPU, UINT32 low_adr, UINT32 high_adr,
UINT32
fetch_adr)
\r
+void Cz80_Set_Fetch(cz80_struc *CPU, UINT32 low_adr, UINT32 high_adr,
FPTR
fetch_adr)
\r
{
\r
int i, j;
\r
\r
{
\r
int i, j;
\r
\r