+// fake
+#define emith_bic_r_imm(r, imm) \
+ emith_arith_r_imm(4, r, ~(imm))
+
+// fake conditionals (using SJMP instead)
+#define emith_add_r_imm_c(cond, r, imm) { \
+ (void)(cond); \
+ emith_add_r_imm(r, imm); \
+}
+
+#define emith_or_r_imm_c(cond, r, imm) { \
+ (void)(cond); \
+ emith_or_r_imm(r, imm); \
+}
+
+#define emith_sub_r_imm_c(cond, r, imm) { \
+ (void)(cond); \
+ emith_sub_r_imm(r, imm); \
+}
+
+#define emith_bic_r_imm_c(cond, r, imm) { \
+ (void)(cond); \
+ emith_bic_r_imm(r, imm); \
+}
+
+// shift
+#define emith_shift(op, d, s, cnt) { \
+ if (d != s) \
+ emith_move_r_r(d, s); \
+ EMIT_OP_MODRM(0xc1, 3, op, d); \
+ EMIT(cnt, u8); \
+}
+
+#define emith_lsl(d, s, cnt) \
+ emith_shift(4, d, s, cnt)
+
+#define emith_lsr(d, s, cnt) \
+ emith_shift(5, d, s, cnt)
+
+#define emith_asr(d, s, cnt) \
+ emith_shift(7, d, s, cnt)
+
+#define emith_rol(d, s, cnt) \
+ emith_shift(0, d, s, cnt)
+
+#define emith_ror(d, s, cnt) \
+ emith_shift(1, d, s, cnt)
+
+#define emith_rolc(r) \
+ EMIT_OP_MODRM(0xd1, 3, 2, r)
+
+#define emith_rorc(r) \
+ EMIT_OP_MODRM(0xd1, 3, 3, r)
+
+// misc
+#define emith_push(r) \
+ EMIT_OP(0x50 + (r))
+
+#define emith_pop(r) \
+ EMIT_OP(0x58 + (r))
+
+#define emith_neg_r(r) \
+ EMIT_OP_MODRM(0xf7, 3, 3, r)
+
+#define emith_clear_msb(d, s, count) { \
+ u32 t = (u32)-1; \
+ t >>= count; \
+ if (d != s) \
+ emith_move_r_r(d, s); \
+ emith_and_r_imm(d, t); \
+}
+
+#define emith_sext(d, s, bits) { \
+ emith_lsl(d, s, 32 - (bits)); \
+ emith_asr(d, d, 32 - (bits)); \
+}
+
+// put bit0 of r0 to carry
+#define emith_set_carry(r0) { \
+ emith_tst_r_imm(r0, 1); /* clears C */ \
+ EMITH_SJMP_START(DCOND_EQ); \
+ EMIT_OP(0xf9); /* STC */ \
+ EMITH_SJMP_END(DCOND_EQ); \
+}
+
+// put bit0 of r0 to carry (for subtraction)
+#define emith_set_carry_sub emith_set_carry
+
+// XXX: stupid mess
+#define emith_mul_(op, dlo, dhi, s1, s2) { \
+ int rmr; \
+ if (dlo != xAX && dhi != xAX) \
+ emith_push(xAX); \
+ if (dlo != xDX && dhi != xDX) \
+ emith_push(xDX); \
+ if ((s1) == xAX) \
+ rmr = s2; \
+ else if ((s2) == xAX) \
+ rmr = s1; \
+ else { \
+ emith_move_r_r(xAX, s1); \
+ rmr = s2; \
+ } \
+ EMIT_OP_MODRM(0xf7, 3, op, rmr); /* xMUL rmr */ \
+ /* XXX: using push/pop for the case of edx->eax; eax->edx */ \
+ if (dhi != xDX && dhi != -1) \
+ emith_push(xDX); \
+ if (dlo != xAX) \
+ emith_move_r_r(dlo, xAX); \
+ if (dhi != xDX && dhi != -1) \
+ emith_pop(dhi); \
+ if (dlo != xDX && dhi != xDX) \
+ emith_pop(xDX); \
+ if (dlo != xAX && dhi != xAX) \
+ emith_pop(xAX); \
+}
+
+#define emith_mul_u64(dlo, dhi, s1, s2) \
+ emith_mul_(4, dlo, dhi, s1, s2) /* MUL */
+
+#define emith_mul_s64(dlo, dhi, s1, s2) \
+ emith_mul_(5, dlo, dhi, s1, s2) /* IMUL */
+
+#define emith_mul(d, s1, s2) \
+ emith_mul_(4, d, -1, s1, s2)
+
+// "flag" instructions are the same
+#define emith_subf_r_imm emith_sub_r_imm
+#define emith_addf_r_r emith_add_r_r
+#define emith_subf_r_r emith_sub_r_r
+#define emith_adcf_r_r emith_adc_r_r
+#define emith_sbcf_r_r emith_sbc_r_r
+
+#define emith_lslf emith_lsl
+#define emith_lsrf emith_lsr
+#define emith_asrf emith_asr
+#define emith_rolf emith_rol
+#define emith_rorf emith_ror
+#define emith_rolcf emith_rolc
+#define emith_rorcf emith_rorc
+