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main: log missing CPU features
[pcsx_rearmed.git]
/
libpcsxcore
/
new_dynarec
/
emu_if.c
diff --git
a/libpcsxcore/new_dynarec/emu_if.c
b/libpcsxcore/new_dynarec/emu_if.c
index
e9008ae
..
aa09356
100644
(file)
--- a/
libpcsxcore/new_dynarec/emu_if.c
+++ b/
libpcsxcore/new_dynarec/emu_if.c
@@
-46,12
+46,16
@@
static void schedule_timeslice(void)
next_interupt = c + min;
}
next_interupt = c + min;
}
+static void unusedInterrupt()
+{
+}
+
typedef void (irq_func)();
static irq_func * const irq_funcs[] = {
[PSXINT_SIO] = sioInterrupt,
[PSXINT_CDR] = cdrInterrupt,
typedef void (irq_func)();
static irq_func * const irq_funcs[] = {
[PSXINT_SIO] = sioInterrupt,
[PSXINT_CDR] = cdrInterrupt,
- [PSXINT_CDREAD] = cdrReadInterrupt,
+ [PSXINT_CDREAD] = cdr
PlaySeek
ReadInterrupt,
[PSXINT_GPUDMA] = gpuInterrupt,
[PSXINT_MDECOUTDMA] = mdec1Interrupt,
[PSXINT_SPUDMA] = spuInterrupt,
[PSXINT_GPUDMA] = gpuInterrupt,
[PSXINT_MDECOUTDMA] = mdec1Interrupt,
[PSXINT_SPUDMA] = spuInterrupt,
@@
-59,7
+63,7
@@
static irq_func * const irq_funcs[] = {
[PSXINT_GPUOTCDMA] = gpuotcInterrupt,
[PSXINT_CDRDMA] = cdrDmaInterrupt,
[PSXINT_CDRLID] = cdrLidSeekInterrupt,
[PSXINT_GPUOTCDMA] = gpuotcInterrupt,
[PSXINT_CDRDMA] = cdrDmaInterrupt,
[PSXINT_CDRLID] = cdrLidSeekInterrupt,
- [PSXINT_CDRPLAY
] = cdrPlay
Interrupt,
+ [PSXINT_CDRPLAY
_OLD] = unused
Interrupt,
[PSXINT_SPU_UPDATE] = spuUpdate,
[PSXINT_RCNT] = psxRcntUpdate,
};
[PSXINT_SPU_UPDATE] = spuUpdate,
[PSXINT_RCNT] = psxRcntUpdate,
};
@@
-88,7
+92,8
@@
static void irq_test(void)
void gen_interupt()
{
void gen_interupt()
{
- evprintf(" +ge %08x, %u->%u\n", psxRegs.pc, psxRegs.cycle, next_interupt);
+ evprintf(" +ge %08x, %u->%u (%d)\n", psxRegs.pc, psxRegs.cycle,
+ next_interupt, next_interupt - psxRegs.cycle);
irq_test();
//psxBranchTest();
irq_test();
//psxBranchTest();
@@
-100,13
+105,10
@@
void gen_interupt()
next_interupt, next_interupt - psxRegs.cycle);
}
next_interupt, next_interupt - psxRegs.cycle);
}
-// from interpreter
-extern void MTC0(int reg, u32 val);
-
void pcsx_mtc0(u32 reg, u32 val)
{
evprintf("MTC0 %d #%x @%08x %u\n", reg, val, psxRegs.pc, psxRegs.cycle);
void pcsx_mtc0(u32 reg, u32 val)
{
evprintf("MTC0 %d #%x @%08x %u\n", reg, val, psxRegs.pc, psxRegs.cycle);
- MTC0(reg, val);
+ MTC0(
&psxRegs,
reg, val);
gen_interupt();
if (Cause & Status & 0x0300) // possible sw irq
pending_exception = 1;
gen_interupt();
if (Cause & Status & 0x0300) // possible sw irq
pending_exception = 1;
@@
-115,7
+117,7
@@
void pcsx_mtc0(u32 reg, u32 val)
void pcsx_mtc0_ds(u32 reg, u32 val)
{
evprintf("MTC0 %d #%x @%08x %u\n", reg, val, psxRegs.pc, psxRegs.cycle);
void pcsx_mtc0_ds(u32 reg, u32 val)
{
evprintf("MTC0 %d #%x @%08x %u\n", reg, val, psxRegs.pc, psxRegs.cycle);
- MTC0(reg, val);
+ MTC0(
&psxRegs,
reg, val);
}
void new_dyna_before_save(void)
}
void new_dyna_before_save(void)
@@
-294,15
+296,13
@@
const uint64_t gte_reg_writes[64] = {
static int ari64_init()
{
static u32 scratch_buf[8*8*2] __attribute__((aligned(64)));
static int ari64_init()
{
static u32 scratch_buf[8*8*2] __attribute__((aligned(64)));
- extern void (*psxCP2[64])();
- extern void psxNULL();
size_t i;
new_dynarec_init();
new_dyna_pcsx_mem_init();
for (i = 0; i < ARRAY_SIZE(gte_handlers); i++)
size_t i;
new_dynarec_init();
new_dyna_pcsx_mem_init();
for (i = 0; i < ARRAY_SIZE(gte_handlers); i++)
- if (psxCP2[i] !=
psx
NULL)
+ if (psxCP2[i] !=
gte
NULL)
gte_handlers[i] = psxCP2[i];
#if defined(__arm__) && !defined(DRC_DBG)
gte_handlers[i] = psxCP2[i];
#if defined(__arm__) && !defined(DRC_DBG)
@@
-332,7
+332,7
@@
static void ari64_reset()
{
printf("ari64_reset\n");
new_dyna_pcsx_mem_reset();
{
printf("ari64_reset\n");
new_dyna_pcsx_mem_reset();
- invalidate_all_pages();
+
new_dynarec_
invalidate_all_pages();
new_dyna_restore();
pending_exception = 1;
}
new_dyna_restore();
pending_exception = 1;
}
@@
-362,21
+362,11
@@
static void ari64_execute()
static void ari64_clear(u32 addr, u32 size)
{
static void ari64_clear(u32 addr, u32 size)
{
- u32 start, end, main_ram;
-
size *= 4; /* PCSX uses DMA units (words) */
evprintf("ari64_clear %08x %04x\n", addr, size);
size *= 4; /* PCSX uses DMA units (words) */
evprintf("ari64_clear %08x %04x\n", addr, size);
- /* check for RAM mirrors */
- main_ram = (addr & 0xffe00000) == 0x80000000;
-
- start = addr >> 12;
- end = (addr + size) >> 12;
-
- for (; start <= end; start++)
- if (!main_ram || !invalid_code[start])
- invalidate_block(start);
+ new_dynarec_invalidate_range(addr, addr + size);
}
static void ari64_notify(int note, void *data) {
}
static void ari64_notify(int note, void *data) {
@@
-449,8
+439,8
@@
void new_dynarec_init() {}
void new_dyna_start(void *context) {}
void new_dynarec_cleanup() {}
void new_dynarec_clear_full() {}
void new_dyna_start(void *context) {}
void new_dynarec_cleanup() {}
void new_dynarec_clear_full() {}
-void invalidate_all_pages() {}
-void
invalidate_block(unsigned int block
) {}
+void
new_dynarec_
invalidate_all_pages() {}
+void
new_dynarec_invalidate_range(unsigned int start, unsigned int end
) {}
void new_dyna_pcsx_mem_init(void) {}
void new_dyna_pcsx_mem_reset(void) {}
void new_dyna_pcsx_mem_load_state(void) {}
void new_dyna_pcsx_mem_init(void) {}
void new_dyna_pcsx_mem_reset(void) {}
void new_dyna_pcsx_mem_load_state(void) {}
@@
-658,7
+648,8
@@
void do_insn_cmp(void)
//if (psxRegs.cycle == 166172) breakme();
if (which_event >= 0 && event_cycles[which_event] != ev_cycles) {
//if (psxRegs.cycle == 166172) breakme();
if (which_event >= 0 && event_cycles[which_event] != ev_cycles) {
- printf("bad ev_cycles #%d: %08x %08x\n", which_event, event_cycles[which_event], ev_cycles);
+ printf("bad ev_cycles #%d: %u %u / %u\n", which_event,
+ event_cycles[which_event], ev_cycles, psxRegs.cycle);
fatal = 1;
}
fatal = 1;
}