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rm leftover debug code
[pcsx_rearmed.git]
/
libpcsxcore
/
new_dynarec
/
patches
/
trace_intr
diff --git
a/libpcsxcore/new_dynarec/patches/trace_intr
b/libpcsxcore/new_dynarec/patches/trace_intr
index
40b3edb
..
3f01180
100644
(file)
--- a/
libpcsxcore/new_dynarec/patches/trace_intr
+++ b/
libpcsxcore/new_dynarec/patches/trace_intr
@@
-1,8
+1,8
@@
diff --git a/libpcsxcore/new_dynarec/emu_if.c b/libpcsxcore/new_dynarec/emu_if.c
diff --git a/libpcsxcore/new_dynarec/emu_if.c b/libpcsxcore/new_dynarec/emu_if.c
-index
89716fa0..02a8d7c5
100644
+index
f879ad8c..0ec366d0
100644
--- a/libpcsxcore/new_dynarec/emu_if.c
+++ b/libpcsxcore/new_dynarec/emu_if.c
--- a/libpcsxcore/new_dynarec/emu_if.c
+++ b/libpcsxcore/new_dynarec/emu_if.c
-@@ -32
0,13 +320
,18 @@ static void ari64_shutdown()
+@@ -32
3,13 +323
,18 @@ static void ari64_shutdown()
{
new_dynarec_cleanup();
new_dyna_pcsx_mem_shutdown();
{
new_dynarec_cleanup();
new_dyna_pcsx_mem_shutdown();
@@
-23,7
+23,7
@@
index 89716fa0..02a8d7c5 100644
ari64_clear,
ari64_notify,
ari64_apply_config,
ari64_clear,
ari64_notify,
ari64_apply_config,
-@@ -39
5,7 +400
,7 @@ static u32 memcheck_read(u32 a)
+@@ -39
8,7 +403
,7 @@ static u32 memcheck_read(u32 a)
return *(u32 *)(psxM + (a & 0x1ffffc));
}
return *(u32 *)(psxM + (a & 0x1ffffc));
}
@@
-33,7
+33,7
@@
index 89716fa0..02a8d7c5 100644
{
static psxRegisters oldregs;
diff --git a/libpcsxcore/new_dynarec/pcsxmem.c b/libpcsxcore/new_dynarec/pcsxmem.c
{
static psxRegisters oldregs;
diff --git a/libpcsxcore/new_dynarec/pcsxmem.c b/libpcsxcore/new_dynarec/pcsxmem.c
-index 1
90f8fc7..5feb7a02
100644
+index 1
f37dc29..357f753e
100644
--- a/libpcsxcore/new_dynarec/pcsxmem.c
+++ b/libpcsxcore/new_dynarec/pcsxmem.c
@@ -289,6 +289,8 @@ static void write_biu(u32 value)
--- a/libpcsxcore/new_dynarec/pcsxmem.c
+++ b/libpcsxcore/new_dynarec/pcsxmem.c
@@ -289,6 +289,8 @@ static void write_biu(u32 value)
@@
-87,13
+87,13
@@
index 18bd6a4e..bc2eb3f6 100644
count = _psxRcntRcount( index );
diff --git a/libpcsxcore/psxhw.c b/libpcsxcore/psxhw.c
count = _psxRcntRcount( index );
diff --git a/libpcsxcore/psxhw.c b/libpcsxcore/psxhw.c
-index
27ddfeab..d7c6ff05
100644
+index
10a2695f..7e4a64da
100644
--- a/libpcsxcore/psxhw.c
+++ b/libpcsxcore/psxhw.c
--- a/libpcsxcore/psxhw.c
+++ b/libpcsxcore/psxhw.c
-@@ -377,13 +377,14 @@ void psxHwWrite8(u32 add, u8 value) {
- case 0x1f801803: cdrWrite3(value); break;
+@@ -437,13 +437,14 @@ void psxHwWrite8(u32 add, u8 value) {
+ return;
+ }
- default:
+ if (add < 0x1f802000)
psxHu8(add) = value;
#ifdef PSXHW_LOG
+ if (add < 0x1f802000)
psxHu8(add) = value;
#ifdef PSXHW_LOG
@@
-106,7
+106,7
@@
index 27ddfeab..d7c6ff05 100644
#ifdef PSXHW_LOG
PSXHW_LOG("*Known 8bit write at address %x value %x\n", add, value);
#endif
#ifdef PSXHW_LOG
PSXHW_LOG("*Known 8bit write at address %x value %x\n", add, value);
#endif
-@@ -5
06,6 +507
,7 @@ void psxHwWrite16(u32 add, u16 value) {
+@@ -5
65,6 +566
,7 @@ void psxHwWrite16(u32 add, u16 value) {
return;
}
return;
}
@@
-114,7
+114,7
@@
index 27ddfeab..d7c6ff05 100644
psxHu16ref(add) = SWAPu16(value);
#ifdef PSXHW_LOG
PSXHW_LOG("*Unknown 16bit write at address %x value %x\n", add, value);
psxHu16ref(add) = SWAPu16(value);
#ifdef PSXHW_LOG
PSXHW_LOG("*Unknown 16bit write at address %x value %x\n", add, value);
-@@ -7
01,9 +703
,9 @@ void psxHwWrite32(u32 add, u32 value) {
+@@ -7
56,9 +758
,9 @@ void psxHwWrite32(u32 add, u32 value) {
return;
case 0x1f801820:
return;
case 0x1f801820:
@@
-126,7
+126,7
@@
index 27ddfeab..d7c6ff05 100644
case 0x1f801100:
#ifdef PSXHW_LOG
case 0x1f801100:
#ifdef PSXHW_LOG
-@@ -
761,6 +763
,7 @@ void psxHwWrite32(u32 add, u32 value) {
+@@ -
826,6 +828
,7 @@ void psxHwWrite32(u32 add, u32 value) {
return;
}
return;
}
@@
-135,10
+135,10
@@
index 27ddfeab..d7c6ff05 100644
#ifdef PSXHW_LOG
PSXHW_LOG("*Unknown 32bit write at address %x value %x\n", add, value);
diff --git a/libpcsxcore/psxinterpreter.c b/libpcsxcore/psxinterpreter.c
#ifdef PSXHW_LOG
PSXHW_LOG("*Unknown 32bit write at address %x value %x\n", add, value);
diff --git a/libpcsxcore/psxinterpreter.c b/libpcsxcore/psxinterpreter.c
-index
be15f782..6f07478f
100644
+index
5756bee5..4bf9248d
100644
--- a/libpcsxcore/psxinterpreter.c
+++ b/libpcsxcore/psxinterpreter.c
--- a/libpcsxcore/psxinterpreter.c
+++ b/libpcsxcore/psxinterpreter.c
-@@ -23
7,7 +237
,7 @@ static inline void addCycle(psxRegisters *regs)
+@@ -23
8,7 +238
,7 @@ static inline void addCycle(psxRegisters *regs)
{
assert(regs->subCycleStep >= 0x10000);
regs->subCycle += regs->subCycleStep;
{
assert(regs->subCycleStep >= 0x10000);
regs->subCycle += regs->subCycleStep;
@@
-147,7
+147,7
@@
index be15f782..6f07478f 100644
regs->subCycle &= 0xffff;
}
regs->subCycle &= 0xffff;
}
-@@ -43
4,7 +434
,9 @@ static void doBranch(psxRegisters *regs, u32 tar, enum R3000Abdt taken) {
+@@ -43
5,7 +435
,9 @@ static void doBranch(psxRegisters *regs, u32 tar, enum R3000Abdt taken) {
regs->CP0.n.Target = pc_final;
regs->branching = 0;
regs->CP0.n.Target = pc_final;
regs->branching = 0;
@@
-157,7
+157,7
@@
index be15f782..6f07478f 100644
}
static void doBranchReg(psxRegisters *regs, u32 tar) {
}
static void doBranchReg(psxRegisters *regs, u32 tar) {
-@@ -96
7,7 +969
,7 @@ void MTC0(psxRegisters *regs_, int reg, u32 val) {
+@@ -96
0,7 +962
,7 @@ void MTC0(psxRegisters *regs_, int reg, u32 val) {
}
}
}
}
@@
-166,7
+166,15
@@
index be15f782..6f07478f 100644
// no exception
static inline void psxNULLne(psxRegisters *regs) {
// no exception
static inline void psxNULLne(psxRegisters *regs) {
-@@ -1175,18 +1177,19 @@ static void intReset() {
+@@ -1120,6 +1122,7 @@ OP(psxHLE) {
+ }
+ psxHLEt[hleCode]();
+ branchSeen = 1;
++ psxRegs.cycle -= 2;
+ }
+
+ static void (INT_ATTR *psxBSC[64])(psxRegisters *regs_, u32 code) = {
+@@ -1169,18 +1172,20 @@ static void intReset() {
static inline void execI_(u8 **memRLUT, psxRegisters *regs) {
u32 pc = regs->pc;
static inline void execI_(u8 **memRLUT, psxRegisters *regs) {
u32 pc = regs->pc;
@@
-178,6
+186,7
@@
index be15f782..6f07478f 100644
regs->code = fetch(regs, memRLUT, pc);
psxBSC[regs->code >> 26](regs, regs->code);
+ psxRegs.cycle += 2;
regs->code = fetch(regs, memRLUT, pc);
psxBSC[regs->code >> 26](regs, regs->code);
+ psxRegs.cycle += 2;
++ fetchNoCache(regs, memRLUT, regs->pc); // bus err check
}
static inline void execIbp(u8 **memRLUT, psxRegisters *regs) {
}
static inline void execIbp(u8 **memRLUT, psxRegisters *regs) {
@@
-188,15
+197,16
@@
index be15f782..6f07478f 100644
dloadStep(regs);
if (execBreakCheck(regs, pc))
dloadStep(regs);
if (execBreakCheck(regs, pc))
-@@ -11
95,6 +1198,7
@@ static inline void execIbp(u8 **memRLUT, psxRegisters *regs) {
+@@ -11
89,6 +1194,8
@@ static inline void execIbp(u8 **memRLUT, psxRegisters *regs) {
regs->pc += 4;
regs->code = fetch(regs, memRLUT, pc);
psxBSC[regs->code >> 26](regs, regs->code);
+ psxRegs.cycle += 2;
regs->pc += 4;
regs->code = fetch(regs, memRLUT, pc);
psxBSC[regs->code >> 26](regs, regs->code);
+ psxRegs.cycle += 2;
++ fetchNoCache(regs, memRLUT, regs->pc); // bus err check
}
static void intExecute() {
}
static void intExecute() {
-@@ -12
24,6 +1228
,30 @@ void intExecuteBlock(enum blockExecCaller caller) {
+@@ -12
18,6 +1225
,30 @@ void intExecuteBlock(enum blockExecCaller caller) {
execI_(memRLUT, regs_);
}
execI_(memRLUT, regs_);
}
@@
-227,7
+237,16
@@
index be15f782..6f07478f 100644
static void intClear(u32 Addr, u32 Size) {
}
static void intClear(u32 Addr, u32 Size) {
}
-@@ -1271,7 +1299,7 @@ void intApplyConfig() {
+@@ -1246,7 +1277,7 @@ static void setupCop(u32 sr)
+ else
+ psxBSC[17] = psxCOPd;
+ if (sr & (1u << 30))
+- psxBSC[18] = Config.DisableStalls ? psxCOP2 : psxCOP2_stall;
++ psxBSC[18] = psxCOP2;
+ else
+ psxBSC[18] = psxCOPd;
+ if (sr & (1u << 31))
+@@ -1265,7 +1296,7 @@ void intApplyConfig() {
assert(psxSPC[26] == psxDIV || psxSPC[26] == psxDIV_stall);
assert(psxSPC[27] == psxDIVU || psxSPC[27] == psxDIVU_stall);
assert(psxSPC[26] == psxDIV || psxSPC[26] == psxDIV_stall);
assert(psxSPC[27] == psxDIVU || psxSPC[27] == psxDIVU_stall);
@@
-237,10
+256,10
@@
index be15f782..6f07478f 100644
psxBSC[50] = gteLWC2;
psxBSC[58] = gteSWC2;
diff --git a/libpcsxcore/psxmem.c b/libpcsxcore/psxmem.c
psxBSC[50] = gteLWC2;
psxBSC[58] = gteSWC2;
diff --git a/libpcsxcore/psxmem.c b/libpcsxcore/psxmem.c
-index
54219ae0..41168ced
100644
+index
42755e52..4fa4316b
100644
--- a/libpcsxcore/psxmem.c
+++ b/libpcsxcore/psxmem.c
--- a/libpcsxcore/psxmem.c
+++ b/libpcsxcore/psxmem.c
-@@ -2
78,10 +278
,13 @@ void psxMemOnIsolate(int enable)
+@@ -2
89,10 +289
,13 @@ void psxMemOnIsolate(int enable)
: R3000ACPU_NOTIFY_CACHE_UNISOLATED, NULL);
}
: R3000ACPU_NOTIFY_CACHE_UNISOLATED, NULL);
}
@@
-254,7
+273,7
@@
index 54219ae0..41168ced 100644
t = mem >> 16;
if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
if ((mem & 0xffff) < 0x400)
t = mem >> 16;
if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
if ((mem & 0xffff) < 0x400)
-@@ -3
07,6 +310
,7 @@ u16 psxMemRead16(u32 mem) {
+@@ -3
18,6 +321
,7 @@ u16 psxMemRead16(u32 mem) {
char *p;
u32 t;
char *p;
u32 t;
@@
-262,7
+281,7
@@
index 54219ae0..41168ced 100644
t = mem >> 16;
if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
if ((mem & 0xffff) < 0x400)
t = mem >> 16;
if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
if ((mem & 0xffff) < 0x400)
-@@ -3
32,6 +336
,7 @@ u32 psxMemRead32(u32 mem) {
+@@ -3
43,6 +347
,7 @@ u32 psxMemRead32(u32 mem) {
char *p;
u32 t;
char *p;
u32 t;
@@
-270,7
+289,7
@@
index 54219ae0..41168ced 100644
t = mem >> 16;
if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
if ((mem & 0xffff) < 0x400)
t = mem >> 16;
if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
if ((mem & 0xffff) < 0x400)
-@@ -3
59,6 +364
,7 @@ void psxMemWrite8(u32 mem, u8 value) {
+@@ -3
70,6 +375
,7 @@ void psxMemWrite8(u32 mem, u8 value) {
char *p;
u32 t;
char *p;
u32 t;
@@
-278,7
+297,7
@@
index 54219ae0..41168ced 100644
t = mem >> 16;
if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
if ((mem & 0xffff) < 0x400)
t = mem >> 16;
if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
if ((mem & 0xffff) < 0x400)
-@@ -3
86,6 +392
,7 @@ void psxMemWrite16(u32 mem, u16 value) {
+@@ -3
97,6 +403
,7 @@ void psxMemWrite16(u32 mem, u16 value) {
char *p;
u32 t;
char *p;
u32 t;
@@
-286,7
+305,7
@@
index 54219ae0..41168ced 100644
t = mem >> 16;
if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
if ((mem & 0xffff) < 0x400)
t = mem >> 16;
if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
if ((mem & 0xffff) < 0x400)
-@@ -4
13,6 +420
,7 @@ void psxMemWrite32(u32 mem, u32 value) {
+@@ -4
24,6 +431
,7 @@ void psxMemWrite32(u32 mem, u32 value) {
char *p;
u32 t;
char *p;
u32 t;
@@
-294,7
+313,7
@@
index 54219ae0..41168ced 100644
// if ((mem&0x1fffff) == 0x71E18 || value == 0x48088800) SysPrintf("t2fix!!\n");
t = mem >> 16;
if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
// if ((mem&0x1fffff) == 0x71E18 || value == 0x48088800) SysPrintf("t2fix!!\n");
t = mem >> 16;
if (t == 0x1f80 || t == 0x9f80 || t == 0xbf80) {
-@@ -4
31,6 +439
,8 @@ void psxMemWrite32(u32 mem, u32 value) {
+@@ -4
42,6 +450
,8 @@ void psxMemWrite32(u32 mem, u32 value) {
#endif
} else {
if (mem == 0xfffe0130) {
#endif
} else {
if (mem == 0xfffe0130) {
@@
-304,10
+323,10
@@
index 54219ae0..41168ced 100644
return;
}
diff --git a/libpcsxcore/r3000a.c b/libpcsxcore/r3000a.c
return;
}
diff --git a/libpcsxcore/r3000a.c b/libpcsxcore/r3000a.c
-index
dffbf6e7..0a3bdb65
100644
+index
48881068..47c40940
100644
--- a/libpcsxcore/r3000a.c
+++ b/libpcsxcore/r3000a.c
--- a/libpcsxcore/r3000a.c
+++ b/libpcsxcore/r3000a.c
-@@ -12
4,6 +124
,8 @@ void psxException(u32 cause, enum R3000Abdt bdt, psxCP0Regs *cp0) {
+@@ -12
7,6 +127
,8 @@ void psxException(u32 cause, enum R3000Abdt bdt, psxCP0Regs *cp0) {
}
void psxBranchTest() {
}
void psxBranchTest() {