-/* IO tables for 1000-1880 */
-#define IOADR8(a) ((a) & 0xfff)
-#define IOADR16(a) (((a) & 0xfff) >> 1)
-#define IOADR32(a) (((a) & 0xfff) >> 2)
-
-static const void *io_read8 [0x880] = {
- [IOADR8(0x1040)] = sioRead8,
- [IOADR8(0x1800)] = cdrRead0,
- [IOADR8(0x1801)] = cdrRead1,
- [IOADR8(0x1802)] = cdrRead2,
- [IOADR8(0x1803)] = cdrRead3,
-};
-static const void *io_read16[0x880/2] = {
- [IOADR16(0x1040)] = io_read_sio16,
- [IOADR16(0x1044)] = sioReadStat16,
- [IOADR16(0x1048)] = sioReadMode16,
- [IOADR16(0x104a)] = sioReadCtrl16,
- [IOADR16(0x104e)] = sioReadBaud16,
- [IOADR16(0x1100)] = io_rcnt_read_count0,
- [IOADR16(0x1104)] = io_rcnt_read_mode0,
- [IOADR16(0x1108)] = io_rcnt_read_target0,
- [IOADR16(0x1110)] = io_rcnt_read_count1,
- [IOADR16(0x1114)] = io_rcnt_read_mode1,
- [IOADR16(0x1118)] = io_rcnt_read_target1,
- [IOADR16(0x1120)] = io_rcnt_read_count2,
- [IOADR16(0x1124)] = io_rcnt_read_mode2,
- [IOADR16(0x1128)] = io_rcnt_read_target2,
-};
-static const void *io_read32[0x880/4] = {
- [IOADR32(0x1040)] = io_read_sio32,
- [IOADR32(0x1100)] = io_rcnt_read_count0,
- [IOADR32(0x1104)] = io_rcnt_read_mode0,
- [IOADR32(0x1108)] = io_rcnt_read_target0,
- [IOADR32(0x1110)] = io_rcnt_read_count1,
- [IOADR32(0x1114)] = io_rcnt_read_mode1,
- [IOADR32(0x1118)] = io_rcnt_read_target1,
- [IOADR32(0x1120)] = io_rcnt_read_count2,
- [IOADR32(0x1124)] = io_rcnt_read_mode2,
- [IOADR32(0x1128)] = io_rcnt_read_target2,
-// [IOADR32(0x1810)] = GPU_readData,
-// [IOADR32(0x1814)] = GPU_readStatus,
- [IOADR32(0x1820)] = mdecRead0,
- [IOADR32(0x1824)] = mdecRead1,
-};
-// write(u32 val)
-static const void *io_write8 [0x880] = {
- [IOADR8(0x1040)] = sioWrite8,
- [IOADR8(0x1800)] = cdrWrite0,
- [IOADR8(0x1801)] = cdrWrite1,
- [IOADR8(0x1802)] = cdrWrite2,
- [IOADR8(0x1803)] = cdrWrite3,
-};
-static const void *io_write16[0x880/2] = {
- [IOADR16(0x1040)] = io_write_sio16,
- [IOADR16(0x1044)] = sioWriteStat16,
- [IOADR16(0x1048)] = sioWriteMode16,
- [IOADR16(0x104a)] = sioWriteCtrl16,
- [IOADR16(0x104e)] = sioWriteBaud16,
- [IOADR16(0x1070)] = io_write_ireg16,
- [IOADR16(0x1074)] = io_write_imask16,
- [IOADR16(0x1100)] = io_rcnt_write_count0,
- [IOADR16(0x1104)] = io_rcnt_write_mode0,
- [IOADR16(0x1108)] = io_rcnt_write_target0,
- [IOADR16(0x1110)] = io_rcnt_write_count1,
- [IOADR16(0x1114)] = io_rcnt_write_mode1,
- [IOADR16(0x1118)] = io_rcnt_write_target1,
- [IOADR16(0x1120)] = io_rcnt_write_count2,
- [IOADR16(0x1124)] = io_rcnt_write_mode2,
- [IOADR16(0x1128)] = io_rcnt_write_target2,
-};
-static const void *io_write32[0x880/4] = {
- [IOADR32(0x1040)] = io_write_sio32,
- [IOADR32(0x1070)] = io_write_ireg32,
- [IOADR32(0x1074)] = io_write_imask32,
- [IOADR32(0x1088)] = io_write_chcr0,
- [IOADR32(0x1098)] = io_write_chcr1,
- [IOADR32(0x10a8)] = io_write_chcr2,
- [IOADR32(0x10b8)] = io_write_chcr3,
- [IOADR32(0x10c8)] = io_write_chcr4,
- [IOADR32(0x10e8)] = io_write_chcr6,
- [IOADR32(0x10f4)] = io_write_dma_icr32,
- [IOADR32(0x1100)] = io_rcnt_write_count0,
- [IOADR32(0x1104)] = io_rcnt_write_mode0,
- [IOADR32(0x1108)] = io_rcnt_write_target0,
- [IOADR32(0x1110)] = io_rcnt_write_count1,
- [IOADR32(0x1114)] = io_rcnt_write_mode1,
- [IOADR32(0x1118)] = io_rcnt_write_target1,
- [IOADR32(0x1120)] = io_rcnt_write_count2,
- [IOADR32(0x1124)] = io_rcnt_write_mode2,
- [IOADR32(0x1128)] = io_rcnt_write_target2,
-// [IOADR32(0x1810)] = GPU_writeData,
-// [IOADR32(0x1814)] = GPU_writeStatus,
- [IOADR32(0x1820)] = mdecWrite0,
- [IOADR32(0x1824)] = mdecWrite1,
-};
-
-// this has to be in .bss to link into dynarec_local
-struct {
- void *tab_read8;
- void *tab_read16;
- void *tab_read32;
- void *tab_write8;
- void *tab_write16;
- void *tab_write32;
- void *spu_readf;
- void *spu_writef;
-} nd_pcsx_io;