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release r12
[pcsx_rearmed.git]
/
libpcsxcore
/
psxcounters.c
diff --git
a/libpcsxcore/psxcounters.c
b/libpcsxcore/psxcounters.c
index
90c3d14
..
cd99842
100644
(file)
--- a/
libpcsxcore/psxcounters.c
+++ b/
libpcsxcore/psxcounters.c
@@
-22,17
+22,11
@@
*/
#include "psxcounters.h"
*/
#include "psxcounters.h"
+#include "gpu.h"
#include "debug.h"
/******************************************************************************/
#include "debug.h"
/******************************************************************************/
-typedef struct Rcnt
-{
- u16 mode, target;
- u32 rate, irq, counterState, irqState;
- u32 cycle, cycleStart;
-} Rcnt;
-
enum
{
Rc0Gate = 0x0001, // 0 not implemented
enum
{
Rc0Gate = 0x0001, // 0 not implemented
@@
-75,12
+69,13
@@
static const s32 VerboseLevel = VERBOSE_LEVEL;
/******************************************************************************/
/******************************************************************************/
-
static
Rcnt rcnts[ CounterQuantity ];
+Rcnt rcnts[ CounterQuantity ];
-static u32 hSyncCount = 0;
+u32 hSyncCount = 0;
+u32 frame_counter = 0;
static u32 spuSyncCount = 0;
static u32 hsync_steps = 0;
static u32 spuSyncCount = 0;
static u32 hsync_steps = 0;
-static u32
gpu_wants_hcnt
= 0;
+static u32
base_cycle
= 0;
u32 psxNextCounter = 0, psxNextsCounter = 0;
u32 psxNextCounter = 0, psxNextsCounter = 0;
@@
-183,6
+178,9
@@
void psxRcntSet()
psxNextCounter = countToUpdate;
}
}
psxNextCounter = countToUpdate;
}
}
+
+ psxRegs.interrupt |= (1 << PSXINT_RCNT);
+ new_dyna_set_event(PSXINT_RCNT, psxNextCounter);
}
/******************************************************************************/
}
/******************************************************************************/
@@
-192,20
+190,16
@@
void psxRcntReset( u32 index )
{
u32 count;
{
u32 count;
+ rcnts[index].mode |= RcUnknown10;
+
if( rcnts[index].counterState == CountToTarget )
{
if( rcnts[index].counterState == CountToTarget )
{
+ count = psxRegs.cycle;
+ count -= rcnts[index].cycleStart;
+ if( rcnts[index].rate > 1 )
+ count /= rcnts[index].rate;
if( rcnts[index].mode & RcCountToTarget )
if( rcnts[index].mode & RcCountToTarget )
- {
- count = psxRegs.cycle;
- count -= rcnts[index].cycleStart;
- if (rcnts[index].rate > 1)
- count /= rcnts[index].rate;
count -= rcnts[index].target;
count -= rcnts[index].target;
- }
- else
- {
- count = _psxRcntRcount( index );
- }
_psxRcntWcount( index, count );
_psxRcntWcount( index, count );
@@
-220,8
+214,12
@@
void psxRcntReset( u32 index )
}
rcnts[index].mode |= RcCountEqTarget;
}
rcnts[index].mode |= RcCountEqTarget;
+
+ if( count < 0xffff ) // special case, overflow too?
+ return;
}
}
- else if( rcnts[index].counterState == CountToOverflow )
+
+ if( rcnts[index].counterState == CountToOverflow )
{
count = psxRegs.cycle;
count -= rcnts[index].cycleStart;
{
count = psxRegs.cycle;
count -= rcnts[index].cycleStart;
@@
-243,10
+241,6
@@
void psxRcntReset( u32 index )
rcnts[index].mode |= RcOverflow;
}
rcnts[index].mode |= RcOverflow;
}
-
- rcnts[index].mode |= RcUnknown10;
-
- psxRcntSet();
}
void psxRcntUpdate()
}
void psxRcntUpdate()
@@
-296,22
+290,24
@@
void psxRcntUpdate()
// VSync irq.
if( hSyncCount == VBlankStart[Config.PsxType] )
{
// VSync irq.
if( hSyncCount == VBlankStart[Config.PsxType] )
{
- GPU_vBlank( 1, &hSyncCount, &gpu_wants_hcnt );
-
- // For the best times. :D
- //setIrq( 0x01 );
+ if( !(HW_GPU_STATUS & PSXGPU_ILACE) )
+ HW_GPU_STATUS |= PSXGPU_LCF;
+
+ setIrq( 0x01 );
+
+ EmuUpdate();
+ GPU_updateLace();
}
// Update lace. (with InuYasha fix)
if( hSyncCount >= (Config.VSyncWA ? HSyncTotal[Config.PsxType] / BIAS : HSyncTotal[Config.PsxType]) )
{
hSyncCount = 0;
}
// Update lace. (with InuYasha fix)
if( hSyncCount >= (Config.VSyncWA ? HSyncTotal[Config.PsxType] / BIAS : HSyncTotal[Config.PsxType]) )
{
hSyncCount = 0;
+ frame_counter++;
- GPU_vBlank( 0, &hSyncCount, &gpu_wants_hcnt );
- setIrq( 0x01 );
-
- EmuUpdate();
- GPU_updateLace();
+ HW_GPU_STATUS &= ~PSXGPU_LCF;
+ if( HW_GPU_STATUS & PSXGPU_ILACE )
+ HW_GPU_STATUS |= frame_counter << 31;
}
// Schedule next call, in hsyncs
}
// Schedule next call, in hsyncs
@@
-322,14
+318,20
@@
void psxRcntUpdate()
hsync_steps = next_vsync;
if( next_lace && next_lace < hsync_steps )
hsync_steps = next_lace;
hsync_steps = next_vsync;
if( next_lace && next_lace < hsync_steps )
hsync_steps = next_lace;
- if( gpu_wants_hcnt )
- hsync_steps = 1;
rcnts[3].cycleStart = cycle - leftover_cycles;
rcnts[3].cycleStart = cycle - leftover_cycles;
- rcnts[3].cycle = hsync_steps * rcnts[3].target;
- psxRcntSet();
+ if (Config.PsxType)
+ // 20.12 precision, clk / 50 / 313 ~= 2164.14
+ base_cycle += hsync_steps * 8864320;
+ else
+ // clk / 60 / 263 ~= 2146.31
+ base_cycle += hsync_steps * 8791293;
+ rcnts[3].cycle = base_cycle >> 12;
+ base_cycle &= 0xfff;
}
}
+ psxRcntSet();
+
#ifndef NDEBUG
DebugVSync();
#endif
#ifndef NDEBUG
DebugVSync();
#endif
@@
-498,6
+500,8
@@
s32 psxRcntFreeze( gzFile f, s32 Mode )
if (Mode == 0)
hsync_steps = (psxRegs.cycle - rcnts[3].cycleStart) / rcnts[3].target;
if (Mode == 0)
hsync_steps = (psxRegs.cycle - rcnts[3].cycleStart) / rcnts[3].target;
+ base_cycle = 0;
+
return 0;
}
return 0;
}