+ if (HW_DMA2_CHCR == SWAP32(0x01000401) && !(HW_DMA2_MADR & SWAP32(0x800000)))
+ {
+ u32 madr_next = 0xffffff, madr = SWAPu32(HW_DMA2_MADR);
+ int cycles_sum, cycles_last_cmd = 0;
+ cycles_sum = GPU_dmaChain((u32 *)psxM, madr & 0x1fffff,
+ &madr_next, &cycles_last_cmd);
+ HW_DMA2_MADR = SWAPu32(madr_next);
+ if ((s32)(psxRegs.gpuIdleAfter - psxRegs.cycle) > 0)
+ cycles_sum += psxRegs.gpuIdleAfter - psxRegs.cycle;
+ psxRegs.gpuIdleAfter = psxRegs.cycle + cycles_sum + cycles_last_cmd;
+ set_event(PSXINT_GPUDMA, cycles_sum);
+ //printf("%u dma2cn: %d,%d %08x\n", psxRegs.cycle, cycles_sum,
+ // cycles_last_cmd, HW_DMA2_MADR);
+ return;
+ }