+\r
+void z80_mem_setup(void)\r
+{\r
+ z80_map_set(z80_read_map, 0x0000, 0x1fff, Pico.zram, 0);\r
+ z80_map_set(z80_read_map, 0x2000, 0x3fff, Pico.zram, 0);\r
+ z80_map_set(z80_read_map, 0x4000, 0x5fff, ym2612_read_local_z80, 1);\r
+ z80_map_set(z80_read_map, 0x6000, 0x7fff, z80_md_vdp_read, 1);\r
+ z80_map_set(z80_read_map, 0x8000, 0xffff, z80_md_bank_read, 1);\r
+\r
+ z80_map_set(z80_write_map, 0x0000, 0x1fff, Pico.zram, 0);\r
+ z80_map_set(z80_write_map, 0x2000, 0x3fff, Pico.zram, 0);\r
+ z80_map_set(z80_write_map, 0x4000, 0x5fff, z80_md_ym2612_write, 1);\r
+ z80_map_set(z80_write_map, 0x6000, 0x7fff, z80_md_vdp_br_write, 1);\r
+ z80_map_set(z80_write_map, 0x8000, 0xffff, z80_md_bank_write, 1);\r
+\r
+#ifdef _USE_DRZ80\r
+ drZ80.z80_in = z80_md_in;\r
+ drZ80.z80_out = z80_md_out;\r
+#endif\r
+#ifdef _USE_CZ80\r
+ Cz80_Set_Fetch(&CZ80, 0x0000, 0x1fff, (UINT32)Pico.zram); // main RAM\r
+ Cz80_Set_Fetch(&CZ80, 0x2000, 0x3fff, (UINT32)Pico.zram); // mirror\r
+ Cz80_Set_INPort(&CZ80, z80_md_in);\r
+ Cz80_Set_OUTPort(&CZ80, z80_md_out);\r