+ int mask, rs, sstart, a;\r
+\r
+ // setup the memory map\r
+ cpu68k_map_set(m68k_read8_map, 0x000000, 0xffffff, m68k_unmapped_read8, 1);\r
+ cpu68k_map_set(m68k_read16_map, 0x000000, 0xffffff, m68k_unmapped_read16, 1);\r
+ cpu68k_map_set(m68k_write8_map, 0x000000, 0xffffff, m68k_unmapped_write8, 1);\r
+ cpu68k_map_set(m68k_write16_map, 0x000000, 0xffffff, m68k_unmapped_write16, 1);\r
+\r
+ // ROM\r
+ // align to bank size. We know ROM loader allocated enough for this\r
+ mask = (1 << M68K_MEM_SHIFT) - 1;\r
+ rs = (Pico.romsize + mask) & ~mask;\r
+ cpu68k_map_set(m68k_read8_map, 0x000000, rs - 1, Pico.rom, 0);\r
+ cpu68k_map_set(m68k_read16_map, 0x000000, rs - 1, Pico.rom, 0);\r
+\r
+ // Common case of on-cart (save) RAM, usually at 0x200000-...\r
+ if ((Pico.sv.flags & SRF_ENABLED) && Pico.sv.data != NULL) {\r
+ sstart = Pico.sv.start;\r
+ rs = Pico.sv.end - sstart;\r
+ rs = (rs + mask) & ~mask;\r
+ if (sstart + rs >= 0x1000000)\r
+ rs = 0x1000000 - sstart;\r
+ cpu68k_map_set(m68k_read8_map, sstart, sstart + rs - 1, PicoRead8_sram, 1);\r
+ cpu68k_map_set(m68k_read16_map, sstart, sstart + rs - 1, PicoRead16_sram, 1);\r
+ cpu68k_map_set(m68k_write8_map, sstart, sstart + rs - 1, PicoWrite8_sram, 1);\r
+ cpu68k_map_set(m68k_write16_map, sstart, sstart + rs - 1, PicoWrite16_sram, 1);\r
+ }\r
+\r
+ // Z80 region\r
+ cpu68k_map_set(m68k_read8_map, 0xa00000, 0xa0ffff, PicoRead8_z80, 1);\r
+ cpu68k_map_set(m68k_read16_map, 0xa00000, 0xa0ffff, PicoRead16_z80, 1);\r
+ cpu68k_map_set(m68k_write8_map, 0xa00000, 0xa0ffff, PicoWrite8_z80, 1);\r
+ cpu68k_map_set(m68k_write16_map, 0xa00000, 0xa0ffff, PicoWrite16_z80, 1);\r
+\r
+ // IO/control region\r
+ cpu68k_map_set(m68k_read8_map, 0xa10000, 0xa1ffff, PicoRead8_io, 1);\r
+ cpu68k_map_set(m68k_read16_map, 0xa10000, 0xa1ffff, PicoRead16_io, 1);\r
+ cpu68k_map_set(m68k_write8_map, 0xa10000, 0xa1ffff, PicoWrite8_io, 1);\r
+ cpu68k_map_set(m68k_write16_map, 0xa10000, 0xa1ffff, PicoWrite16_io, 1);\r
+\r
+ // VDP region\r
+ for (a = 0xc00000; a < 0xe00000; a += 0x010000) {\r
+ if ((a & 0xe700e0) != 0xc00000)\r
+ continue;\r
+ cpu68k_map_set(m68k_read8_map, a, a + 0xffff, PicoRead8_vdp, 1);\r
+ cpu68k_map_set(m68k_read16_map, a, a + 0xffff, PicoRead16_vdp, 1);\r
+ cpu68k_map_set(m68k_write8_map, a, a + 0xffff, PicoWrite8_vdp, 1);\r
+ cpu68k_map_set(m68k_write16_map, a, a + 0xffff, PicoWrite16_vdp, 1);\r
+ }\r
+\r
+ // RAM and it's mirrors\r
+ for (a = 0xe00000; a < 0x1000000; a += 0x010000) {\r
+ cpu68k_map_set(m68k_read8_map, a, a + 0xffff, PicoMem.ram, 0);\r
+ cpu68k_map_set(m68k_read16_map, a, a + 0xffff, PicoMem.ram, 0);\r
+ cpu68k_map_set(m68k_write8_map, a, a + 0xffff, PicoMem.ram, 0);\r
+ cpu68k_map_set(m68k_write16_map, a, a + 0xffff, PicoMem.ram, 0);\r
+ }\r
+\r