.include "port_config.s"\r
\r
.text\r
+.align 4\r
\r
@ default jump tables\r
\r
.long m_read_null @ 0xB80000 - 0xBFFFFF\r
.long m_read8_vdp @ 0xC00000 - 0xC7FFFF\r
.long m_read8_vdp @ 0xC80000 - 0xCFFFFF\r
- .long m_read_null @ 0xD00000 - 0xD7FFFF\r
- .long m_read_null @ 0xD80000 - 0xDFFFFF\r
+ .long m_read8_vdp @ 0xD00000 - 0xD7FFFF\r
+ .long m_read8_vdp @ 0xD80000 - 0xDFFFFF\r
.long m_read8_ram @ 0xE00000 - 0xE7FFFF\r
.long m_read8_ram @ 0xE80000 - 0xEFFFFF\r
.long m_read8_ram @ 0xF00000 - 0xF7FFFF\r
.long m_read_null @ 0xB00000 - 0xB7FFFF\r
.long m_read_null @ 0xB80000 - 0xBFFFFF\r
.long m_read16_vdp @ 0xC00000 - 0xC7FFFF\r
- .long m_read_null @ 0xC80000 - 0xCFFFFF\r
- .long m_read_null @ 0xD00000 - 0xD7FFFF\r
- .long m_read_null @ 0xD80000 - 0xDFFFFF\r
+ .long m_read16_vdp @ 0xC80000 - 0xCFFFFF\r
+ .long m_read16_vdp @ 0xD00000 - 0xD7FFFF\r
+ .long m_read16_vdp @ 0xD80000 - 0xDFFFFF\r
.long m_read16_ram @ 0xE00000 - 0xE7FFFF\r
.long m_read16_ram @ 0xE80000 - 0xEFFFFF\r
.long m_read16_ram @ 0xF00000 - 0xF7FFFF\r
.long m_read_null @ 0xB00000 - 0xB7FFFF\r
.long m_read_null @ 0xB80000 - 0xBFFFFF\r
.long m_read32_vdp @ 0xC00000 - 0xC7FFFF\r
- .long m_read_null @ 0xC80000 - 0xCFFFFF\r
- .long m_read_null @ 0xD00000 - 0xD7FFFF\r
- .long m_read_null @ 0xD80000 - 0xDFFFFF\r
+ .long m_read32_vdp @ 0xC80000 - 0xCFFFFF\r
+ .long m_read32_vdp @ 0xD00000 - 0xD7FFFF\r
+ .long m_read32_vdp @ 0xD80000 - 0xDFFFFF\r
.long m_read32_ram @ 0xE00000 - 0xE7FFFF\r
.long m_read32_ram @ 0xE80000 - 0xEFFFFF\r
.long m_read32_ram @ 0xF00000 - 0xF7FFFF\r
@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@\r
\r
.bss\r
+.align 4\r
@.section .bss, "brw"\r
@.data\r
\r
@ @@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@\r
\r
.text\r
+.align 4\r
\r
.global PicoMemReset\r
.global PicoRead8\r
@ update memhandlers according to ROM size\r
ldr r1, =m_read8_above_rom\r
ldr r0, =m_read8_table\r
- mov r2, #16\r
+ mov r2, #20\r
1:\r
sub r2, r2, #1\r
cmp r2, r12\r
2:\r
ldr r1, =m_read16_above_rom\r
ldr r0, =m_read16_table\r
- mov r2, #16\r
+ mov r2, #20\r
1:\r
sub r2, r2, #1\r
cmp r2, r12\r
2:\r
ldr r1, =m_read32_above_rom\r
ldr r0, =m_read32_table\r
- mov r2, #16\r
+ mov r2, #20\r
1:\r
sub r2, r2, #1\r
cmp r2, r12\r
orr r0, r0, #0x200000\r
cmp r0, r1\r
bgt m_read8_nosram\r
- ldr r1, [r2, #4] @ SRam.start (1ci)\r
+ ldr r1, [r2, #4] @ SRam.start\r
cmp r0, r1\r
blt m_read8_nosram\r
- ldrb r1, [r3, #0x11] @ Pico.m.sram_reg (1ci)\r
- sub r12,r0, #0x200000\r
- tst r1, #0x10\r
- bne m_read8_detected\r
- cmp r12,#1\r
- ble m_read8_detected\r
- tst r1, #1\r
- orrne r1, r1, #0x10\r
- strneb r1, [r3, #0x11]\r
-m_read8_detected:\r
- tst r1, #4 @ EEPROM read?\r
- bne SRAMReadEEPROM\r
-m_read8_noteeprom:\r
- tst r1, #1\r
- beq m_read8_nosram\r
- ldr r3, [r2] @ SRam.data\r
- ldr r2, [r2, #4] @ SRam.start (1ci)\r
- sub r3, r3, r2\r
- ldrb r0, [r3, r0]\r
- bx lr\r
+ ldrb r1, [r3, #0x11] @ Pico.m.sram_reg\r
+ tst r1, #5\r
+ bne SRAMRead\r
m_read8_nosram:\r
- ldr r1, [r3, #4] @ 1ci\r
+ ldr r1, [r3, #4] @ romsize\r
cmp r0, r1\r
movgt r0, #0\r
bxgt lr @ bad location\r
cmp r2, #0x4000\r
mvnne r0, #0\r
bxne lr @ invalid\r
-.if EXTERNAL_YM2612\r
ldr r1, =PicoOpt\r
ldr r1, [r1]\r
tst r1, #1\r
- beq m_read8_fake_ym2612\r
- tst r1, #0x200\r
- beq YM2612Read_\r
- b YM2612Read_940\r
-.else\r
- b YM2612Read_\r
-.endif\r
+\r
+ ldrne r1, =ym2612_st\r
+ ldrne r1, [r1]\r
+ ldrneb r0, [r1, #0x11] @ ym2612_st->status\r
+ bxne lr\r
\r
m_read8_fake_ym2612:\r
ldr r3, =(Pico+0x22200)\r
bx lr\r
\r
m_read8_above_rom:\r
+ @ might still be SRam (Micro Machines, HardBall '95)\r
+ ldr r2, =(SRam)\r
+ ldr r3, =(Pico+0x22200)\r
+ ldr r1, [r2, #8] @ SRam.end\r
+ cmp r0, r1\r
+ bgt m_read8_ar_nosram\r
+ ldr r1, [r2, #4] @ SRam.start\r
+ cmp r0, r1\r
+ blt m_read8_ar_nosram\r
+ ldrb r1, [r3, #0x11] @ Pico.m.sram_reg\r
+ tst r1, #5\r
+ bne SRAMRead\r
+m_read8_ar_nosram:\r
+ ldr r2, =PicoRead16Hook\r
stmfd sp!,{r0,lr}\r
+ ldr r2, [r2]\r
bic r0, r0, #1\r
mov r1, #8\r
- bl OtherRead16End\r
+ mov lr, pc\r
+ bx r2\r
ldmfd sp!,{r1,lr}\r
tst r1, #1\r
moveq r0, r0, lsr #8\r
orr r0, r0, #0x200000\r
cmp r0, r1\r
bgt m_read16_nosram\r
- ldrb r1, [r3, #0x11] @ Pico.m.sram_reg (2ci)\r
- tst r1, #1\r
- beq m_read16_nosram\r
- ldr r1, [r2, #4] @ SRam.start (1ci)\r
+ ldr r1, [r2, #4] @ SRam.start\r
cmp r0, r1\r
blt m_read16_nosram\r
- ldr r2, [r2] @ SRam.data (1ci)\r
- sub r2, r2, r1\r
- ldrh r0, [r2, r0] @ 2ci\r
- and r1, r0, #0xff\r
- mov r0, r0, lsr #8\r
- orr r0, r0, r1, lsl #8\r
- bx lr\r
-\r
+ ldrb r1, [r3, #0x11] @ Pico.m.sram_reg\r
+ tst r1, #5\r
+ beq m_read16_nosram\r
+ stmfd sp!,{lr}\r
+ bl SRAMRead16\r
+ ldmfd sp!,{pc}\r
m_read16_nosram:\r
- ldr r1, [r3, #4] @ 1ci\r
+ ldr r1, [r3, #4] @ romsize\r
cmp r0, r1\r
movgt r0, #0\r
bxgt lr @ bad location\r
b OtherRead16\r
\r
m_read16_vdp:\r
- tst r0, #0x70000\r
+ tst r0, #0x70000 @ if ((a&0xe700e0)==0xc00000)\r
tsteq r0, #0x000e0\r
bxne lr @ invalid read\r
bic r0, r0, #1\r
bx lr\r
\r
m_read16_above_rom:\r
+ @ might still be SRam\r
+ ldr r2, =(SRam)\r
+ ldr r3, =(Pico+0x22200)\r
+ ldr r1, [r2, #8] @ SRam.end\r
bic r0, r0, #1\r
+ cmp r0, r1\r
+ bgt m_read16_ar_nosram\r
+ ldr r1, [r2, #4] @ SRam.start\r
+ cmp r0, r1\r
+ blt m_read16_ar_nosram\r
+ ldrb r1, [r3, #0x11] @ Pico.m.sram_reg\r
+ tst r1, #5\r
+ beq m_read16_ar_nosram\r
+ stmfd sp!,{lr}\r
+ bl SRAMRead16\r
+ ldmfd sp!,{pc}\r
+m_read16_ar_nosram:\r
+ ldr r2, =PicoRead16Hook\r
+ ldr r2, [r2]\r
mov r1, #16\r
- b OtherRead16End\r
+ bx r2\r
\r
.pool\r
\r
orr r0, r0, #0x200000\r
cmp r0, r1\r
bgt m_read32_nosram\r
- ldrb r1, [r3, #0x11] @ Pico.m.sram_reg (2ci)\r
- tst r1, #1\r
- beq m_read32_nosram\r
- ldr r1, [r2, #4] @ SRam.start (1ci)\r
+ ldr r1, [r2, #4] @ SRam.start\r
cmp r0, r1\r
blt m_read32_nosram\r
- ldr r2, [r2] @ SRam.data (1ci)\r
- sub r2, r2, r1\r
- ldrh r0, [r2, r0]! @ (1ci)\r
- ldrh r1, [r2, #2]\r
- orr r0, r0, r0, lsl #16\r
- mov r0, r0, ror #8\r
- mov r0, r0, lsl #16\r
- orr r0, r0, r1, lsr #8\r
- and r1, r1, #0xff\r
- orr r0, r0, r1, lsl #8\r
+ ldrb r1, [r3, #0x11] @ Pico.m.sram_reg\r
+ tst r1, #5\r
+ beq m_read32_nosram\r
+ stmfd sp!,{r0,lr}\r
+ bl SRAMRead16\r
+ ldmfd sp!,{r1,lr}\r
+ stmfd sp!,{r0,lr}\r
+ add r0, r1, #2\r
+ bl SRAMRead16\r
+ ldmfd sp!,{r1,lr}\r
+ orr r0, r0, r1, lsl #16\r
bx lr\r
-\r
m_read32_nosram:\r
- ldr r1, [r3, #4] @ (1ci)\r
+ ldr r1, [r3, #4] @ romsize\r
cmp r0, r1\r
movgt r0, #0\r
bxgt lr @ bad location\r
bx lr\r
\r
m_read32_above_rom:\r
+ ldr r2, =PicoRead16Hook\r
bic r0, r0, #1\r
- stmfd sp!,{r0,lr}\r
+ ldr r2, [r2]\r
mov r1, #32\r
- bl OtherRead16End\r
+ stmfd sp!,{r0,r2,lr}\r
+ mov lr, pc\r
+ bx r2\r
mov r1, r0\r
- ldmfd sp!,{r0}\r
+ ldmfd sp!,{r0,r2}\r
stmfd sp!,{r1}\r
add r0, r0, #2\r
mov r1, #32\r
- bl OtherRead16End\r
+ mov lr, pc\r
+ bx r2\r
ldmfd sp!,{r1,lr}\r
orr r0, r0, r1, lsl #16\r
bx lr\r
ldr r2, =emustatus\r
ldmfd sp!,{lr}\r
ldr r1, [r2]\r
- orr r1, r0, r2\r
+ and r0, r0, #1\r
+ orr r1, r0, r1\r
str r1, [r2] @ emustatus|=YM2612Write(a&3, d);\r
bx lr\r
\r