#define UTYPES_DEFINED
#endif
-#ifdef _ASM_MEMORY_C
-u32 OtherRead16End(u32 a, int realsize);
-#endif
-#ifdef _ASM_CD_MEMORY_C
-static void OtherWrite8End(u32 a,u32 d,int realsize);
-#endif
-
#ifndef _ASM_MEMORY_C
static
a&=0x1fff;
- if(!(PicoOpt&4)) {
+ if (!(PicoOpt&POPT_EN_Z80))
+ {
// Z80 disabled, do some faking
static u8 zerosent = 0;
if(a == Pico.m.z80_lastaddr) { // probably polling something
u32 z80ReadBusReq(void)
{
u32 d=Pico.m.z80Run&1;
- if (!d && Pico.m.scanline != -1) {
+ if (!d) {
// needed by buggy Terminator (Sega CD)
int stop_before = SekCyclesDone() - z80stopCycle;
//elprintf(EL_BUSREQ, "get_zrun: stop before: %i", stop_before);
// note: if we use 20 or more here, Barkley Shut Up and Jam! will purposedly crash itself.
- // TODO: CD Terminator
+ // but CD Terminator needs at least 32, so it only works because next frame cycle wrap.
if (stop_before > 0 && stop_before < 20) // Gens uses 16 here
d = 1; // bus not yet available
}
- // |=0x80 for Shadow of the Beast & Super Offroad
+
elprintf(EL_BUSREQ, "get_zrun: %02x [%i] @%06x", d|0x80, SekCyclesDone(), SekPc);
return d|0x80;
}
void z80WriteBusReq(u32 d)
{
d&=1; d^=1;
- if (Pico.m.scanline != -1)
{
- if(!d) {
- // this is for a nasty situation where Z80 was enabled and disabled in the same 68k timeslice (Golden Axe III)
- if (Pico.m.z80Run) {
- int lineCycles;
+ if (!d)
+ {
+ if ((PicoOpt&POPT_EN_Z80) && Pico.m.z80Run)
+ {
z80stopCycle = SekCyclesDone();
- if (Pico.m.z80Run&2)
- lineCycles=(488-SekCyclesLeft)&0x1ff;
- else lineCycles=z80stopCycle-z80startCycle; // z80 was started at current line
- if (lineCycles > 0 && lineCycles <= 488) {
- //dprintf("zrun: %i/%i cycles", lineCycles, (lineCycles>>1)-(lineCycles>>5));
- lineCycles=(lineCycles>>1)-(lineCycles>>5);
- z80_run(lineCycles);
- }
+ PicoSyncZ80(z80stopCycle);
}
} else {
if (!Pico.m.z80Run)
- z80startCycle = SekCyclesDone();
- else
- d|=Pico.m.z80Run;
+ z80_cycle_cnt = cycles_68k_to_z80(SekCyclesDone());
}
}
elprintf(EL_BUSREQ, "set_zrun: %i->%i [%i] @%06x", Pico.m.z80Run, d, SekCyclesDone(), SekPc);
goto end;
}
- if ((a&0xff0000)==0xa00000) {
+ if ((a&0xff0000)==0xa00000)
+ {
+ if (Pico.m.z80Run&1)
+ elprintf(EL_ANOMALY, "68k z80 read with no bus! [%06x] @ %06x", a, SekPc);
if ((a&0x4000)==0x0000) { d=z80Read8(a); d|=d<<8; goto end; } // Z80 ram (not byteswaped)
if ((a&0x6000)==0x4000) { // 0x4000-0x5fff, Fudge if disabled
- if(PicoOpt&1) d=YM2612Read();
+ if (PicoOpt&POPT_EN_FM) d=ym2612_read_local_68k();
else d=Pico.m.rotate++&3;
- elprintf(EL_YM2612R, "read ym2612: %02x", d);
goto end;
}
+ elprintf(EL_ANOMALY, "68k bad read [%06x]", a);
d=0xffff;
goto end;
}
-#ifndef _ASM_MEMORY_C
- if ((a&0xe700e0)==0xc00000) { d=PicoVideoRead(a); goto end; }
-#endif
-
- d = OtherRead16End(a, realsize);
+ d = PicoRead16Hook(a, realsize);
end:
return d;
{
a=(a>>1)&0xf;
// 6 button gamepad: if TH went from 0 to 1, gamepad changes state
- if(PicoOpt&0x20) {
- if(a==1) {
+ if (PicoOpt&POPT_6BTN_PAD)
+ {
+ if (a==1) {
Pico.m.padDelay[0] = 0;
if(!(Pico.ioports[1]&0x40) && (d&0x40)) Pico.m.padTHPhase[0]++;
}
- else if(a==2) {
+ else if (a==2) {
Pico.m.padDelay[1] = 0;
if(!(Pico.ioports[2]&0x40) && (d&0x40)) Pico.m.padTHPhase[1]++;
}
#endif
void OtherWrite8(u32 a,u32 d)
{
-#ifndef _ASM_MEMORY_C
+#if !defined(_ASM_MEMORY_C) || defined(_ASM_MEMORY_C_AMIPS)
if ((a&0xe700f9)==0xc00011||(a&0xff7ff9)==0xa07f11) { if(PicoOpt&2) SN76496Write(d); return; } // PSG Sound
- if ((a&0xff4000)==0xa00000) { if(!(Pico.m.z80Run&1)) Pico.zram[a&0x1fff]=(u8)d; return; } // Z80 ram
- if ((a&0xff6000)==0xa04000) { if(PicoOpt&1) emustatus|=YM2612Write(a&3, d); return; } // FM Sound
+ if ((a&0xff4000)==0xa00000) { // z80 RAM
+ SekCyclesBurn(2); // hack
+ if (!(Pico.m.z80Run&1) && !Pico.m.z80_reset) Pico.zram[a&0x1fff]=(u8)d;
+ else elprintf(EL_ANOMALY, "68k z80 write with no bus or reset! [%06x] %02x @ %06x", a, d&0xff, SekPc);
+ return;
+ }
+ if ((a&0xff6000)==0xa04000) { if(PicoOpt&1) emustatus|=ym2612_write_local(a&3, d&0xff, 0)&1; return; } // FM Sound
if ((a&0xffffe0)==0xa10000) { IoWrite8(a, d); return; } // I/O ports
#endif
if (a==0xa11100) { z80WriteBusReq(d); return; }
if (a==0xa11200) {
- dprintf("write z80Reset: %02x", d);
- if(!(d&1)) z80_reset();
+ elprintf(EL_BUSREQ, "write z80Reset: %02x", d);
+ if (!(d&0x1)) { Pico.m.z80_reset = 1; Pico.m.z80Run = 0; YM2612ResetChip(); }
+ else if (Pico.m.z80_reset) {
+ Pico.m.z80_reset = 0;
+ YM2612ResetChip();
+ z80_reset();
+ timers_reset();
+ }
return;
}
-#ifndef _ASM_MEMORY_C
+#if !defined(_ASM_MEMORY_C) || defined(_ASM_MEMORY_C_AMIPS)
if ((a&0xff7f00)==0xa06000) // Z80 BANK register
{
Pico.m.z80_bank68k>>=1;
Pico.m.z80_bank68k|=(d&1)<<8;
Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one
+ elprintf(EL_Z80BNK, "z80 bank=%06x", Pico.m.z80_bank68k<<15);
return;
}
#endif
return;
}
- OtherWrite8End(a, d, 8);
+ PicoWrite8Hook(a, d&0xff, 8);
}
#endif
void OtherWrite16(u32 a,u32 d)
{
- if ((a&0xe700e0)==0xc00000) { PicoVideoWrite(a,(u16)d); return; }
if (a==0xa11100) { z80WriteBusReq(d>>8); return; }
- if (a==0xa11200) { dprintf("write z80reset: %04x", d); if(!(d&0x100)) z80_reset(); return; }
if ((a&0xffffe0)==0xa10000) { IoWrite8(a, d); return; } // I/O ports
- if ((a&0xff4000)==0xa00000) { if(!(Pico.m.z80Run&1)) Pico.zram[a&0x1fff]=(u8)(d>>8); return; } // Z80 ram (MSB only)
if ((a&0xe700f8)==0xc00010||(a&0xff7ff8)==0xa07f10) { if(PicoOpt&2) SN76496Write(d); return; } // PSG Sound
- if ((a&0xff6000)==0xa04000) { if(PicoOpt&1) emustatus|=YM2612Write(a&3, d); return; } // FM Sound (??)
+ if ((a&0xff6000)==0xa04000) { if(PicoOpt&1) emustatus|=ym2612_write_local(a&3, d&0xff, 0)&1; return; } // FM Sound
+ if ((a&0xff4000)==0xa00000) { // Z80 ram (MSB only)
+ if (!(Pico.m.z80Run&1) && !Pico.m.z80_reset) Pico.zram[a&0x1fff]=(u8)(d>>8);
+ else elprintf(EL_ANOMALY, "68k z80 write with no bus or reset! [%06x] %04x @ %06x", a, d&0xffff, SekPc);
+ return;
+ }
+ if (a==0xa11200) {
+ elprintf(EL_BUSREQ, "write z80reset: %04x", d);
+ if (!(d&0x100)) { Pico.m.z80_reset = 1; Pico.m.z80Run = 0; YM2612ResetChip(); }
+ else if (Pico.m.z80_reset) {
+ Pico.m.z80_reset = 0;
+ YM2612ResetChip();
+ z80_reset();
+ timers_reset();
+ }
+ return;
+ }
if ((a&0xff7f00)==0xa06000) // Z80 BANK register
{
Pico.m.z80_bank68k>>=1;
Pico.m.z80_bank68k|=(d&1)<<8;
Pico.m.z80_bank68k&=0x1ff; // 9 bits and filled in the new top one
+ elprintf(EL_Z80BNK, "z80 bank=%06x", Pico.m.z80_bank68k<<15);
return;
}
#ifndef _CD_MEMORY_C
if (a >= SRam.start && a <= SRam.end) {
- if ((a&0x16)==0x10) { // detected, not EEPROM, write not disabled
+ elprintf(EL_SRAMIO, "sram w16 [%06x] %04x @ %06x", a, d, SekPc);
+ if ((Pico.m.sram_reg&0x16)==0x10) { // detected, not EEPROM, write not disabled
u8 *pm=(u8 *)(SRam.data-SRam.start+a);
*pm++=d>>8;
*pm++=d;
SRam.changed = 1;
}
else
- SRAMWrite(a, d); // ??
+ SRAMWrite(a, d);
return;
}
-#else
- OtherWrite8End(a, d>>8, 16);
- OtherWrite8End(a+1,d&0xff, 16);
#endif
-}
+ PicoWrite16Hook(a, d&0xffff, 16);
+}