#define CYCLES_M68K_LINE 488 // suitable for both PAL/NTSC
#define CYCLES_M68K_VINT_LAG 68
#define CYCLES_M68K_ASD 148
-#define CYCLES_Z80_LINE 228
-#define CYCLES_Z80_ASD 69
#define CYCLES_S68K_LINE 795
#define CYCLES_S68K_ASD 241
// CPUS_RUN
#ifndef PICO_CD
-#define CPUS_RUN(m68k_cycles,z80_cycles,s68k_cycles) \
+#define CPUS_RUN(m68k_cycles,s68k_cycles) \
SekRunM68k(m68k_cycles);
#else
-#define CPUS_RUN(m68k_cycles,z80_cycles,s68k_cycles) \
+#define CPUS_RUN(m68k_cycles,s68k_cycles) \
{ \
if ((PicoOpt&POPT_EN_MCD_PSYNC) && (Pico_mcd->m.busreq&3) == 1) { \
SekRunPS(m68k_cycles, s68k_cycles); /* "better/perfect sync" */ \
static int PicoFrameHints(void)
{
struct PicoVideo *pv=&Pico.video;
- int lines, y, lines_vis = 224, line_sample, skip;
+ int lines, y, lines_vis = 224, line_sample, skip, vcnt_wrap;
int hint; // Hint counter
+ pv->v_counter = Pico.m.scanline = 0;
+
if ((PicoOpt&POPT_ALT_RENDERER) && !PicoSkipFrame && (pv->reg[1]&0x40)) { // fast rend., display enabled
// draw a frame just after vblank in alternative render mode
// yes, this will cause 1 frame lag, but this is inaccurate mode anyway.
if (Pico.m.pal) {
line_sample = 68;
- if(pv->reg[1]&8) lines_vis = 240;
+ if (pv->reg[1]&8) lines_vis = 240;
} else {
line_sample = 93;
}
#ifdef PICO_CD
SekCyclesResetS68k();
#endif
- timers_cycle();
PsndDacLine = 0;
pv->status&=~0x88; // clear V-Int, come out of vblank
//dprintf("-hint: %i", hint);
// This is to make active scan longer (needed for Double Dragon 2, mainly)
- CPUS_RUN(CYCLES_M68K_ASD, 0, CYCLES_S68K_ASD);
+ CPUS_RUN(CYCLES_M68K_ASD, CYCLES_S68K_ASD);
- for (y=0;y<lines_vis;y++)
+ for (y = 0; y < lines_vis; y++)
{
- Pico.m.scanline=(short)y;
+ pv->v_counter = Pico.m.scanline = y;
+ if ((pv->reg[12]&6) == 6) { // interlace mode 2
+ pv->v_counter <<= 1;
+ pv->v_counter |= pv->v_counter >> 8;
+ pv->v_counter &= 0xff;
+ }
// VDP FIFO
pv->lwrite_cnt -= 12;
}
// decide if we draw this line
- if (!skip)
+ if (!skip && (PicoOpt & POPT_ALT_RENDERER))
{
- if (PicoOpt&POPT_ALT_RENDERER) {
- // find the right moment for fast renderer, when display is no longer blanked
- if ((pv->reg[1]&0x40) || y > 100) {
- PicoFrameFull();
+ // find the right moment for frame renderer, when display is no longer blanked
+ if ((pv->reg[1]&0x40) || y > 100) {
+ PicoFrameFull();
#ifdef DRAW_FINISH_FUNC
- DRAW_FINISH_FUNC();
+ DRAW_FINISH_FUNC();
#endif
- skip = 1;
- }
- }
- else
- {
-#if !CAN_HANDLE_240_LINES
- if (y < 224)
-#endif
- PicoLine(y);
+ skip = 1;
}
}
// Run scanline:
if (Pico.m.dma_xfers) SekCyclesBurn(CheckDMA());
- CPUS_RUN(CYCLES_M68K_LINE, CYCLES_Z80_LINE, CYCLES_S68K_LINE);
+ CPUS_RUN(CYCLES_M68K_LINE, CYCLES_S68K_LINE);
#ifdef PICO_CD
update_chips();
#endif
}
-#ifdef DRAW_FINISH_FUNC
if (!skip)
+ {
+ if (DrawScanline < y)
+ PicoDrawSync(y - 1, 0);
+#ifdef DRAW_FINISH_FUNC
DRAW_FINISH_FUNC();
#endif
+ }
// V-int line (224 or 240)
- Pico.m.scanline=(short)y;
+ Pico.m.scanline = y;
+ pv->v_counter = 0xe0; // bad for 240 mode
+ if ((pv->reg[12]&6) == 6) pv->v_counter = 0xc1;
// VDP FIFO
pv->lwrite_cnt=0;
if (pv->reg[0]&0x10) SekInterrupt(4);
}
- // V-Interrupt:
pv->status|=0x08; // go into vblank
pv->pending_ints|=0x20;
// Run scanline:
if (Pico.m.dma_xfers) SekCyclesBurn(CheckDMA());
CPUS_RUN(CYCLES_M68K_LINE - CYCLES_M68K_VINT_LAG - CYCLES_M68K_ASD,
- CYCLES_Z80_LINE - CYCLES_Z80_ASD, CYCLES_S68K_LINE - CYCLES_S68K_ASD);
+ CYCLES_S68K_LINE - CYCLES_S68K_ASD);
#ifdef PICO_CD
update_chips();
// PAL line count might actually be 313 according to Steve Snake, but that would complicate things.
lines = Pico.m.pal ? 312 : 262;
+ vcnt_wrap = Pico.m.pal ? 0x103 : 0xEB; // based on Gens
- for (y++;y<lines;y++)
+ for (y++; y < lines; y++)
{
- Pico.m.scanline=(short)y;
+ pv->v_counter = Pico.m.scanline = y;
+ if (y >= vcnt_wrap)
+ pv->v_counter -= Pico.m.pal ? 56 : 6;
+ if ((pv->reg[12]&6) == 6)
+ pv->v_counter = (pv->v_counter << 1) | 1;
+ pv->v_counter &= 0xff;
PAD_DELAY
#ifdef PICO_CD
// Run scanline:
if (Pico.m.dma_xfers) SekCyclesBurn(CheckDMA());
- CPUS_RUN(CYCLES_M68K_LINE, CYCLES_Z80_LINE, CYCLES_S68K_LINE);
+ CPUS_RUN(CYCLES_M68K_LINE, CYCLES_S68K_LINE);
#ifdef PICO_CD
update_chips();
// sync z80
if (Pico.m.z80Run && (PicoOpt&POPT_EN_Z80))
- PicoSyncZ80(SekCycleCnt);
+ PicoSyncZ80(Pico.m.pal ? 151809 : 127671); // cycles adjusted for converter
if (PsndOut && ym2612.dacen && PsndDacLine <= lines-1)
PsndDoDAC(lines-1);
+ timers_cycle();
+
return 0;
}
#undef PAD_DELAY
-#undef Z80_RUN
#undef CPUS_RUN