\r
static FILE *AsmFile=NULL;\r
\r
-static int CycloneVer=0x0088; // Version number of library\r
+static int CycloneVer=0x0099; // Version number of library\r
int *CyJump=NULL; // Jump table\r
int ms=USE_MS_SYNTAX; // If non-zero, output in Microsoft ARMASM format\r
-char *Narm[4]={ "b", "h","",""}; // Normal ARM Extensions for operand sizes 0,1,2\r
-char *Sarm[4]={"sb","sh","",""}; // Sign-extend ARM Extensions for operand sizes 0,1,2\r
+const char * const Narm[4]={ "b", "h","",""}; // Normal ARM Extensions for operand sizes 0,1,2\r
+const char * const Sarm[4]={"sb","sh","",""}; // Sign-extend ARM Extensions for operand sizes 0,1,2\r
int Cycles; // Current cycles for opcode\r
int pc_dirty; // something changed PC during processing\r
int arm_op_count;\r
\r
+// opcodes often used by games\r
+static const unsigned short hot_opcodes[] = {\r
+ 0x6701, // beq $3\r
+ 0x6601, // bne $3\r
+ 0x51c8, // dbra Dn, $2\r
+ 0x4a38, // tst.b $0.w\r
+ 0xd040, // add.w Dn, Dn\r
+ 0x4a79, // tst.w $0.l\r
+ 0x0240, // andi.w #$0, D0\r
+ 0x2038, // move.l $0.w, D0\r
+ 0xb0b8, // cmp.l $0.w, D0\r
+ 0x6001, // bra $3\r
+ 0x30c0, // move.w D0, (A0)+\r
+ 0x3028, // move.w ($0,A0), D0\r
+ 0x0c40, // cmpi.w #$0, D0\r
+ 0x0c79, // cmpi.w #$0, $0.l\r
+ 0x4e75, // rts\r
+ 0x4e71, // nop\r
+ 0x3000, // move.w D0, D0\r
+ 0x0839, // btst #$0, $0.l\r
+ 0x7000, // moveq #$0, D0\r
+ 0x3040, // movea.w D0, A0\r
+ 0x0838, // btst #$0, $0.w\r
+ 0x4a39, // tst.b $0.l\r
+ 0x33d8, // move.w (A0)+, $0.l\r
+ 0x6700, // beq $2\r
+ 0xb038, // cmp.b $0.w, D0\r
+ 0x3039, // move.w $0.l, D0\r
+ 0x4840, // swap D0\r
+ 0x6101, // bsr $3\r
+ 0x6100, // bsr $2\r
+ 0x5e40, // addq.w #7, D0\r
+ 0x1039, // move.b $0.l, D0\r
+ 0x20c0, // move.l D0, (A0)+\r
+ 0x1018, // move.b (A0)+, D0\r
+ 0x30d0, // move.w (A0), (A0)+\r
+ 0x3080, // move.w D0, (A0)\r
+ 0x3018, // move.w (A0)+, D0\r
+ 0xc040, // and.w D0, D0\r
+ 0x3180, // move.w D0, (A0,D0.w)\r
+ 0x1198, // move.b (A0)+, (A0,D0.w)\r
+ 0x6501, // bcs $3\r
+ 0x6500, // bcs $2\r
+ 0x6401, // bcc $3\r
+ 0x6a01, // bpl $3\r
+ 0x41f0, // lea (A0,D0.w), A0\r
+ 0x4a28, // tst.b ($0,A0)\r
+ 0x0828, // btst #$0, ($0,A0)\r
+ 0x0640, // addi.w #$0, D0\r
+ 0x10c0, // move.b D0, (A0)+\r
+ 0x10d8, // move.b (A0)+, (A0)+\r
+};\r
+#define hot_opcode_count (int)(sizeof(hot_opcodes) / sizeof(hot_opcodes[0]))\r
+\r
+static int is_op_hot(int op)\r
+{\r
+ int i;\r
+ for (i = 0; i < hot_opcode_count; i++)\r
+ if (op == hot_opcodes[i])\r
+ return 1;\r
+ return 0;\r
+}\r
\r
void ot(const char *format, ...)\r
{\r
- va_list valist=NULL;\r
+ va_list valist;\r
int i, len;\r
\r
// notaz: stop me from leaving newlines in the middle of format string\r
#endif\r
\r
#if EMULATE_ADDRESS_ERRORS_JUMP || EMULATE_ADDRESS_ERRORS_IO\r
-static void AddressErrorWrapper(char rw, char *dataprg, int iw)\r
+static void AddressErrorWrapper(char rw, const char *dataprg, int iw)\r
{\r
ot("ExceptionAddressError_%c_%s%s\n", rw, dataprg, ms?"":":");\r
ot(" ldr r1,[r7,#0x44]\n");\r
- ot(" mov r10,#0x%02x\n", iw);\r
+ ot(" mov r6,#0x%02x\n", iw);\r
ot(" mov r11,r0\n");\r
ot(" tst r1,#0x20\n");\r
- ot(" orrne r10,r10,#4\n");\r
+ ot(" orrne r6,r6,#4\n");\r
ot(" b ExceptionAddressError\n");\r
ot("\n");\r
}\r
if (ms) ot("CycloneRun\n");\r
else ot("CycloneRun:\n");\r
\r
- ot(" stmdb sp!,{r4-r11,lr}\n");\r
+ ot(" stmdb sp!,{r4-r8,r10,r11,lr}\n");\r
\r
ot(" mov r7,r0 ;@ r7 = Pointer to Cpu Context\n");\r
ot(" ;@ r0-3 = Temporary registers\n");\r
- ot(" ldrb r9,[r7,#0x46] ;@ r9 = Flags (NZCV)\n");\r
+ ot(" ldrb r10,[r7,#0x46] ;@ r10 = Flags (NZCV)\n");\r
ot(" ldr r6,=CycloneJumpTab ;@ r6 = Opcode Jump table\n");\r
ot(" ldr r5,[r7,#0x5c] ;@ r5 = Cycles\n");\r
ot(" ldr r4,[r7,#0x40] ;@ r4 = Current PC + Memory Base\n");\r
ot(" ;@ r8 = Current Opcode\n");\r
ot(" ldr r1,[r7,#0x44] ;@ Get SR high T_S__III and irq level\n");\r
- ot(" mov r9,r9,lsl #28 ;@ r9 = Flags 0xf0000000, cpsr format\n");\r
- ot(" ;@ r10 = Source value / Memory Base\n");\r
+ ot(" mov r10,r10,lsl #28;@ r10 = Flags 0xf0000000, cpsr format\n");\r
+ ot(" ;@ r11 = Source value / Memory Base\n");\r
+ ot(" str r6,[r7,#0x54] ;@ make a copy to avoid literal pools\n");\r
ot("\n");\r
#if (CYCLONE_FOR_GENESIS == 2) || EMULATE_TRACE\r
ot(" mov r2,#0\n");\r
ot(";@ stopped or halted\n");\r
ot(" mov r5,#0\n");\r
ot(" str r5,[r7,#0x5C] ;@ eat all cycles\n");\r
- ot(" ldmia sp!,{r4-r11,pc} ;@ we are stopped, do nothing!\n");\r
+ ot(" ldmia sp!,{r4-r8,r10,r11,pc} ;@ we are stopped, do nothing!\n");\r
ot("\n");\r
ot("\n");\r
\r
ot("CycloneEndNoBack%s\n", ms?"":":");\r
#if (CYCLONE_FOR_GENESIS == 2) || EMULATE_TRACE\r
ot(" ldr r1,[r7,#0x98]\n");\r
- ot(" mov r9,r9,lsr #28\n");\r
+ ot(" mov r10,r10,lsr #28\n");\r
ot(" tst r1,r1\n");\r
ot(" bxne r1 ;@ jump to alternative CycloneEnd\n");\r
#else\r
- ot(" mov r9,r9,lsr #28\n");\r
+ ot(" mov r10,r10,lsr #28\n");\r
#endif\r
ot(" str r4,[r7,#0x40] ;@ Save Current PC + Memory Base\n");\r
ot(" str r5,[r7,#0x5c] ;@ Save Cycles\n");\r
- ot(" strb r9,[r7,#0x46] ;@ Save Flags (NZCV)\n");\r
- ot(" ldmia sp!,{r4-r11,pc}\n");\r
+ ot(" strb r10,[r7,#0x46] ;@ Save Flags (NZCV)\n");\r
+ ot(" ldmia sp!,{r4-r8,r10,r11,pc}\n");\r
ltorg();\r
ot("\n");\r
ot("\n");\r
#endif\r
ot("\n");\r
\r
+ // --------------\r
+ ot("CycloneReset%s\n", ms?"":":");\r
+ ot(" stmfd sp!,{r7,lr}\n");\r
+ ot(" mov r7,r0\n");\r
+ ot(" mov r0,#0\n");\r
+ ot(" str r0,[r7,#0x58] ;@ state_flags\n");\r
+ ot(" str r0,[r7,#0x48] ;@ OSP\n");\r
+ ot(" mov r1,#0x27 ;@ Supervisor mode\n");\r
+ ot(" strb r1,[r7,#0x44] ;@ set SR high\n");\r
+ ot(" strb r0,[r7,#0x47] ;@ IRQ\n");\r
+ MemHandler(0,2);\r
+ ot(" str r0,[r7,#0x3c] ;@ Stack pointer\n");\r
+ ot(" mov r0,#0\n");\r
+ ot(" str r0,[r7,#0x60] ;@ Membase\n");\r
+ ot(" mov r0,#4\n");\r
+ MemHandler(0,2);\r
+#ifdef MEMHANDLERS_DIRECT_PREFIX\r
+ ot(" bl %scheckpc ;@ Call checkpc()\n", MEMHANDLERS_DIRECT_PREFIX);\r
+#else\r
+ ot(" mov lr,pc\n");\r
+ ot(" ldr pc,[r7,#0x64] ;@ Call checkpc()\n");\r
+#endif\r
+ ot(" str r0,[r7,#0x40] ;@ PC + base\n");\r
+ ot(" ldmfd sp!,{r7,pc}\n");\r
+ ot("\n");\r
+\r
// --------------\r
// 68k: XNZVC, ARM: NZCV\r
ot("CycloneSetSr%s\n", ms?"":":");\r
\r
// --------------\r
ot("CycloneUnpack%s\n", ms?"":":");\r
- ot(" stmfd sp!,{r4,r5,lr}\n");\r
- ot(" mov r4,r0\n");\r
- ot(" mov r5,r1\n");\r
+ ot(" stmfd sp!,{r5,r7,lr}\n");\r
+ ot(" mov r7,r0\n");\r
+ ot(" movs r5,r1\n");\r
+ ot(" beq c_unpack_do_pc\n");\r
ot(" mov r3,#16\n");\r
ot(";@ 0x00-0x3f: DA registers\n");\r
ot("c_unpack_loop%s\n",ms?"":":");\r
ot(" bne c_unpack_loop\n");\r
ot(";@ 0x40: PC\n");\r
ot(" ldr r0,[r5],#4 ;@ PC\n");\r
-#if USE_CHECKPC_CALLBACK\r
- ot(" mov r1,#0\n");\r
- ot(" str r1,[r4,#0x60] ;@ Memory base\n");\r
- ot(" mov lr,pc\n");\r
- ot(" ldr pc,[r4,#0x64] ;@ Call checkpc()\n");\r
-#else\r
- ot(" ldr r1,[r4,#0x60] ;@ Memory base\n");\r
- ot(" add r0,r0,r1 ;@ r0 = Memory Base + New PC\n");\r
-#endif\r
- ot(" str r0,[r4,#0x40] ;@ PC + Memory Base\n");\r
+ ot(" str r0,[r7,#0x40] ;@ handle later\n");\r
ot(";@ 0x44: SR\n");\r
ot(" ldrh r1,[r5],#2\n");\r
- ot(" mov r0,r4\n");\r
+ ot(" mov r0,r7\n");\r
ot(" bl CycloneSetSr\n");\r
ot(";@ 0x46: IRQ level\n");\r
ot(" ldrb r0,[r5],#2\n");\r
- ot(" strb r0,[r4,#0x47]\n");\r
+ ot(" strb r0,[r7,#0x47]\n");\r
ot(";@ 0x48: other SP\n");\r
ot(" ldr r0,[r5],#4\n");\r
- ot(" str r0,[r4,#0x48]\n");\r
+ ot(" str r0,[r7,#0x48]\n");\r
ot(";@ 0x4c: CPU state flags\n");\r
ot(" ldr r0,[r5],#4\n");\r
- ot(" str r0,[r4,#0x58]\n");\r
- ot(" ldmfd sp!,{r4,r5,pc}\n");\r
+ ot(" str r0,[r7,#0x58]\n");\r
+ ot("c_unpack_do_pc%s\n",ms?"":":");\r
+ ot(" ldr r0,[r7,#0x40] ;@ unbased PC\n");\r
+#if USE_CHECKPC_CALLBACK\r
+ ot(" mov r1,#0\n");\r
+ ot(" str r1,[r7,#0x60] ;@ Memory base\n");\r
+ #ifdef MEMHANDLERS_DIRECT_PREFIX\r
+ ot(" bl %scheckpc ;@ Call checkpc()\n", MEMHANDLERS_DIRECT_PREFIX);\r
+ #else\r
+ ot(" mov lr,pc\n");\r
+ ot(" ldr pc,[r7,#0x64] ;@ Call checkpc()\n");\r
+ #endif\r
+#else\r
+ ot(" ldr r1,[r7,#0x60] ;@ Memory base\n");\r
+ ot(" add r0,r0,r1 ;@ r0 = Memory Base + New PC\n");\r
+#endif\r
+ ot(" str r0,[r7,#0x40] ;@ PC + Memory Base\n");\r
+ ot(" ldmfd sp!,{r5,r7,pc}\n");\r
ot("\n");\r
\r
// --------------\r
ot(" movle r0,#0\n");\r
ot(" bxle lr ;@ no ints\n");\r
ot("\n");\r
- ot(" stmdb sp!,{r4,r5,r7-r11,lr}\n");\r
+ ot(" stmdb sp!,{r4,r5,r7,r8,r10,r11,lr}\n");\r
ot(" mov r7,r0\n");\r
ot(" mov r0,r2\n");\r
- ot(" ldrb r9,[r7,#0x46] ;@ r9 = Flags (NZCV)\n");\r
+ ot(" ldrb r10,[r7,#0x46] ;@ r10 = Flags (NZCV)\n");\r
ot(" mov r5,#0\n");\r
- ot(" ldr r4,[r7,#0x40] ;@ r4 = Current PC + Memory Base\n");\r
- ot(" mov r9,r9,lsl #28 ;@ r9 = Flags 0xf0000000, cpsr format\n");\r
+ ot(" ldr r4,[r7,#0x40] ;@ r4 = Current PC + Memory Base\n");\r
+ ot(" mov r10,r10,lsl #28 ;@ r10 = Flags 0xf0000000, cpsr format\n");\r
ot(" adr r2,CycloneFlushIrqEnd\n");\r
ot(" str r2,[r7,#0x98] ;@ set custom CycloneEnd\n");\r
ot(" b CycloneDoInterrupt\n");\r
ot("\n");\r
ot("CycloneFlushIrqEnd%s\n", ms?"":":");\r
ot(" rsb r0,r5,#0\n");\r
- ot(" str r4,[r7,#0x40] ;@ Save Current PC + Memory Base\n");\r
- ot(" strb r9,[r7,#0x46] ;@ Save Flags (NZCV)\n");\r
- ot(" ldmia sp!,{r4,r5,r7-r11,lr}\n");\r
+ ot(" str r4,[r7,#0x40] ;@ Save Current PC + Memory Base\n");\r
+ ot(" strb r10,[r7,#0x46] ;@ Save Flags (NZCV)\n");\r
+ ot(" ldmia sp!,{r4,r5,r7,r8,r10,r11,lr}\n");\r
ot(" bx lr\n");\r
ot("\n");\r
ot("\n");\r
ot(" orr r2,r2,#4 ;@ set activity bit: 'not processing instruction'\n");\r
#endif\r
ot(" str r2,[r7,#0x58]\n");\r
- ot(" ldrb r10,[r7,#0x44] ;@ Get old SR high\n");\r
+ ot(" ldrb r6,[r7,#0x44] ;@ Get old SR high, abuse r6\n");\r
ot(" strb r3,[r7,#0x44] ;@ Put new SR high\n");\r
ot("\n");\r
\r
// 3. Save the current processor context.\r
ot(" ldr r1,[r7,#0x60] ;@ Get Memory base\n");\r
ot(" ldr r11,[r7,#0x3c] ;@ Get A7\n");\r
- ot(" tst r10,#0x20\n");\r
+ ot(" tst r6,#0x20\n");\r
ot(";@ get our SP:\n");\r
ot(" ldreq r2,[r7,#0x48] ;@ ...or OSP as our stack pointer\n");\r
ot(" streq r11,[r7,#0x48]\n");\r
MemHandler(1,2);\r
ot(";@ Push old SR:\n");\r
ot(" ldr r0,[r7,#0x4c] ;@ X bit\n");\r
- ot(" mov r1,r9,lsr #28 ;@ ____NZCV\n");\r
+ ot(" mov r1,r10,lsr #28 ;@ ____NZCV\n");\r
ot(" eor r2,r1,r1,ror #1 ;@ Bit 0=C^V\n");\r
ot(" tst r2,#1 ;@ 1 if C!=V\n");\r
ot(" eorne r1,r1,#3 ;@ ____NZVC\n");\r
ot(" and r0,r0,#0x20000000\n");\r
ot(" orr r1,r1,r0,lsr #25 ;@ ___XNZVC\n");\r
- ot(" orr r1,r1,r10,lsl #8 ;@ Include old SR high\n");\r
+ ot(" orr r1,r1,r6,lsl #8 ;@ Include old SR high\n");\r
ot(" sub r0,r11,#6 ;@ Predecrement A7\n");\r
ot(" str r0,[r7,#0x3c] ;@ Save A7\n");\r
MemHandler(1,1,0,0); // already checked for address error by prev MemHandler\r
ot(";@ call IrqCallback if it is defined\n");\r
#if INT_ACK_NEEDS_STUFF\r
ot(" str r4,[r7,#0x40] ;@ Save PC\n");\r
- ot(" mov r1,r9,lsr #28\n");\r
+ ot(" mov r1,r10,lsr #28\n");\r
ot(" strb r1,[r7,#0x46] ;@ Save Flags (NZCV)\n");\r
ot(" str r5,[r7,#0x5c] ;@ Save Cycles\n");\r
#endif\r
#endif\r
ot(" mov r0,r0,lsl #2 ;@ get vector address\n");\r
ot("\n");\r
- ot(" ldr r10,[r7,#0x60] ;@ Get Memory base\n");\r
+ ot(" ldr r11,[r7,#0x60] ;@ Get Memory base\n");\r
ot(";@ Read IRQ Vector:\n");\r
MemHandler(0,2,0,0);\r
ot(" tst r0,r0 ;@ uninitialized int vector?\n");\r
ot(" moveq r0,#0x3c\n");\r
+ #ifdef MEMHANDLERS_DIRECT_PREFIX\r
+ ot(" bleq %sread32 ;@ Call read32(r0) handler\n", MEMHANDLERS_DIRECT_PREFIX);\r
+ #else\r
ot(" moveq lr,pc\n");\r
ot(" ldreq pc,[r7,#0x70] ;@ Call read32(r0) handler\n");\r
+ #endif\r
#if USE_CHECKPC_CALLBACK\r
ot(" add lr,pc,#4\n");\r
- ot(" add r0,r0,r10 ;@ r0 = Memory Base + New PC\n");\r
+ ot(" add r0,r0,r11 ;@ r0 = Memory Base + New PC\n");\r
+ #ifdef MEMHANDLERS_DIRECT_PREFIX\r
+ ot(" bl %scheckpc ;@ Call checkpc()\n", MEMHANDLERS_DIRECT_PREFIX);\r
+ #else\r
ot(" ldr pc,[r7,#0x64] ;@ Call checkpc()\n");\r
+ #endif\r
#if EMULATE_ADDRESS_ERRORS_JUMP\r
ot(" mov r4,r0\n");\r
#else\r
ot(" bic r4,r0,#1\n");\r
#endif\r
#else\r
- ot(" add r4,r0,r10 ;@ r4 = Memory Base + New PC\n");\r
+ ot(" add r4,r0,r11 ;@ r4 = Memory Base + New PC\n");\r
#if EMULATE_ADDRESS_ERRORS_JUMP\r
ot(" bic r4,r4,#1\n");\r
#endif\r
ot(" tst r4,#1\n");\r
ot(" bne ExceptionAddressError_r_prg_r4\n");\r
#endif\r
+ ot(" ldr r6,[r7,#0x54]\n");\r
ot(" ldrh r8,[r4],#2 ;@ Fetch next opcode\n");\r
ot(" subs r5,r5,#44 ;@ Subtract cycles\n");\r
ot(" ldrge pc,[r6,r8,asl #2] ;@ Jump to opcode handler\n");\r
ot(" orr r8,r8,r0,lsl #24 ;@ abuse r8\n");\r
\r
// 1. Make a temporary copy of the status register and set the status register for exception processing.\r
- ot(" ldr r10,[r7,#0x44] ;@ Get old SR high\n");\r
+ ot(" ldr r6,[r7,#0x44] ;@ Get old SR high, abuse r6\n");\r
ot(" ldr r2,[r7,#0x58] ;@ state flags\n");\r
- ot(" and r3,r10,#0x27 ;@ clear trace and unused flags\n");\r
+ ot(" and r3,r6,#0x27 ;@ clear trace and unused flags\n");\r
ot(" orr r3,r3,#0x20 ;@ set supervisor mode\n");\r
ot(" bic r2,r2,#3 ;@ clear stopped and trace states\n");\r
ot(" str r2,[r7,#0x58]\n");\r
\r
// 3. Save the current processor context.\r
ot(" ldr r0,[r7,#0x3c] ;@ Get A7\n");\r
- ot(" tst r10,#0x20\n");\r
+ ot(" tst r6,#0x20\n");\r
ot(";@ get our SP:\n");\r
ot(" ldreq r2,[r7,#0x48] ;@ ...or OSP as our stack pointer\n");\r
ot(" streq r0,[r7,#0x48]\n");\r
MemHandler(1,2);\r
ot(";@ Push old SR:\n");\r
ot(" ldr r0,[r7,#0x4c] ;@ X bit\n");\r
- ot(" mov r1,r9,lsr #28 ;@ ____NZCV\n");\r
+ ot(" mov r1,r10,lsr #28 ;@ ____NZCV\n");\r
ot(" eor r2,r1,r1,ror #1 ;@ Bit 0=C^V\n");\r
ot(" tst r2,#1 ;@ 1 if C!=V\n");\r
ot(" eorne r1,r1,#3 ;@ ____NZVC\n");\r
ot(" and r0,r0,#0x20000000\n");\r
ot(" orr r1,r1,r0,lsr #25 ;@ ___XNZVC\n");\r
ot(" ldr r0,[r7,#0x3c] ;@ A7\n");\r
- ot(" orr r1,r1,r10,lsl #8 ;@ Include SR high\n");\r
+ ot(" orr r1,r1,r6,lsl #8 ;@ Include SR high\n");\r
ot(" sub r0,r0,#2 ;@ Predecrement A7\n");\r
ot(" str r0,[r7,#0x3c] ;@ Save A7\n");\r
MemHandler(1,1,0,0);\r
#if USE_CHECKPC_CALLBACK\r
ot(" add lr,pc,#4\n");\r
ot(" add r0,r0,r3 ;@ r0 = Memory Base + New PC\n");\r
+ #ifdef MEMHANDLERS_DIRECT_PREFIX\r
+ ot(" bl %scheckpc ;@ Call checkpc()\n", MEMHANDLERS_DIRECT_PREFIX);\r
+ #else\r
ot(" ldr pc,[r7,#0x64] ;@ Call checkpc()\n");\r
+ #endif\r
#if EMULATE_ADDRESS_ERRORS_JUMP\r
ot(" mov r4,r0\n");\r
#else\r
ot(" tst r4,#1\n");\r
ot(" bne ExceptionAddressError_r_prg_r4\n");\r
#endif\r
+ ot(" ldr r6,[r7,#0x54]\n");\r
ot(" bx r11 ;@ Return\n");\r
ot("\n");\r
\r
ot("ExceptionAddressError_r_prg_r4%s\n", ms?"":":");\r
ot(" ldr r1,[r7,#0x44]\n");\r
ot(" ldr r3,[r7,#0x60] ;@ Get Memory base\n");\r
- ot(" mov r10,#0x12\n");\r
+ ot(" mov r6,#0x12\n");\r
ot(" sub r11,r4,r3\n");\r
ot(" tst r1,#0x20\n");\r
- ot(" orrne r10,r10,#4\n");\r
+ ot(" orrne r6,r6,#4\n");\r
ot("\n");\r
\r
ot("ExceptionAddressError%s\n", ms?"":":");\r
- ot(";@ r10 - info word (without instruction/not bit), r11 - faulting address\n");\r
+ ot(";@ r6 - info word (without instruction/not bit), r11 - faulting address\n");\r
\r
// 1. Make a temporary copy of the status register and set the status register for exception processing.\r
ot(" ldrb r0,[r7,#0x44] ;@ Get old SR high\n");\r
ot(" strb r3,[r7,#0x44] ;@ Put new SR high\n");\r
ot(" bic r2,r2,#3 ;@ clear stopped and trace states\n");\r
ot(" tst r2,#4\n");\r
- ot(" orrne r10,r10,#8 ;@ complete info word\n");\r
+ ot(" orrne r6,r6,#8 ;@ complete info word\n");\r
ot(" orr r2,r2,#4 ;@ set activity bit: 'not processing instruction'\n");\r
#if EMULATE_HALT\r
ot(" tst r2,#8\n");\r
#else\r
ot(" str r2,[r7,#0x58]\n");\r
#endif\r
- ot(" and r9,r9,#0xf0000000\n");\r
- ot(" orr r9,r9,r0,lsl #4 ;@ some preparations for SR push\n");\r
+ ot(" and r10,r10,#0xf0000000\n");\r
+ ot(" orr r10,r10,r0,lsl #4 ;@ some preparations for SR push\n");\r
ot("\n");\r
\r
// 3. Save the current processor context + additional information.\r
ot(" ldr r0,[r7,#0x3c] ;@ Get A7\n");\r
- ot(" tst r9,#0x200\n");\r
+ ot(" tst r10,#0x200\n");\r
ot(";@ get our SP:\n");\r
ot(" ldreq r2,[r7,#0x48] ;@ ...or OSP as our stack pointer\n");\r
ot(" streq r0,[r7,#0x48]\n");\r
// SR\r
ot(";@ Push old SR:\n");\r
ot(" ldr r0,[r7,#0x4c] ;@ X bit\n");\r
- ot(" mov r1,r9,ror #28 ;@ ____NZCV\n");\r
+ ot(" mov r1,r10,ror #28 ;@ ____NZCV\n");\r
ot(" eor r2,r1,r1,ror #1 ;@ Bit 0=C^V\n");\r
ot(" tst r2,#1 ;@ 1 if C!=V\n");\r
ot(" eorne r1,r1,#3 ;@ ____NZVC\n");\r
ot(" and r0,r0,#0x20000000\n");\r
ot(" orr r1,r1,r0,lsr #25 ;@ ___XNZVC\n");\r
ot(" ldr r0,[r7,#0x3c] ;@ A7\n");\r
- ot(" and r9,r9,#0xf0000000\n");\r
+ ot(" and r10,r10,#0xf0000000\n");\r
ot(" sub r0,r0,#2 ;@ Predecrement A7\n");\r
ot(" str r0,[r7,#0x3c] ;@ Save A7\n");\r
MemHandler(1,1,0,0);\r
// information word\r
ot(";@ Push info word:\n");\r
ot(" ldr r0,[r7,#0x3c] ;@ A7\n");\r
- ot(" mov r1,r10\n");\r
+ ot(" mov r1,r6\n");\r
ot(" sub r0,r0,#2 ;@ Predecrement A7\n");\r
ot(" str r0,[r7,#0x3c] ;@ Save A7\n");\r
MemHandler(1,1,0,0);\r
#if USE_CHECKPC_CALLBACK\r
ot(" add lr,pc,#4\n");\r
ot(" add r0,r0,r3 ;@ r0 = Memory Base + New PC\n");\r
+ #ifdef MEMHANDLERS_DIRECT_PREFIX\r
+ ot(" bl %scheckpc ;@ Call checkpc()\n", MEMHANDLERS_DIRECT_PREFIX);\r
+ #else\r
ot(" ldr pc,[r7,#0x64] ;@ Call checkpc()\n");\r
+ #endif\r
ot(" mov r4,r0\n");\r
#else\r
ot(" add r4,r0,r3 ;@ r4 = Memory Base + New PC\n");\r
#endif\r
\r
// 4. Resume execution.\r
+ ot(" ldr r6,[r7,#0x54]\n");\r
ot(" ldrh r8,[r4],#2 ;@ Fetch next opcode\n");\r
ot(" subs r5,r5,#50 ;@ Subtract cycles\n");\r
ot(" ldrge pc,[r6,r8,asl #2] ;@ Jump to opcode handler\n");\r
ot(" ldr r2,[r7,#0x58]\n");\r
ot(" ldr r0,[r7,#0x9c] ;@ restore cycles\n");\r
ot(" ldr r1,[r7,#0xa0] ;@ old CycloneEnd handler\n");\r
- ot(" mov r9,r9,lsl #28\n");\r
+ ot(" mov r10,r10,lsl #28\n");\r
ot(" add r5,r0,r5\n");\r
ot(" str r1,[r7,#0x98]\n");\r
ot(";@ still tracing?\n"); // exception might have happend\r
// Trashes r0-r3,r12,lr\r
int MemHandler(int type,int size,int addrreg,int need_addrerr_check)\r
{\r
- int func=0;\r
- func=0x68+type*0xc+(size<<2); // Find correct offset\r
+ int func=0x68+type*0xc+(size<<2); // Find correct offset\r
+ char what[32];\r
\r
#if MEMHANDLERS_NEED_FLAGS\r
- ot(" mov r3,r9,lsr #28\n");\r
+ ot(" mov r3,r10,lsr #28\n");\r
ot(" strb r3,[r7,#0x46] ;@ Save Flags (NZCV)\n");\r
#endif\r
FlushPC();\r
}\r
else\r
#endif\r
+\r
+ sprintf(what, "%s%d", type==0 ? "read" : (type==1 ? "write" : "fetch"), 8<<size);\r
+#ifdef MEMHANDLERS_DIRECT_PREFIX\r
+ if (addrreg != 0)\r
+ ot(" mov r0,r%i\n", addrreg);\r
+ ot(" bl %s%s ;@ Call ", MEMHANDLERS_DIRECT_PREFIX, what);\r
+ (void)func; // avoid warning\r
+#else\r
if (addrreg != 0)\r
{\r
ot(" add lr,pc,#4\n");\r
else\r
ot(" mov lr,pc\n");\r
ot(" ldr pc,[r7,#0x%x] ;@ Call ",func);\r
+#endif\r
\r
// Document what we are calling:\r
- if (type==0) ot("read");\r
- if (type==1) ot("write");\r
- if (type==2) ot("fetch");\r
-\r
- if (type==1) ot("%d(r0,r1)",8<<size);\r
- else ot("%d(r0)", 8<<size);\r
+ if (type==1) ot("%s(r0,r1)",what);\r
+ else ot("%s(r0)", what);\r
ot(" handler\n");\r
\r
#if MEMHANDLERS_CHANGE_FLAGS\r
- ot(" ldrb r9,[r7,#0x46] ;@ r9 = Load Flags (NZCV)\n");\r
- ot(" mov r9,r9,lsl #28\n");\r
+ ot(" ldrb r10,[r7,#0x46] ;@ r10 = Load Flags (NZCV)\n");\r
+ ot(" mov r10,r10,lsl #28\n");\r
#endif\r
#if MEMHANDLERS_CHANGE_PC\r
ot(" ldr r4,[r7,#0x40] ;@ Load PC\n");\r
#endif\r
#if USE_UNRECOGNIZED_CALLBACK\r
ot(" str r4,[r7,#0x40] ;@ Save PC\n");\r
- ot(" mov r1,r9,lsr #28\n");\r
+ ot(" mov r1,r10,lsr #28\n");\r
ot(" strb r1,[r7,#0x46] ;@ Save Flags (NZCV)\n");\r
ot(" str r5,[r7,#0x5c] ;@ Save Cycles\n");\r
ot(" ldr r11,[r7,#0x94] ;@ UnrecognizedCallback\n");\r
ot(" tst r11,r11\n");\r
ot(" movne lr,pc\n");\r
ot(" movne pc,r11 ;@ call UnrecognizedCallback if it is defined\n");\r
- ot(" ldrb r9,[r7,#0x46] ;@ r9 = Load Flags (NZCV)\n");\r
+ ot(" ldrb r10,[r7,#0x46] ;@ r10 = Load Flags (NZCV)\n");\r
ot(" ldr r5,[r7,#0x5c] ;@ Load Cycles\n");\r
ot(" ldr r4,[r7,#0x40] ;@ Load PC\n");\r
- ot(" mov r9,r9,lsl #28\n");\r
+ ot(" mov r10,r10,lsl #28\n");\r
ot(" tst r0,r0\n");\r
ot(" moveq r0,#4\n");\r
ot(" bleq Exception\n");\r
ot(" sub r4,r4,#2\n");\r
#if USE_AFLINE_CALLBACK\r
ot(" str r4,[r7,#0x40] ;@ Save PC\n");\r
- ot(" mov r1,r9,lsr #28\n");\r
+ ot(" mov r1,r10,lsr #28\n");\r
ot(" strb r1,[r7,#0x46] ;@ Save Flags (NZCV)\n");\r
ot(" str r5,[r7,#0x5c] ;@ Save Cycles\n");\r
ot(" ldr r11,[r7,#0x94] ;@ UnrecognizedCallback\n");\r
ot(" tst r11,r11\n");\r
ot(" movne lr,pc\n");\r
ot(" movne pc,r11 ;@ call UnrecognizedCallback if it is defined\n");\r
- ot(" ldrb r9,[r7,#0x46] ;@ r9 = Load Flags (NZCV)\n");\r
+ ot(" ldrb r10,[r7,#0x46] ;@ r10 = Load Flags (NZCV)\n");\r
ot(" ldr r5,[r7,#0x5c] ;@ Load Cycles\n");\r
ot(" ldr r4,[r7,#0x40] ;@ Load PC\n");\r
- ot(" mov r9,r9,lsl #28\n");\r
+ ot(" mov r10,r10,lsl #28\n");\r
ot(" tst r0,r0\n");\r
ot(" moveq r0,#0x0a\n");\r
ot(" bleq Exception\n");\r
ot(" sub r4,r4,#2\n");\r
#if USE_AFLINE_CALLBACK\r
ot(" str r4,[r7,#0x40] ;@ Save PC\n");\r
- ot(" mov r1,r9,lsr #28\n");\r
+ ot(" mov r1,r10,lsr #28\n");\r
ot(" strb r1,[r7,#0x46] ;@ Save Flags (NZCV)\n");\r
ot(" str r5,[r7,#0x5c] ;@ Save Cycles\n");\r
ot(" ldr r11,[r7,#0x94] ;@ UnrecognizedCallback\n");\r
ot(" tst r11,r11\n");\r
ot(" movne lr,pc\n");\r
ot(" movne pc,r11 ;@ call UnrecognizedCallback if it is defined\n");\r
- ot(" ldrb r9,[r7,#0x46] ;@ r9 = Load Flags (NZCV)\n");\r
+ ot(" ldrb r10,[r7,#0x46] ;@ r10 = Load Flags (NZCV)\n");\r
ot(" ldr r5,[r7,#0x5c] ;@ Load Cycles\n");\r
ot(" ldr r4,[r7,#0x40] ;@ Load PC\n");\r
- ot(" mov r9,r9,lsl #28\n");\r
+ ot(" mov r10,r10,lsl #28\n");\r
ot(" tst r0,r0\n");\r
ot(" moveq r0,#0x0b\n");\r
ot(" bleq Exception\n");\r
OpEnd();\r
\r
\r
+ for (op=0;op<hot_opcode_count;op++)\r
+ OpAny(hot_opcodes[op]);\r
+\r
for (op=0;op<0x10000;op++)\r
{\r
if ((op&0xfff)==0) { printf("%x",op>>12); fflush(stdout); } // Update progress\r
\r
- OpAny(op);\r
+ if (!is_op_hot(op))\r
+ OpAny(op);\r
}\r
\r
ot("\n");\r
static int CycloneMake()\r
{\r
int i;\r
- char *name="Cyclone.s";\r
+ const char *name="Cyclone.s";\r
const char *globl=ms?"export":".global";\r
\r
// Open the assembly file\r
\r
ot(ms?" area |.text|, code\n":" .text\n .align 4\n\n");\r
ot(" %s CycloneInit\n",globl);\r
+ ot(" %s CycloneReset\n",globl);\r
ot(" %s CycloneRun\n",globl);\r
ot(" %s CycloneSetSr\n",globl);\r
ot(" %s CycloneGetSr\n",globl);\r
ot(" %s CycloneDoInterrupt\n",globl);\r
ot(" %s CycloneDoTrace\n",globl);\r
ot(" %s CycloneJumpTab\n",globl);\r
+ ot(" %s Op____\n",globl);\r
+ ot(" %s Op6001\n",globl);\r
+ ot(" %s Op6601\n",globl);\r
+ ot(" %s Op6701\n",globl);\r
#endif\r
ot("\n");\r
ot(ms?"CycloneVer dcd 0x":"CycloneVer: .long 0x");\r