if(size>=2) Cycles+=2;\r
}\r
\r
- EaCalcReadNoSE(-1,10,sea,0,0x0e00);\r
+ EaCalcReadNoSE(-1,11,sea,0,0x0e00);\r
\r
- EaCalcReadNoSE((type>0)?11:-1,0,tea,size,0x003f);\r
+ EaCalcReadNoSE((type>0)?8:-1,0,tea,size,0x003f);\r
\r
if (tea>=0x10)\r
- ot(" and r10,r10,#7 ;@ mem - do mod 8\n"); // size always 0\r
- else ot(" and r10,r10,#31 ;@ reg - do mod 32\n"); // size always 2\r
+ ot(" and r11,r11,#7 ;@ mem - do mod 8\n"); // size always 0\r
+ else ot(" and r11,r11,#31 ;@ reg - do mod 32\n"); // size always 2\r
ot("\n");\r
\r
ot(" mov r1,#1\n");\r
- ot(" tst r0,r1,lsl r10 ;@ Do arithmetic\n");\r
- ot(" bicne r9,r9,#0x40000000\n");\r
- ot(" orreq r9,r9,#0x40000000 ;@ Get Z flag\n");\r
+ ot(" tst r0,r1,lsl r11 ;@ Do arithmetic\n");\r
+ ot(" bicne r10,r10,#0x40000000\n");\r
+ ot(" orreq r10,r10,#0x40000000 ;@ Get Z flag\n");\r
ot("\n");\r
\r
if (type>0)\r
{\r
- if (type==1) ot(" eor r1,r0,r1,lsl r10 ;@ Toggle bit\n");\r
- if (type==2) ot(" bic r1,r0,r1,lsl r10 ;@ Clear bit\n");\r
- if (type==3) ot(" orr r1,r0,r1,lsl r10 ;@ Set bit\n");\r
+ if (type==1) ot(" eor r1,r0,r1,lsl r11 ;@ Toggle bit\n");\r
+ if (type==2) ot(" bic r1,r0,r1,lsl r11 ;@ Clear bit\n");\r
+ if (type==3) ot(" orr r1,r0,r1,lsl r11 ;@ Set bit\n");\r
ot("\n");\r
- EaWrite(11, 1,tea,size,0x003f,0,0);\r
+ EaWrite(8,1,tea,size,0x003f,0,0);\r
}\r
OpEnd(tea);\r
\r
\r
ot("\n");\r
EaCalcReadNoSE(-1,0,sea,0,0);\r
- ot(" mov r10,#1\n");\r
- ot(" bic r9,r9,#0x40000000 ;@ Blank Z flag\n");\r
+ ot(" mov r11,#1\n");\r
+ ot(" bic r10,r10,#0x40000000 ;@ Blank Z flag\n");\r
if (tea>=0x10)\r
ot(" and r0,r0,#7 ;@ mem - do mod 8\n"); // size always 0\r
else ot(" and r0,r0,#0x1F ;@ reg - do mod 32\n"); // size always 2\r
- ot(" mov r10,r10,lsl r0 ;@ Make bit mask\n");\r
+ ot(" mov r11,r11,lsl r0 ;@ Make bit mask\n");\r
ot("\n");\r
\r
if(type==1||type==3) {\r
if(size>=2) Cycles+=2;\r
}\r
\r
- EaCalcReadNoSE((type>0)?11:-1,0,tea,size,0x003f);\r
- ot(" tst r0,r10 ;@ Do arithmetic\n");\r
- ot(" orreq r9,r9,#0x40000000 ;@ Get Z flag\n");\r
+ EaCalcReadNoSE((type>0)?8:-1,0,tea,size,0x003f);\r
+ ot(" tst r0,r11 ;@ Do arithmetic\n");\r
+ ot(" orreq r10,r10,#0x40000000 ;@ Get Z flag\n");\r
ot("\n");\r
\r
if (type>0)\r
{\r
- if (type==1) ot(" eor r1,r0,r10 ;@ Toggle bit\n");\r
- if (type==2) ot(" bic r1,r0,r10 ;@ Clear bit\n");\r
- if (type==3) ot(" orr r1,r0,r10 ;@ Set bit\n");\r
+ if (type==1) ot(" eor r1,r0,r11 ;@ Toggle bit\n");\r
+ if (type==2) ot(" bic r1,r0,r11 ;@ Clear bit\n");\r
+ if (type==3) ot(" orr r1,r0,r11 ;@ Set bit\n");\r
ot("\n");\r
- EaWrite(11, 1,tea,size,0x003f,0,0);\r
+ EaWrite(8, 1,tea,size,0x003f,0,0);\r
+#if CYCLONE_FOR_GENESIS && !MEMHANDLERS_CHANGE_CYCLES\r
+ // this is a bit hacky (device handlers might modify cycles)\r
+ if (tea==0x38||tea==0x39)\r
+ ot(" ldr r5,[r7,#0x5c] ;@ Load Cycles\n");\r
+#endif\r
}\r
\r
OpEnd(sea,tea);\r
use=OpBase(op,size);\r
if (op!=use) { OpUse(op,use); return 0; } // Use existing handler\r
\r
- OpStart(op,ea); Cycles=size<2?4:6;\r
- if(ea >= 0x10) {\r
- Cycles*=2;\r
-#if CYCLONE_FOR_GENESIS\r
- // This is same as in Starscream core, CLR uses only 6 cycles for memory EAs.\r
- // May be this is similar case as with TAS opcode, but this time the dummy\r
- // read is ignored somehow? Without this hack Fatal Rewind hangs even in Gens.\r
- if(type==1&&size<2) Cycles-=2;\r
-#endif\r
- }\r
+ OpStart(op,ea); Cycles=size<2?4:6;\r
+ if(ea >= 0x10) Cycles*=2;\r
\r
- EaCalc (10,0x003f,ea,size,0,0);\r
+ EaCalc (11,0x003f,ea,size,0,0);\r
\r
- if (type!=1) EaRead (10,0,ea,size,0x003f,0,0); // Don't need to read for 'clr' (or do we, for a dummy read?)\r
+ if (type!=1) EaRead (11,0,ea,size,0x003f,0,0); // Don't need to read for 'clr' (or do we, for a dummy read?)\r
if (type==1) ot("\n");\r
\r
if (type==0)\r
GetXBit(1);\r
if(size!=2) ot(" mov r0,r0,asl #%i\n",size?16:24);\r
ot(" rscs r1,r0,#0 ;@ do arithmetic\n");\r
- ot(" orr r3,r9,#0xb0000000 ;@ for old Z\n");\r
+ ot(" orr r3,r10,#0xb0000000 ;@ for old Z\n");\r
OpGetFlags(1,1,0);\r
if(size!=2) {\r
ot(" movs r1,r1,asr #%i\n",size?16:24);\r
- ot(" orreq r9,r9,#0x40000000 ;@ possily missed Z\n");\r
+ ot(" orreq r10,r10,#0x40000000 ;@ possily missed Z\n");\r
}\r
- ot(" andeq r9,r9,r3 ;@ fix Z\n");\r
+ ot(" andeq r10,r10,r3 ;@ fix Z\n");\r
ot("\n");\r
}\r
\r
{\r
ot(";@ Clear:\n");\r
ot(" mov r1,#0\n");\r
- ot(" mov r9,#0x40000000 ;@ NZCV=0100\n");\r
+ ot(" mov r10,#0x40000000 ;@ NZCV=0100\n");\r
ot("\n");\r
}\r
\r
}\r
\r
if (type==1) eawrite_check_addrerr=1;\r
- EaWrite(10, 1,ea,size,0x003f,0,0);\r
+ EaWrite(11, 1,ea,size,0x003f,0,0);\r
\r
OpEnd(ea);\r
\r
\r
OpStart(op); Cycles=4;\r
\r
- EaCalc (10,0x0007,ea,2,1);\r
- EaRead (10, 0,ea,2,0x0007,1);\r
+ EaCalc (11,0x0007,ea,2,1);\r
+ EaRead (11, 0,ea,2,0x0007,1);\r
\r
ot(" mov r1,r0,ror #16\n");\r
ot(" adds r1,r1,#0 ;@ Defines NZ, clears CV\n");\r
OpGetFlags(0,0);\r
\r
- EaWrite(10, 1,8,2,0x0007,1);\r
+ EaWrite(11, 1,8,2,0x0007,1);\r
\r
OpEnd();\r
\r
EaRead ( 0, 0,sea,size,0x003f,1);\r
\r
ot(" adds r0,r0,#0 ;@ Defines NZ, clears CV\n");\r
- ot(" mrs r9,cpsr ;@ r9=flags\n");\r
+ ot(" mrs r10,cpsr ;@ r10=flags\n");\r
ot("\n");\r
\r
OpEnd(sea);\r
\r
OpStart(op); Cycles=4;\r
\r
- EaCalc (10,0x0007,ea,size+1,0,0);\r
- EaRead (10, 0,ea,size+1,0x0007,0,0);\r
+ EaCalc (11,0x0007,ea,size+1,0,0);\r
+ EaRead (11, 0,ea,size+1,0x0007,0,0);\r
\r
ot(" mov r0,r0,asl #%d\n",shift);\r
ot(" adds r0,r0,#0 ;@ Defines NZ, clears CV\n");\r
- ot(" mrs r9,cpsr ;@ r9=flags\n");\r
+ ot(" mrs r10,cpsr ;@ r10=flags\n");\r
ot(" mov r1,r0,asr #%d\n",shift);\r
ot("\n");\r
\r
- EaWrite(10, 1,ea,size+1,0x0007,0,0);\r
+ EaWrite(11, 1,ea,size+1,0x0007,0,0);\r
\r
OpEnd();\r
return 0;\r
{\r
int cc=0,ea=0;\r
int size=0,use=0,changed_cycles=0;\r
- char *cond[16]=\r
+ static const char * const cond[16]=\r
{\r
"al","", "hi","ls","cc","cs","ne","eq",\r
"vc","vs","pl","mi","ge","lt","gt","le"\r
case 1: // F\r
break;\r
case 2: // hi\r
- ot(" tst r9,#0x60000000 ;@ hi: !C && !Z\n");\r
+ ot(" tst r10,#0x60000000 ;@ hi: !C && !Z\n");\r
ot(" mvneq r1,r1\n");\r
if (ea<8) ot(" subeq r5,r5,#2 ;@ Extra cycles\n");\r
break;\r
case 3: // ls\r
- ot(" tst r9,#0x60000000 ;@ ls: C || Z\n");\r
+ ot(" tst r10,#0x60000000 ;@ ls: C || Z\n");\r
ot(" mvnne r1,r1\n");\r
if (ea<8) ot(" subne r5,r5,#2 ;@ Extra cycles\n");\r
break;\r
default:\r
ot(";@ Is the condition true?\n");\r
- ot(" msr cpsr_flg,r9 ;@ ARM flags = 68000 flags\n");\r
+ ot(" msr cpsr_flg,r10 ;@ ARM flags = 68000 flags\n");\r
ot(" mvn%s r1,r1\n",cond[cc]);\r
if (ea<8) ot(" sub%s r5,r5,#2 ;@ Extra cycles\n",cond[cc]);\r
break;\r
OpGetFlags(0,0);\r
if (usereg) { // store X only if count is not 0\r
ot(" cmp %s,#0 ;@ shifting by 0?\n",pct);\r
- ot(" biceq r9,r9,#0x20000000 ;@ if so, clear carry\n");\r
- ot(" strne r9,[r7,#0x4c] ;@ else Save X bit\n");\r
+ ot(" biceq r10,r10,#0x20000000 ;@ if so, clear carry\n");\r
+ ot(" strne r10,[r7,#0x4c] ;@ else Save X bit\n");\r
} else {\r
// count will never be 0 if we use immediate\r
- ot(" str r9,[r7,#0x4c] ;@ Save X bit\n");\r
+ ot(" str r10,[r7,#0x4c] ;@ Save X bit\n");\r
}\r
ot("\n");\r
\r
ot(";@ restore after right shift:\n");\r
ot(" movs r0,r0,lsl #%d\n",32-(8<<size));\r
if (type)\r
- ot(" orrmi r9,r9,#0x80000000 ;@ Potentially missed N flag\n");\r
+ ot(" orrmi r10,r10,#0x80000000 ;@ Potentially missed N flag\n");\r
ot("\n");\r
}\r
\r
ot(" cmpne r3,r1,asr %s\n", pct);\r
ot(" eoreq r1,r0,r3\n"); // above check doesn't catch (-1)<<(32+), so we need this\r
ot(" tsteq r1,#0x80000000\n");\r
- ot(" orrne r9,r9,#0x10000000\n");\r
+ ot(" orrne r10,r10,#0x10000000\n");\r
ot("\n");\r
}\r
}\r
int wide=8<<size;\r
\r
// Roxr\r
- if(count == 1) {\r
+ if(count == 1)\r
+ {\r
if(dir==0) {\r
if(size!=2) {\r
ot(" orr r0,r0,r0,lsr #%i\n", size?16:24);\r
OpGetFlags(0,1);\r
ot(" tst r3,#0x20000000\n");\r
ot(" orrne r0,r0,#0x%x\n", 1<<(32-wide));\r
- ot(" bicne r9,r9,#0x40000000 ;@ clear Z in case it got there\n");\r
+ ot(" bicne r10,r10,#0x40000000 ;@ clear Z in case it got there\n");\r
}\r
- ot(" bic r9,r9,#0x10000000 ;@ make suve V is clear\n");\r
+ ot(" bic r10,r10,#0x10000000 ;@ make suve V is clear\n");\r
return 0;\r
}\r
\r
if (shift) ot(" movs r0,r0,lsl #%d ;@ Shift up and get correct NC flags\n",shift);\r
OpGetFlags(0,!usereg);\r
if (usereg) { // store X only if count is not 0\r
- ot(" str r9,[r7,#0x4c] ;@ if not 0, Save X bit\n");\r
+ ot(" str r10,[r7,#0x4c] ;@ if not 0, Save X bit\n");\r
ot(" b nozerox%.4x\n",op);\r
ot("norotx_%.4x%s\n",op,ms?"":":");\r
ot(" ldr r2,[r7,#0x4c]\n");\r
ot(" adds r0,r0,#0 ;@ Defines NZ, clears CV\n");\r
OpGetFlags(0,0);\r
ot(" and r2,r2,#0x20000000\n");\r
- ot(" orr r9,r9,r2 ;@ C = old_X\n");\r
+ ot(" orr r10,r10,r2 ;@ C = old_X\n");\r
ot("nozerox%.4x%s\n",op,ms?"":":");\r
}\r
\r
OpGetFlags(0,0);\r
if (dir)\r
{\r
- ot(" bic r9,r9,#0x30000000 ;@ clear CV\n");\r
+ ot(" bic r10,r10,#0x30000000 ;@ clear CV\n");\r
ot(";@ Get carry bit from bit 0:\n");\r
if (usereg)\r
{\r
}\r
else\r
ot(" tst r0,#1\n");\r
- ot(" orrne r9,r9,#0x20000000\n");\r
+ ot(" orrne r10,r10,#0x20000000\n");\r
}\r
ot("\n");\r
\r
\r
OpStart(op,ea,0,count<0); Cycles=size<2?6:8;\r
\r
- EaCalc(10,0x0007, ea,size,1);\r
- EaRead(10, 0, ea,size,0x0007,1);\r
+ EaCalc(11,0x0007, ea,size,1);\r
+ EaRead(11, 0, ea,size,0x0007,1);\r
\r
EmitAsr(op,type,dir,count, size,usereg);\r
\r
- EaWrite(10, 0, ea,size,0x0007,1);\r
+ EaWrite(11, 0, ea,size,0x0007,1);\r
\r
opend_op_changes_cycles = (count<0);\r
OpEnd(ea,0);\r
\r
OpStart(op,ea); Cycles=6; // EmitAsr() will add 2\r
\r
- EaCalc (10,0x003f,ea,size,1);\r
- EaRead (10, 0,ea,size,0x003f,1);\r
+ EaCalc (11,0x003f,ea,size,1);\r
+ EaRead (11, 0,ea,size,0x003f,1);\r
\r
EmitAsr(op,type,dir,1,size,0);\r
\r
- EaWrite(10, 0,ea,size,0x003f,1);\r
+ EaWrite(11, 0,ea,size,0x003f,1);\r
\r
OpEnd(ea);\r
return 0;\r
Cycles=4;\r
if(ea>=8) Cycles+=10;\r
\r
- EaCalc (10,0x003f,ea,0,1);\r
- EaRead (10, 1,ea,0,0x003f,1);\r
+ EaCalc (11,0x003f,ea,0,1);\r
+ EaRead (11, 1,ea,0,0x003f,1);\r
\r
ot(" adds r1,r1,#0 ;@ Defines NZ, clears CV\n");\r
OpGetFlags(0,0);\r
#endif\r
ot(" orr r1,r1,#0x80000000 ;@ set bit7\n");\r
\r
- EaWrite(10, 1,ea,0,0x003f,1);\r
+ EaWrite(11, 1,ea,0,0x003f,1);\r
#if CYCLONE_FOR_GENESIS\r
}\r
#endif\r