.global DrZ80Run\r
.global DrZ80Ver\r
\r
- .equiv INTERRUPT_MODE, 0 ;@0 = Use internal int handler, 1 = Use Mames int handler\r
- .equiv FAST_Z80SP, 1 ;@0 = Use mem functions for stack pointer, 1 = Use direct mem pointer\r
- .equiv UPDATE_CONTEXT, 0\r
- .equiv DRZ80_FOR_PICODRIVE, 1\r
+ .equiv INTERRUPT_MODE, 0 ;@0 = Use internal int handler, 1 = Use Mames int handler\r
+ .equiv FAST_Z80SP, 1 ;@0 = Use mem functions for stack pointer, 1 = Use direct mem pointer\r
+ .equiv UPDATE_CONTEXT, 0\r
+ .equiv DRZ80_XMAP, 1\r
+ .equiv DRZ80_XMAP_MORE_INLINE, 1\r
+\r
+.if DRZ80_XMAP\r
+ .equ Z80_MEM_SHIFT, 13\r
+ ;@ note: stack is locked in single bank that z80sp_base points to\r
+.endif\r
\r
.if INTERRUPT_MODE\r
.extern Interrupt\r
.endif\r
\r
-.if DRZ80_FOR_PICODRIVE\r
- .extern PicoRead8\r
- .extern Pico\r
- .extern z80_write\r
- .extern ym2612_read_local_z80\r
-.endif\r
-\r
DrZ80Ver: .long 0x0001\r
\r
;@ --------------------------- Defines ----------------------------\r
;@ Make sure that regs/pointers for z80pc to z80sp match up!\r
\r
- opcodes .req r3\r
- z80_icount .req r4\r
+ z80_icount .req r3\r
+ opcodes .req r4\r
cpucontext .req r5\r
z80pc .req r6\r
z80a .req r7\r
\r
.text\r
\r
-.if DRZ80_FOR_PICODRIVE\r
-\r
-pico_z80_read8: @ addr\r
- cmp r0,#0x2000 @ Z80 RAM\r
- ldrlt r1,[cpucontext,#z80sp_base]\r
- ldrltb r0,[r1,r0]\r
- bxlt lr\r
-\r
- cmp r0,#0x8000 @ 68k bank\r
- blt 1f\r
- ldr r2,=(Pico+0x22212)\r
- ldrh r1,[r2]\r
- bic r0,r0,#0x3f8000\r
- orr r0,r0,r1,lsl #15\r
- ldr r1,[r2,#-0xe] @ ROM size\r
- cmp r0,r1\r
- ldrlt r1,[r2,#-0x12] @ ROM\r
- eorlt r0,r0,#1 @ our ROM is byteswapped\r
- ldrltb r0,[r1,r0]\r
- bxlt lr\r
- stmfd sp!,{r3,r12,lr}\r
- bl PicoRead8\r
- ldmfd sp!,{r3,r12,pc}\r
-1:\r
- mov r1,r0,lsr #13\r
- cmp r1,#2 @ YM2612 (0x4000-0x5fff)\r
- bne 0f\r
- and r0,r0,#3\r
- stmfd sp!,{r3,r12,lr}\r
+.if DRZ80_XMAP\r
+\r
+z80_xmap_read8: @ addr\r
+ ldr r1,[cpucontext,#z80_read8]\r
+ mov r2,r0,lsr #Z80_MEM_SHIFT\r
+ ldr r1,[r1,r2,lsl #2]\r
+ movs r1,r1,lsl #1\r
+ ldrccb r0,[r1,r0]\r
+ bxcc lr\r
+\r
+z80_xmap_read8_handler: @ addr, func\r
str z80_icount,[cpucontext,#cycles_pointer]\r
- bl ym2612_read_local_z80\r
- ldmfd sp!,{r3,r12,pc}\r
-0:\r
- cmp r0,#0x4000\r
- movge r0,#0xff\r
- bxge lr\r
- ldr r1,[cpucontext,#z80sp_base]\r
- bic r0,r0,#0x0fe000 @ Z80 RAM (mirror)\r
- ldrb r0,[r1,r0]\r
- bx lr\r
+ stmfd sp!,{r12,lr}\r
+ mov lr,pc\r
+ bx r1\r
+ ldr z80_icount,[cpucontext,#cycles_pointer]\r
+ ldmfd sp!,{r12,pc}\r
+\r
+z80_xmap_write8: @ data, addr\r
+ ldr r2,[cpucontext,#z80_write8]\r
+ add r2,r2,r1,lsr #Z80_MEM_SHIFT-2\r
+ bic r2,r2,#3\r
+ ldr r2,[r2]\r
+ movs r2,r2,lsl #1\r
+ strccb r0,[r2,r1]\r
+ bxcc lr\r
+\r
+z80_xmap_write8_handler: @ data, addr, func\r
+ str z80_icount,[cpucontext,#cycles_pointer]\r
+ mov r3,r0\r
+ mov r0,r1\r
+ mov r1,r3\r
+ stmfd sp!,{r12,lr}\r
+ mov lr,pc\r
+ bx r2\r
+ ldr z80_icount,[cpucontext,#cycles_pointer]\r
+ ldmfd sp!,{r12,pc}\r
+\r
+z80_xmap_read16: @ addr\r
+ @ check if we cross bank boundary\r
+ add r1,r0,#1\r
+ eor r1,r1,r0\r
+ tst r1,#1<<Z80_MEM_SHIFT\r
+ bne 0f\r
\r
-pico_z80_read16: @ addr\r
- cmp r0,#0x2000 @ Z80 RAM\r
- bge 2f\r
- ldr r1,[cpucontext,#z80sp_base]\r
+ ldr r1,[cpucontext,#z80_read8]\r
+ mov r2,r0,lsr #Z80_MEM_SHIFT\r
+ ldr r1,[r1,r2,lsl #2]\r
+ movs r1,r1,lsl #1\r
+ bcs 0f\r
ldrb r0,[r1,r0]!\r
ldrb r1,[r1,#1]\r
orr r0,r0,r1,lsl #8\r
bx lr\r
\r
-2:\r
- cmp r0,#0x8000 @ 68k bank\r
- blt 1f\r
- ldr r2,=(Pico+0x22212)\r
- ldrh r1,[r2]\r
- bic r0,r0,#0x1f8000\r
- orr r0,r0,r1,lsl #15\r
- ldr r1,[r2,#-0xe] @ ROM size\r
- cmp r0,r1\r
- ldr r1,[r2,#-0x12] @ ROM\r
- tst r0,#1\r
- eor r0,r0,#1\r
- ldrb r0,[r1,r0]!\r
- ldreqb r1,[r1,#-1]\r
- ldrneb r1,[r1,#3] @ this is due to byteswapped ROM\r
- orr r0,r0,r1,lsl #8\r
- bx lr\r
-3:\r
- stmfd sp!,{r3-r5,r12,lr}\r
- mov r4,r0\r
- bl PicoRead8\r
- mov r5,r0\r
- add r0,r4,#1\r
- bl PicoRead8\r
- orr r0,r5,r0,lsl #8\r
- ldmfd sp!,{r3-r5,r12,pc}\r
-1:\r
- mov r1,r0,lsr #13\r
- cmp r1,#2 @ YM2612 (0x4000-0x5fff)\r
- bne 0f\r
- and r0,r0,#3\r
- stmfd sp!,{r3,r12,lr}\r
- str z80_icount,[cpucontext,#cycles_pointer]\r
- bl ym2612_read_local_z80\r
- orr r0,r0,r0,lsl #8\r
- ldmfd sp!,{r3,r12,pc}\r
0:\r
- cmp r0,#0x4000\r
- movge r0,#0xff\r
- bxge lr\r
- ldr r1,[cpucontext,#z80sp_base]\r
- bic r0,r0,#0x0fe000 @ Z80 RAM (mirror)\r
- ldrb r0,[r1,r0]!\r
- ldrb r1,[r1,#1]\r
- orr r0,r0,r1,lsl #8\r
- bx lr\r
+ @ z80_xmap_read8 will save r3 and r12 for us\r
+ stmfd sp!,{r8,r9,lr}\r
+ mov r8,r0\r
+ bl z80_xmap_read8\r
+ mov r9,r0\r
+ add r0,r8,#1\r
+ bl z80_xmap_read8\r
+ orr r0,r9,r0,lsl #8\r
+ ldmfd sp!,{r8,r9,pc}\r
+\r
+z80_xmap_write16: @ data, addr\r
+ add r2,r1,#1\r
+ eor r2,r2,r1\r
+ tst r2,#1<<Z80_MEM_SHIFT\r
+ bne 0f\r
\r
-pico_z80_write8: @ data, addr\r
- cmp r1,#0x4000\r
- bge 1f\r
- ldr r2,[cpucontext,#z80sp_base]\r
- bic r1,r1,#0x0fe000 @ Z80 RAM\r
- strb r0,[r2,r1]\r
- bx lr\r
-1:\r
- stmfd sp!,{r3,r12,lr}\r
- str z80_icount,[cpucontext,#cycles_pointer]\r
- bl z80_write\r
- ldmfd sp!,{r3,r12,pc}\r
-\r
-pico_z80_write16: @ data, addr\r
- cmp r1,#0x4000\r
- bge 1f\r
- ldr r2,[cpucontext,#z80sp_base]\r
- bic r1,r1,#0x0fe000 @ Z80 RAM\r
+ ldr r2,[cpucontext,#z80_write8]\r
+ add r2,r2,r1,lsr #Z80_MEM_SHIFT-2\r
+ bic r2,r2,#3\r
+ ldr r2,[r2]\r
+ movs r2,r2,lsl #1\r
+ bcs 0f\r
strb r0,[r2,r1]!\r
mov r0,r0,lsr #8\r
strb r0,[r2,#1]\r
bx lr\r
-1:\r
- stmfd sp!,{r3-r5,r12,lr}\r
- str z80_icount,[cpucontext,#cycles_pointer]\r
- mov r4,r0\r
- mov r5,r1\r
- bl z80_write\r
- mov r0,r4,lsr #8\r
- add r1,r5,#1\r
- bl z80_write\r
- ldmfd sp!,{r3-r5,r12,pc}\r
-\r
- .pool\r
+\r
+0:\r
+ stmfd sp!,{r8,r9,lr}\r
+ mov r8,r0\r
+ mov r9,r1\r
+ bl z80_xmap_write8\r
+ mov r0,r8,lsr #8\r
+ add r1,r9,#1\r
+ bl z80_xmap_write8\r
+ ldmfd sp!,{r8,r9,pc}\r
+\r
+z80_xmap_rebase_pc:\r
+ ldr r1,[cpucontext,#z80_read8]\r
+ mov r2,r0,lsr #Z80_MEM_SHIFT\r
+ ldr r1,[r1,r2,lsl #2]\r
+ movs r1,r1,lsl #1\r
+ strcc r1,[cpucontext,#z80pc_base]\r
+ addcc z80pc,r1,r0\r
+ bxcc lr\r
+\r
+z80_bad_jump:\r
+ ldr r0,[cpucontext,#z80_read8]\r
+ ldr r0,[r0]\r
+ str r0,[cpucontext,#z80pc_base]\r
+ mov z80pc,r0\r
+ bx lr\r
.endif\r
\r
+\r
.macro fetch cycs\r
subs z80_icount,z80_icount,#\cycs\r
.if UPDATE_CONTEXT\r
.if UPDATE_CONTEXT\r
str z80pc,[cpucontext,#z80pc_pointer]\r
.endif\r
-.if DRZ80_FOR_PICODRIVE\r
- bl pico_z80_read8\r
+.if DRZ80_XMAP\r
+.if !DRZ80_XMAP_MORE_INLINE\r
+ ldr r1,[cpucontext,#z80_read8]\r
+ mov r2,r0,lsr #Z80_MEM_SHIFT\r
+ ldr r1,[r1,r2,lsl #2]\r
+ movs r1,r1,lsl #1\r
+ ldrccb r0,[r1,r0]\r
+ blcs z80_xmap_read8_handler\r
.else\r
+ bl z80_xmap_read8\r
+.endif\r
+.else ;@ if !DRZ80_XMAP\r
stmfd sp!,{r3,r12}\r
mov lr,pc\r
ldr pc,[cpucontext,#z80_read8] ;@ r0 = addr - data returned in r0\r
.if UPDATE_CONTEXT\r
str z80pc,[cpucontext,#z80pc_pointer]\r
.endif\r
-.if DRZ80_FOR_PICODRIVE\r
- bl pico_z80_read16\r
+.if DRZ80_XMAP\r
+ bl z80_xmap_read16\r
.else\r
stmfd sp!,{r3,r12}\r
mov lr,pc\r
.if UPDATE_CONTEXT\r
str z80pc,[cpucontext,#z80pc_pointer]\r
.endif\r
-.if DRZ80_FOR_PICODRIVE\r
- bl pico_z80_write8\r
+.if DRZ80_XMAP\r
+.if DRZ80_XMAP_MORE_INLINE\r
+ ldr r2,[cpucontext,#z80_write8]\r
+ mov lr,r1,lsr #Z80_MEM_SHIFT\r
+ ldr r2,[r2,lr,lsl #2]\r
+ movs r2,r2,lsl #1\r
+ strccb r0,[r2,r1]\r
+ blcs z80_xmap_write8_handler\r
.else\r
+ bl z80_xmap_write8\r
+.endif\r
+.else ;@ if !DRZ80_XMAP\r
stmfd sp!,{r3,r12}\r
mov lr,pc\r
ldr pc,[cpucontext,#z80_write8] ;@ r0=data r1=addr\r
.if UPDATE_CONTEXT\r
str z80pc,[cpucontext,#z80pc_pointer]\r
.endif\r
-.if DRZ80_FOR_PICODRIVE\r
- bl pico_z80_write16\r
+.if DRZ80_XMAP\r
+ bl z80_xmap_write16\r
.else\r
stmfd sp!,{r3,r12}\r
mov lr,pc\r
str z80pc,[cpucontext,#z80pc_pointer]\r
.endif\r
mov r0,z80hl, lsr #16\r
-.if DRZ80_FOR_PICODRIVE\r
- bl pico_z80_read8\r
+.if DRZ80_XMAP\r
+ bl z80_xmap_read8\r
.else\r
stmfd sp!,{r3,r12}\r
mov lr,pc\r
ldr pc,[cpucontext,#z80_read8] ;@ r0 = addr - data returned in r0\r
-.endif\r
-.if UPDATE_CONTEXT\r
- str z80pc,[cpucontext,#z80pc_pointer]\r
.endif\r
mov r1,z80de, lsr #16\r
-.if DRZ80_FOR_PICODRIVE\r
- bl pico_z80_write8\r
+.if DRZ80_XMAP\r
+ bl z80_xmap_write8\r
.else\r
mov lr,pc\r
ldr pc,[cpucontext,#z80_write8] ;@ r0=data r1=addr\r
.if UPDATE_CONTEXT\r
str z80pc,[cpucontext,#z80pc_pointer]\r
.endif\r
-.if DRZ80_FOR_PICODRIVE\r
- bic r0,r0,#0xfe000\r
- ldr r1,[cpucontext,#z80pc_base]\r
- add z80pc,r1,r0\r
+.if DRZ80_XMAP\r
+ bl z80_xmap_rebase_pc\r
.else\r
stmfd sp!,{r3,r12}\r
mov lr,pc\r
.if UPDATE_CONTEXT\r
str z80pc,[cpucontext,#z80pc_pointer]\r
.endif\r
-.if DRZ80_FOR_PICODRIVE\r
- bic r0,r0,#0xfe000\r
+.if DRZ80_XMAP\r
+ ;@ XXX: SP is locked to single back z80sp_base points to.\r
ldr r1,[cpucontext,#z80sp_base]\r
+ bic r0,r0,#0x7f<<Z80_MEM_SHIFT\r
add r0,r1,r0\r
.else\r
stmfd sp!,{r3,r12}\r
\r
.macro opPOP\r
.if FAST_Z80SP\r
-.if DRZ80_FOR_PICODRIVE\r
- @ notaz: try to protect against stack overflows, which tend to happen in Picodrive because of poor timing\r
- ldr r2,[cpucontext,#z80sp_base]\r
ldrb r0,[z80sp],#1\r
- add r2,r2,#0x2000\r
- cmp z80sp,r2\r
-@ subge z80sp,z80sp,#0x2000 @ unstable?\r
ldrb r1,[z80sp],#1\r
- cmp z80sp,r2\r
-@ subge z80sp,z80sp,#0x2000\r
orr r0,r0,r1, lsl #8\r
-.else\r
- ldrb r0,[z80sp],#1\r
- ldrb r1,[z80sp],#1\r
- orr r0,r0,r1, lsl #8\r
-.endif\r
.else\r
mov r0,z80sp\r
readmem16\r
.endm\r
;@---------------------------------------\r
\r
+.macro stack_check\r
+ @ try to protect against stack overflows, lock into current bank\r
+ ldr r1,[cpucontext,#z80sp_base]\r
+ sub r1,z80sp,r1\r
+ cmp r1,#2\r
+ addlt z80sp,z80sp,#1<<Z80_MEM_SHIFT\r
+.endm\r
+\r
.macro opPUSHareg reg @ reg > r1\r
.if FAST_Z80SP\r
-.if DRZ80_FOR_PICODRIVE\r
- @ notaz: try to protect against stack overflows, which tend to happen in Picodrive because of poor timing\r
- ldr r0,[cpucontext,#z80sp_base]\r
- cmp z80sp,r0\r
- addle z80sp,z80sp,#0x2000\r
- mov r1,\reg, lsr #8\r
- strb r1,[z80sp,#-1]!\r
- cmp z80sp,r0\r
- addle z80sp,z80sp,#0x2000\r
- strb \reg,[z80sp,#-1]!\r
-.else\r
+.if DRZ80_XMAP\r
+ stack_check\r
+.endif\r
mov r1,\reg, lsr #8\r
strb r1,[z80sp,#-1]!\r
strb \reg,[z80sp,#-1]!\r
-.endif\r
.else\r
mov r0,\reg\r
sub z80sp,z80sp,#2\r
\r
.macro opPUSHreg reg\r
.if FAST_Z80SP\r
-.if DRZ80_FOR_PICODRIVE\r
- ldr r0,[cpucontext,#z80sp_base]\r
- cmp z80sp,r0\r
- addle z80sp,z80sp,#0x2000\r
- mov r1,\reg, lsr #24\r
- strb r1,[z80sp,#-1]!\r
- cmp z80sp,r0\r
- addle z80sp,z80sp,#0x2000\r
- mov r1,\reg, lsr #16\r
- strb r1,[z80sp,#-1]!\r
-.else\r
+.if DRZ80_XMAP\r
+ stack_check\r
+.endif\r
mov r1,\reg, lsr #24\r
strb r1,[z80sp,#-1]!\r
mov r1,\reg, lsr #16\r
strb r1,[z80sp,#-1]!\r
-.endif\r
.else\r
mov r0,\reg,lsr #16\r
sub z80sp,z80sp,#2\r
;@---------------------------------------\r
\r
.macro opRESmemHL bit\r
-.if DRZ80_FOR_PICODRIVE\r
mov r0,z80hl, lsr #16\r
- bl pico_z80_read8\r
+.if DRZ80_XMAP\r
+ bl z80_xmap_read8\r
bic r0,r0,#1<<\bit\r
mov r1,z80hl, lsr #16\r
- bl pico_z80_write8\r
+ bl z80_xmap_write8\r
.else\r
- mov r0,z80hl, lsr #16\r
stmfd sp!,{r3,r12}\r
mov lr,pc\r
ldr pc,[cpucontext,#z80_read8] ;@ r0 = addr - data returned in r0\r
;@---------------------------------------\r
\r
.macro opRESmem bit\r
-.if DRZ80_FOR_PICODRIVE\r
+.if DRZ80_XMAP\r
stmfd sp!,{r0} ;@ save addr as well\r
- bl pico_z80_read8\r
+ bl z80_xmap_read8\r
bic r0,r0,#1<<\bit\r
ldmfd sp!,{r1} ;@ restore addr into r1\r
- bl pico_z80_write8\r
+ bl z80_xmap_write8\r
.else\r
stmfd sp!,{r3,r12}\r
stmfd sp!,{r0} ;@ save addr as well\r
;@---------------------------------------\r
\r
.macro opSETmemHL bit\r
-.if DRZ80_FOR_PICODRIVE\r
mov r0,z80hl, lsr #16\r
- bl pico_z80_read8\r
+.if DRZ80_XMAP\r
+ bl z80_xmap_read8\r
orr r0,r0,#1<<\bit\r
mov r1,z80hl, lsr #16\r
- bl pico_z80_write8\r
+ bl z80_xmap_write8\r
.else\r
- mov r0,z80hl, lsr #16\r
stmfd sp!,{r3,r12}\r
mov lr,pc\r
ldr pc,[cpucontext,#z80_read8] ;@ r0 = addr - data returned in r0\r
;@---------------------------------------\r
\r
.macro opSETmem bit\r
-.if DRZ80_FOR_PICODRIVE\r
+.if DRZ80_XMAP\r
stmfd sp!,{r0} ;@ save addr as well\r
- bl pico_z80_read8\r
+ bl z80_xmap_read8\r
orr r0,r0,#1<<\bit\r
ldmfd sp!,{r1} ;@ restore addr into r1\r
- bl pico_z80_write8\r
+ bl z80_xmap_write8\r
.else\r
stmfd sp!,{r3,r12}\r
stmfd sp!,{r0} ;@ save addr as well\r
mov z80_icount,r1 ;@ setup number of Tstates to execute\r
\r
.if INTERRUPT_MODE == 0\r
- ldrh r0,[cpucontext,#z80irq] @ 0x4C\r
+ ldrh r0,[cpucontext,#z80irq] @ 0x4C, irq and IFF bits\r
.endif\r
ldmia cpucontext,{z80pc-z80sp} ;@ load Z80 registers\r
\r
.if INTERRUPT_MODE == 0\r
;@ check ints\r
- tst r0,#1\r
- movnes r0,r0,lsr #8\r
- blne DoInterrupt\r
+ tst r0,#0xff\r
+ movne r0,r0,lsr #8\r
+ tstne r0,#1\r
+ blne DoInterrupt\r
.endif\r
\r
- ldrb r0,[z80pc],#1 ;@ get first op code\r
ldr opcodes,MAIN_opcodes_POINTER2\r
- ldr pc,[opcodes,r0, lsl #2] ;@ execute op code\r
\r
-MAIN_opcodes_POINTER2: .word MAIN_opcodes\r
+ cmp z80_icount,#0 ;@ irq might have used all cycles\r
+ ldrplb r0,[z80pc],#1\r
+ ldrpl pc,[opcodes,r0, lsl #2]\r
\r
\r
z80_execute_end:\r
;@ save registers in CPU context\r
stmia cpucontext,{z80pc-z80sp} ;@ save Z80 registers\r
- mov r0,z80_icount\r
+ mov r0,z80_icount\r
ldmia sp!,{r4-r12,pc} ;@ restore registers from stack and return to C code\r
\r
+MAIN_opcodes_POINTER2: .word MAIN_opcodes\r
.if INTERRUPT_MODE\r
Interrupt_local: .word Interrupt\r
.endif\r
ldmia cpucontext,{z80pc-z80sp} ;@ load Z80 registers\r
mov pc,lr ;@ return\r
.else\r
+\r
+ ;@ r0 == z80if\r
stmfd sp!,{lr}\r
\r
tst r0,#4 ;@ check halt\r
strb r0,[cpucontext,#z80if]\r
\r
;@ now check int mode\r
- tst r1,#1\r
- bne DoInterrupt_mode1\r
- tst r1,#2\r
- bne DoInterrupt_mode2\r
+ cmp r1,#1\r
+ beq DoInterrupt_mode1\r
+ bgt DoInterrupt_mode2\r
\r
DoInterrupt_mode0:\r
;@ get 3 byte vector\r
;@ rebase new pc\r
rebasepc\r
\r
+ eatcycles 13\r
b DoInterrupt_end\r
\r
1:\r
;@ rebase new pc\r
rebasepc\r
\r
+ eatcycles 13\r
b DoInterrupt_end\r
\r
DoInterrupt_mode1:\r
mov r0,#0x38\r
rebasepc\r
\r
+ eatcycles 13\r
b DoInterrupt_end\r
\r
DoInterrupt_mode2:\r
orr r0,r0,r1,lsr#16\r
\r
;@ read new pc from vector address\r
-.if DRZ80_FOR_PICODRIVE\r
- bl pico_z80_read16\r
- bic r0,r0,#0xfe000\r
- ldr r1,[cpucontext,#z80pc_base]\r
- add z80pc,r1,r0\r
.if UPDATE_CONTEXT\r
str z80pc,[cpucontext,#z80pc_pointer]\r
.endif\r
+.if DRZ80_XMAP\r
+ bl z80_xmap_read16\r
+ rebasepc\r
.else\r
stmfd sp!,{r3,r12}\r
mov lr,pc\r
ldr pc,[cpucontext,#z80_read16]\r
\r
;@ rebase new pc\r
-.if UPDATE_CONTEXT\r
- str z80pc,[cpucontext,#z80pc_pointer]\r
-.endif\r
mov lr,pc\r
ldr pc,[cpucontext,#z80_rebasePC] ;@ r0=new pc - external function sets z80pc_base and returns new z80pc in r0\r
ldmfd sp!,{r3,r12}\r
mov z80pc,r0 \r
.endif\r
+ eatcycles 17\r
\r
DoInterrupt_end:\r
;@ interupt accepted so callback irq interface\r
ldr r0,[cpucontext, #z80irqcallback]\r
tst r0,r0\r
+ streqb r0,[cpucontext,#z80irq] ;@ default handling\r
ldmeqfd sp!,{pc}\r
stmfd sp!,{r3,r12}\r
mov lr,pc\r
mov pc,r0 ;@ call callback function\r
ldmfd sp!,{r3,r12}\r
ldmfd sp!,{pc} ;@ return\r
-\r
.endif\r
\r
.data\r
fetch 5\r
\r
opcode_C_9_cond:\r
- sub z80_icount,#1\r
+ eatcycles 1\r
;@RET\r
opcode_C_9:\r
opPOP\r
;@EI\r
opcode_F_B:\r
ldrb r1,[cpucontext,#z80if]\r
- tst r1,#Z80_IF1\r
- bne ei_return_exit\r
-\r
+ mov r2,opcodes\r
orr r1,r1,#(Z80_IF1)|(Z80_IF2)\r
strb r1,[cpucontext,#z80if]\r
\r
- mov r2,opcodes\r
+ ldrb r0,[z80pc],#1\r
+ eatcycles 4\r
ldr opcodes,EI_DUMMY_opcodes_POINTER\r
ldr pc,[r2,r0, lsl #2]\r
\r
;@point that program returns from EI to check interupts\r
;@an interupt can not be taken directly after a EI opcode\r
;@ reset z80pc and opcode pointer\r
- ldrh r0,[cpucontext,#z80irq] @ 0x4C\r
+ ldrh r0,[cpucontext,#z80irq] @ 0x4C, irq and IFF bits\r
sub z80pc,z80pc,#1\r
ldr opcodes,MAIN_opcodes_POINTER\r
;@ check ints\r
- tst r0,#1\r
- movnes r0,r0,lsr #8\r
- blne DoInterrupt\r
+ tst r0,#0xff\r
+ movne r0,r0,lsr #8\r
+ tstne r0,#1\r
+ blne DoInterrupt\r
+\r
;@ continue\r
-ei_return_exit:\r
- fetch 4\r
+ fetch 0\r
\r
;@CALL M,NN\r
opcode_F_C:\r
opcode_DD_34:\r
ldrsb r0,[z80pc],#1\r
ldr r1,[z80xx]\r
- add r0,r0,r1, lsr #16\r
+ add r0,r1,r0, lsl #16\r
+ mov r0,r0,lsr #16\r
stmfd sp!,{r0} ;@ save addr\r
readmem8\r
opINC8b\r
opcode_DD_35:\r
ldrsb r0,[z80pc],#1\r
ldr r1,[z80xx]\r
- add r0,r0,r1, lsr #16\r
+ add r0,r1,r0, lsl #16\r
+ mov r0,r0,lsr #16\r
stmfd sp!,{r0} ;@ save addr\r
readmem8\r
opDEC8b\r
ldrsb r2,[z80pc],#1\r
ldrb r0,[z80pc],#1\r
ldr r1,[z80xx]\r
- add r1,r2,r1, lsr #16\r
+ add r1,r1,r2, lsl #16\r
+ mov r1,r1,lsr #16\r
writemem8\r
fetch 19\r
;@ADD IX,SP\r
opcode_DD_46:\r
ldrsb r0,[z80pc],#1\r
ldr r1,[z80xx]\r
- add r0,r0,r1, lsr #16\r
+ add r0,r1,r0, lsl #16\r
+ mov r0,r0,lsr #16\r
readmem8\r
and z80bc,z80bc,#0xFF<<16\r
orr z80bc,z80bc,r0, lsl #24\r
opcode_DD_4E:\r
ldrsb r0,[z80pc],#1\r
ldr r1,[z80xx]\r
- add r0,r0,r1, lsr #16\r
+ add r0,r1,r0, lsl #16\r
+ mov r0,r0,lsr #16\r
readmem8\r
and z80bc,z80bc,#0xFF<<24\r
orr z80bc,z80bc,r0, lsl #16\r
opcode_DD_56:\r
ldrsb r0,[z80pc],#1\r
ldr r1,[z80xx]\r
- add r0,r0,r1, lsr #16\r
+ add r0,r1,r0, lsl #16\r
+ mov r0,r0,lsr #16\r
readmem8\r
and z80de,z80de,#0xFF<<16\r
orr z80de,z80de,r0, lsl #24\r
opcode_DD_5E:\r
ldrsb r0,[z80pc],#1\r
ldr r1,[z80xx]\r
- add r0,r0,r1, lsr #16\r
+ add r0,r1,r0, lsl #16\r
+ mov r0,r0,lsr #16\r
readmem8\r
and z80de,z80de,#0xFF<<24\r
orr z80de,z80de,r0, lsl #16\r
opcode_DD_66:\r
ldrsb r0,[z80pc],#1\r
ldr r1,[z80xx]\r
- add r0,r0,r1, lsr #16\r
+ add r0,r1,r0, lsl #16\r
+ mov r0,r0,lsr #16\r
readmem8\r
and z80hl,z80hl,#0xFF<<16\r
orr z80hl,z80hl,r0, lsl #24\r
opcode_DD_6E:\r
ldrsb r0,[z80pc],#1\r
ldr r1,[z80xx]\r
- add r0,r0,r1, lsr #16\r
+ add r0,r1,r0, lsl #16\r
+ mov r0,r0,lsr #16\r
readmem8\r
and z80hl,z80hl,#0xFF<<24\r
orr z80hl,z80hl,r0, lsl #16\r
opcode_DD_70:\r
ldrsb r0,[z80pc],#1\r
ldr r1,[z80xx]\r
- add r1,r0,r1, lsr #16\r
+ add r1,r1,r0, lsl #16\r
+ mov r1,r1,lsr #16\r
mov r0,z80bc, lsr #24\r
writemem8\r
fetch 19\r
opcode_DD_71:\r
ldrsb r0,[z80pc],#1\r
ldr r1,[z80xx]\r
- add r1,r0,r1, lsr #16\r
+ add r1,r1,r0, lsl #16\r
+ mov r1,r1,lsr #16\r
mov r0,z80bc, lsr #16\r
and r0,r0,#0xFF\r
writemem8\r
opcode_DD_72:\r
ldrsb r0,[z80pc],#1\r
ldr r1,[z80xx]\r
- add r1,r0,r1, lsr #16\r
+ add r1,r1,r0, lsl #16\r
+ mov r1,r1,lsr #16\r
mov r0,z80de, lsr #24\r
writemem8\r
fetch 19\r
opcode_DD_73:\r
ldrsb r0,[z80pc],#1\r
ldr r1,[z80xx]\r
- add r1,r0,r1, lsr #16\r
+ add r1,r1,r0, lsl #16\r
+ mov r1,r1,lsr #16\r
mov r0,z80de, lsr #16\r
and r0,r0,#0xFF\r
writemem8\r
opcode_DD_74:\r
ldrsb r0,[z80pc],#1\r
ldr r1,[z80xx]\r
- add r1,r0,r1, lsr #16\r
+ add r1,r1,r0, lsl #16\r
+ mov r1,r1,lsr #16\r
mov r0,z80hl, lsr #24\r
writemem8\r
fetch 19\r
opcode_DD_75:\r
ldrsb r0,[z80pc],#1\r
ldr r1,[z80xx]\r
- add r1,r0,r1, lsr #16\r
+ add r1,r1,r0, lsl #16\r
+ mov r1,r1,lsr #16\r
mov r0,z80hl, lsr #16\r
and r0,r0,#0xFF\r
writemem8\r
opcode_DD_77:\r
ldrsb r0,[z80pc],#1\r
ldr r1,[z80xx]\r
- add r1,r0,r1, lsr #16\r
+ add r1,r1,r0, lsl #16\r
+ mov r1,r1,lsr #16\r
mov r0,z80a, lsr #24\r
writemem8\r
fetch 19\r
opcode_DD_7E:\r
ldrsb r0,[z80pc],#1\r
ldr r1,[z80xx]\r
- add r0,r0,r1, lsr #16\r
+ add r0,r1,r0, lsl #16\r
+ mov r0,r0,lsr #16\r
readmem8\r
mov z80a,r0, lsl #24\r
fetch 19\r
opcode_DD_86:\r
ldrsb r0,[z80pc],#1\r
ldr r1,[z80xx]\r
- add r0,r0,r1, lsr #16\r
+ add r0,r1,r0, lsl #16\r
+ mov r0,r0,lsr #16\r
readmem8\r
opADDb\r
fetch 19\r
opcode_DD_8E:\r
ldrsb r0,[z80pc],#1\r
ldr r1,[z80xx]\r
- add r0,r0,r1, lsr #16\r
+ add r0,r1,r0, lsl #16\r
+ mov r0,r0,lsr #16\r
readmem8\r
opADCb\r
fetch 19\r
opcode_DD_96:\r
ldrsb r0,[z80pc],#1\r
ldr r1,[z80xx]\r
- add r0,r0,r1, lsr #16\r
+ add r0,r1,r0, lsl #16\r
+ mov r0,r0,lsr #16\r
readmem8\r
opSUBb\r
fetch 19\r
opcode_DD_9E:\r
ldrsb r0,[z80pc],#1\r
ldr r1,[z80xx]\r
- add r0,r0,r1, lsr #16\r
+ add r0,r1,r0, lsl #16\r
+ mov r0,r0,lsr #16\r
readmem8\r
opSBCb\r
fetch 19\r
opcode_DD_A6:\r
ldrsb r0,[z80pc],#1\r
ldr r1,[z80xx]\r
- add r0,r0,r1, lsr #16\r
+ add r0,r1,r0, lsl #16\r
+ mov r0,r0,lsr #16\r
readmem8\r
opANDb\r
fetch 19\r
opcode_DD_AE:\r
ldrsb r0,[z80pc],#1\r
ldr r1,[z80xx]\r
- add r0,r0,r1, lsr #16\r
+ add r0,r1,r0, lsl #16\r
+ mov r0,r0,lsr #16\r
readmem8\r
opXORb\r
fetch 19\r
opcode_DD_B6:\r
ldrsb r0,[z80pc],#1\r
ldr r1,[z80xx]\r
- add r0,r0,r1, lsr #16\r
+ add r0,r1,r0, lsl #16\r
+ mov r0,r0,lsr #16\r
readmem8\r
opORb\r
fetch 19\r
opcode_DD_BE:\r
ldrsb r0,[z80pc],#1\r
ldr r1,[z80xx]\r
- add r0,r0,r1, lsr #16\r
+ add r0,r1,r0, lsl #16\r
+ mov r0,r0,lsr #16\r
readmem8\r
opCPb\r
fetch 19\r
;@moves the PC to the location of the subroutine\r
ldrsb r0,[z80pc],#1\r
ldr r1,[z80xx]\r
- add r0,r0,r1, lsr #16\r
+ add r0,r1,r0, lsl #16\r
+ mov r0,r0,lsr #16\r
\r
ldrb r1,[z80pc],#1\r
ldr pc,[pc,r1, lsl #2]\r
;@end_loop:\r
;@ b end_loop\r
\r
-\r
+;@ vim:filetype=armasm\r
\r