}
else
{
- u32 newPC = (u32)(PC) - BasePC;
- SET_PC(newPC-2);
- execute_exception(M68K_PRIVILEGE_VIOLATION_EX);
+ SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR));
#ifdef USE_CYCLONE_TIMING
RET(0)
#else
}
else
{
- u32 newPC = (u32)(PC) - BasePC;
- SET_PC(newPC-2);
- execute_exception(M68K_PRIVILEGE_VIOLATION_EX);
+ SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR));
RET(4)
}
RET(20)
}
else
{
- u32 newPC = (u32)(PC) - BasePC;
- SET_PC(newPC-2);
- execute_exception(M68K_PRIVILEGE_VIOLATION_EX);
- RET(4)
+ SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR));
+ RET(0)
}
RET(20)
}
READ_BYTE_F(adr + 2, src)
DREGu16((Opcode >> 9) & 7) = (res << 8) | src;
POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(16)
+#else
RET(24)
+#endif
}
// MOVEPLaD
READ_BYTE_F(adr, src)
DREG((Opcode >> 9) & 7) = res | src;
POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(24)
+#else
RET(32)
+#endif
}
// MOVEPWDa
WRITE_BYTE_F(adr + 0, res >> 8)
WRITE_BYTE_F(adr + 2, res >> 0)
POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(16)
+#else
RET(24)
+#endif
}
// MOVEPLDa
adr += 2;
WRITE_BYTE_F(adr, res >> 0)
POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(24)
+#else
RET(32)
+#endif
}
// MOVEB
RET(8)
}
+#if 0
// MOVEB
OPCODE(0x1008)
{
*/
RET(8)
}
+#endif
// MOVEB
OPCODE(0x1010)
adr = AREG(7) - 4;
AREG(7) = adr;
PRE_IO
- WRITE_LONG_F(adr, res)
+ WRITE_LONG_DEC_F(adr, res)
POST_IO
RET(12)
}
adr = AREG(7) - 4;
AREG(7) = adr;
PRE_IO
- WRITE_LONG_F(adr, res)
+ WRITE_LONG_DEC_F(adr, res)
POST_IO
RET(12)
}
flag_N = res >> 24;
adr = AREG(7) - 4;
AREG(7) = adr;
- WRITE_LONG_F(adr, res)
+ WRITE_LONG_DEC_F(adr, res)
POST_IO
RET(20)
}
flag_N = res >> 24;
adr = AREG(7) - 4;
AREG(7) = adr;
- WRITE_LONG_F(adr, res)
+ WRITE_LONG_DEC_F(adr, res)
POST_IO
RET(20)
}
flag_N = res >> 24;
adr = AREG(7) - 4;
AREG(7) = adr;
- WRITE_LONG_F(adr, res)
+ WRITE_LONG_DEC_F(adr, res)
POST_IO
RET(22)
}
flag_N = res >> 24;
adr = AREG(7) - 4;
AREG(7) = adr;
- WRITE_LONG_F(adr, res)
+ WRITE_LONG_DEC_F(adr, res)
POST_IO
RET(24)
}
flag_N = res >> 24;
adr = AREG(7) - 4;
AREG(7) = adr;
- WRITE_LONG_F(adr, res)
+ WRITE_LONG_DEC_F(adr, res)
POST_IO
RET(26)
}
flag_N = res >> 24;
adr = AREG(7) - 4;
AREG(7) = adr;
- WRITE_LONG_F(adr, res)
+ WRITE_LONG_DEC_F(adr, res)
POST_IO
RET(24)
}
flag_N = res >> 24;
adr = AREG(7) - 4;
AREG(7) = adr;
- WRITE_LONG_F(adr, res)
+ WRITE_LONG_DEC_F(adr, res)
POST_IO
RET(28)
}
flag_N = res >> 24;
adr = AREG(7) - 4;
AREG(7) = adr;
- WRITE_LONG_F(adr, res)
+ WRITE_LONG_DEC_F(adr, res)
POST_IO
RET(24)
}
flag_N = res >> 24;
adr = AREG(7) - 4;
AREG(7) = adr;
- WRITE_LONG_F(adr, res)
+ WRITE_LONG_DEC_F(adr, res)
POST_IO
RET(26)
}
adr = AREG(7) - 4;
AREG(7) = adr;
PRE_IO
- WRITE_LONG_F(adr, res)
+ WRITE_LONG_DEC_F(adr, res)
POST_IO
RET(20)
}
flag_N = res >> 24;
adr = AREG(7) - 4;
AREG(7) = adr;
- WRITE_LONG_F(adr, res)
+ WRITE_LONG_DEC_F(adr, res)
POST_IO
RET(20)
}
flag_N = res >> 24;
adr = AREG(7) - 4;
AREG(7) = adr;
- WRITE_LONG_F(adr, res)
+ WRITE_LONG_DEC_F(adr, res)
POST_IO
RET(22)
}
}
else
{
- u32 oldPC=GET_PC;
- SET_PC(oldPC-2)
- execute_exception(M68K_PRIVILEGE_VIOLATION_EX);
+ SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR));
RET(4)
}
RET(12)
}
else
{
- u32 oldPC=GET_PC;
- SET_PC(oldPC-2)
- execute_exception(M68K_PRIVILEGE_VIOLATION_EX);
+ SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR));
RET(4)
}
RET(16)
}
else
{
- u32 oldPC=GET_PC;
- SET_PC(oldPC-2)
- execute_exception(M68K_PRIVILEGE_VIOLATION_EX);
+ SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR));
RET(4)
}
RET(16)
}
else
{
- u32 oldPC=GET_PC;
- SET_PC(oldPC-2)
- execute_exception(M68K_PRIVILEGE_VIOLATION_EX);
+ SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR));
RET(4)
}
RET(18)
}
else
{
- u32 oldPC=GET_PC;
- SET_PC(oldPC-2)
- execute_exception(M68K_PRIVILEGE_VIOLATION_EX);
+ SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR));
RET(4)
}
RET(20)
}
else
{
- u32 oldPC=GET_PC;
- SET_PC(oldPC-2)
- execute_exception(M68K_PRIVILEGE_VIOLATION_EX);
+ SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR));
RET(4)
}
RET(22)
}
else
{
- u32 oldPC=GET_PC;
- SET_PC(oldPC-2)
- execute_exception(M68K_PRIVILEGE_VIOLATION_EX);
+ SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR));
RET(4)
}
RET(20)
}
else
{
- u32 oldPC=GET_PC;
- SET_PC(oldPC-2)
- execute_exception(M68K_PRIVILEGE_VIOLATION_EX);
+ SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR));
RET(4)
}
RET(24)
ASP = res;
}
POST_IO
- CHECK_INT_TO_JUMP(24)
+ CHECK_INT_TO_JUMP(20)
}
else
{
- u32 oldPC=GET_PC;
- SET_PC(oldPC-2)
- execute_exception(M68K_PRIVILEGE_VIOLATION_EX);
+ SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR));
RET(4)
}
RET(20)
}
else
{
- u32 oldPC=GET_PC;
- SET_PC(oldPC-2)
- execute_exception(M68K_PRIVILEGE_VIOLATION_EX);
+ SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR));
RET(4)
}
RET(22)
}
else
{
- u32 oldPC=GET_PC;
- SET_PC(oldPC-2)
- execute_exception(M68K_PRIVILEGE_VIOLATION_EX);
+ SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR));
RET(4)
}
RET(16)
}
else
{
- u32 oldPC=GET_PC;
- SET_PC(oldPC-2)
- execute_exception(M68K_PRIVILEGE_VIOLATION_EX);
+ SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR));
RET(4)
}
RET(16)
}
else
{
- u32 oldPC=GET_PC;
- SET_PC(oldPC-2)
- execute_exception(M68K_PRIVILEGE_VIOLATION_EX);
+ SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR));
RET(4)
}
RET(18)
flag_V = 0;
flag_NotZ = res;
flag_N = res;
+#ifdef PICODRIVE_HACK
+ if (g_m68kcontext == &PicoCpuFS68k) {
+ res |= 0x80;
+ WRITE_BYTE_F(adr, res);
+ }
+#endif
+
POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(18)
+#else
RET(8)
+#endif
}
// TAS
flag_V = 0;
flag_NotZ = res;
flag_N = res;
+
+#ifdef PICODRIVE_HACK
+ if (g_m68kcontext == &PicoCpuFS68k) {
+ res |= 0x80;
+ WRITE_BYTE_F(adr, res);
+ }
+#endif
+
POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(18)
+#else
RET(8)
+#endif
}
// TAS
flag_V = 0;
flag_NotZ = res;
flag_N = res;
+
+#ifdef PICODRIVE_HACK
+ if (g_m68kcontext == &PicoCpuFS68k) {
+ res |= 0x80;
+ WRITE_BYTE_F(adr, res);
+ }
+#endif
+
POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(20)
+#else
RET(10)
+#endif
}
// TAS
flag_V = 0;
flag_NotZ = res;
flag_N = res;
+
+#ifdef PICODRIVE_HACK
+ if (g_m68kcontext == &PicoCpuFS68k) {
+ res |= 0x80;
+ WRITE_BYTE_F(adr, res);
+ }
+#endif
+
POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(22)
+#else
RET(12)
+#endif
}
// TAS
flag_V = 0;
flag_NotZ = res;
flag_N = res;
+
+#ifdef PICODRIVE_HACK
+ if (g_m68kcontext == &PicoCpuFS68k) {
+ res |= 0x80;
+ WRITE_BYTE_F(adr, res);
+ }
+#endif
+
POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(24)
+#else
RET(14)
+#endif
}
// TAS
flag_V = 0;
flag_NotZ = res;
flag_N = res;
+
+#ifdef PICODRIVE_HACK
+ if (g_m68kcontext == &PicoCpuFS68k) {
+ res |= 0x80;
+ WRITE_BYTE_F(adr, res);
+ }
+#endif
+
POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(22)
+#else
RET(12)
+#endif
}
// TAS
flag_V = 0;
flag_NotZ = res;
flag_N = res;
+
+#ifdef PICODRIVE_HACK
+ if (g_m68kcontext == &PicoCpuFS68k) {
+ res |= 0x80;
+ WRITE_BYTE_F(adr, res);
+ }
+#endif
+
POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(26)
+#else
RET(16)
+#endif
}
// TAS
flag_V = 0;
flag_NotZ = res;
flag_N = res;
+
+#ifdef PICODRIVE_HACK
+ if (g_m68kcontext == &PicoCpuFS68k) {
+ res |= 0x80;
+ WRITE_BYTE_F(adr, res);
+ }
+#endif
+
POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(18)
+#else
RET(8)
+#endif
}
// TAS
flag_V = 0;
flag_NotZ = res;
flag_N = res;
+
+#ifdef PICODRIVE_HACK
+ if (g_m68kcontext == &PicoCpuFS68k) {
+ res |= 0x80;
+ WRITE_BYTE_F(adr, res);
+ }
+#endif
+
POST_IO
-RET(10)
+#ifdef USE_CYCLONE_TIMING
+RET(20)
+#else
+RET(8)
+#endif
}
// ILLEGAL
OPCODE(0x4AFC)
{
- u32 oldPC=GET_PC;
- SET_PC(oldPC-2)
- execute_exception(M68K_ILLEGAL_INSTRUCTION_EX);
-RET(4)
+ SET_PC(execute_exception(M68K_ILLEGAL_INSTRUCTION_EX, GET_PC-2, GET_SR));
+RET(0)
}
// ILLEGAL A000-AFFF
OPCODE(0xA000)
{
- u32 oldPC=GET_PC;
- SET_PC(oldPC-2)
- execute_exception(M68K_1010_EX);
-RET(4)
+ SET_PC(execute_exception(M68K_1010_EX, GET_PC-2, GET_SR));
+RET(0)
}
// ILLEGAL F000-FFFF
OPCODE(0xF000)
{
- u32 oldPC=GET_PC;
- SET_PC(oldPC-2)
- execute_exception(M68K_1111_EX);
-RET(4)
+ SET_PC(execute_exception(M68K_1111_EX, GET_PC-2, GET_SR));
+RET(0) // 4 already taken by exc. handler
}
// MOVEMaR
// TRAP
OPCODE(0x4E40)
{
- execute_exception(M68K_TRAP_BASE_EX + (Opcode & 0xF));
+ SET_PC(execute_exception(M68K_TRAP_BASE_EX + (Opcode & 0xF), GET_PC, GET_SR));
RET(4)
}
if (!flag_S)
{
- u32 oldPC=GET_PC;
- SET_PC(oldPC-2)
- execute_exception(M68K_PRIVILEGE_VIOLATION_EX);
+ SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR));
RET(4)
}
res = AREGu32((Opcode >> 0) & 7);
if (!flag_S)
{
- u32 oldPC=GET_PC;
- SET_PC(oldPC-2)
- execute_exception(M68K_PRIVILEGE_VIOLATION_EX);
+ SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR));
RET(4)
}
res = ASP;
if (!flag_S)
{
- u32 oldPC=GET_PC;
- SET_PC(oldPC-2)
- execute_exception(M68K_PRIVILEGE_VIOLATION_EX);
+ SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR));
RET(4)
}
PRE_IO
if (!flag_S)
{
- u32 oldPC=GET_PC;
- SET_PC(oldPC-2)
- execute_exception(M68K_PRIVILEGE_VIOLATION_EX);
+ SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR));
RET(4)
}
FETCH_WORD(res);
AREG(7) = ASP;
ASP = res;
}
- m68kcontext.execinfo |= M68K_HALTED;
- m68kcontext.io_cycle_counter = 0;
-RET(4)
+ m68kcontext.execinfo |= FM68K_HALTED;
+RET0()
}
// RTE
if (!flag_S)
{
- u32 oldPC=GET_PC;
- SET_PC(oldPC-2)
- execute_exception(M68K_PRIVILEGE_VIOLATION_EX);
+ SET_PC(execute_exception(M68K_PRIVILEGE_VIOLATION_EX, GET_PC-2, GET_SR));
RET(4)
}
PRE_IO
ASP = res;
}
POST_IO
- m68kcontext.execinfo &= ~(M68K_EMULATE_GROUP_0|M68K_EMULATE_TRACE|M68K_DO_TRACE);
+ m68kcontext.execinfo &= ~(FM68K_EMULATE_GROUP_0|FM68K_EMULATE_TRACE|FM68K_DO_TRACE);
CHECK_INT_TO_JUMP(20)
RET(20)
}
OPCODE(0x4E76)
{
if (flag_V & 0x80)
- execute_exception(M68K_TRAPV_EX);
+ SET_PC(execute_exception(M68K_TRAPV_EX, GET_PC, GET_SR));
RET(4)
}
if (((s32)res < 0) || (res > src))
{
flag_N = res >> 8;
- execute_exception(M68K_CHK_EX);
+ SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR));
}
RET(10)
}
if (((s32)res < 0) || (res > src))
{
flag_N = res >> 8;
- execute_exception(M68K_CHK_EX);
+ SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR));
}
POST_IO
RET(14)
if (((s32)res < 0) || (res > src))
{
flag_N = res >> 8;
- execute_exception(M68K_CHK_EX);
+ SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR));
}
POST_IO
RET(14)
if (((s32)res < 0) || (res > src))
{
flag_N = res >> 8;
- execute_exception(M68K_CHK_EX);
+ SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR));
}
POST_IO
RET(16)
if (((s32)res < 0) || (res > src))
{
flag_N = res >> 8;
- execute_exception(M68K_CHK_EX);
+ SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR));
}
POST_IO
RET(18)
if (((s32)res < 0) || (res > src))
{
flag_N = res >> 8;
- execute_exception(M68K_CHK_EX);
+ SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR));
}
POST_IO
RET(20)
if (((s32)res < 0) || (res > src))
{
flag_N = res >> 8;
- execute_exception(M68K_CHK_EX);
+ SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR));
}
POST_IO
RET(18)
if (((s32)res < 0) || (res > src))
{
flag_N = res >> 8;
- execute_exception(M68K_CHK_EX);
+ SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR));
}
POST_IO
RET(22)
if (((s32)res < 0) || (res > src))
{
flag_N = res >> 8;
- execute_exception(M68K_CHK_EX);
+ SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR));
}
POST_IO
RET(18)
if (((s32)res < 0) || (res > src))
{
flag_N = res >> 8;
- execute_exception(M68K_CHK_EX);
+ SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR));
}
POST_IO
RET(20)
if (((s32)res < 0) || (res > src))
{
flag_N = res >> 8;
- execute_exception(M68K_CHK_EX);
+ SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR));
}
POST_IO
RET(14)
if (((s32)res < 0) || (res > src))
{
flag_N = res >> 8;
- execute_exception(M68K_CHK_EX);
+ SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR));
}
POST_IO
RET(14)
if (((s32)res < 0) || (res > src))
{
flag_N = res >> 8;
- execute_exception(M68K_CHK_EX);
+ SET_PC(execute_exception(M68K_CHK_EX, GET_PC, GET_SR));
}
POST_IO
RET(16)
dst = AREGu32((Opcode >> 0) & 7);
res = dst + src;
AREG((Opcode >> 0) & 7) = res;
-#ifdef USE_CYCLONE_TIMING_ // breaks Project-X
+#ifdef USE_CYCLONE_TIMING
RET(4)
#else
RET(8)
src = DREGu16((Opcode >> 0) & 7);
if (src == 0)
{
- execute_exception(M68K_ZERO_DIVIDE_EX);
+ SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR));
#ifdef USE_CYCLONE_TIMING_DIV
RET(140)
#else
READ_WORD_F(adr, src)
if (src == 0)
{
- execute_exception(M68K_ZERO_DIVIDE_EX);
+ SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR));
#ifdef USE_CYCLONE_TIMING_DIV
RET(144)
#else
READ_WORD_F(adr, src)
if (src == 0)
{
- execute_exception(M68K_ZERO_DIVIDE_EX);
+ SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR));
#ifdef USE_CYCLONE_TIMING_DIV
RET(144)
#else
READ_WORD_F(adr, src)
if (src == 0)
{
- execute_exception(M68K_ZERO_DIVIDE_EX);
+ SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR));
#ifdef USE_CYCLONE_TIMING_DIV
RET(146)
#else
READ_WORD_F(adr, src)
if (src == 0)
{
- execute_exception(M68K_ZERO_DIVIDE_EX);
+ SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR));
#ifdef USE_CYCLONE_TIMING_DIV
RET(148)
#else
READ_WORD_F(adr, src)
if (src == 0)
{
- execute_exception(M68K_ZERO_DIVIDE_EX);
+ SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR));
#ifdef USE_CYCLONE_TIMING_DIV
RET(150)
#else
READ_WORD_F(adr, src)
if (src == 0)
{
- execute_exception(M68K_ZERO_DIVIDE_EX);
+ SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR));
#ifdef USE_CYCLONE_TIMING_DIV
RET(148)
#else
READ_WORD_F(adr, src)
if (src == 0)
{
- execute_exception(M68K_ZERO_DIVIDE_EX);
+ SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR));
#ifdef USE_CYCLONE_TIMING_DIV
RET(162)
#else
READ_WORD_F(adr, src)
if (src == 0)
{
- execute_exception(M68K_ZERO_DIVIDE_EX);
+ SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR));
#ifdef USE_CYCLONE_TIMING_DIV
RET(148)
#else
READ_WORD_F(adr, src)
if (src == 0)
{
- execute_exception(M68K_ZERO_DIVIDE_EX);
+ SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR));
#ifdef USE_CYCLONE_TIMING_DIV
RET(160)
#else
FETCH_WORD(src);
if (src == 0)
{
- execute_exception(M68K_ZERO_DIVIDE_EX);
+ SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR));
#ifdef USE_CYCLONE_TIMING_DIV
RET(144)
#else
READ_WORD_F(adr, src)
if (src == 0)
{
- execute_exception(M68K_ZERO_DIVIDE_EX);
+ SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR));
#ifdef USE_CYCLONE_TIMING_DIV
RET(144)
#else
READ_WORD_F(adr, src)
if (src == 0)
{
- execute_exception(M68K_ZERO_DIVIDE_EX);
+ SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR));
#ifdef USE_CYCLONE_TIMING_DIV
RET(146)
#else
src = (s32)DREGs16((Opcode >> 0) & 7);
if (src == 0)
{
- execute_exception(M68K_ZERO_DIVIDE_EX);
+ SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR));
#ifdef USE_CYCLONE_TIMING_DIV
goto end81C0;
#endif
READSX_WORD_F(adr, src)
if (src == 0)
{
- execute_exception(M68K_ZERO_DIVIDE_EX);
+ SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR));
#ifdef USE_CYCLONE_TIMING_DIV
goto end81D0;
#endif
READSX_WORD_F(adr, src)
if (src == 0)
{
- execute_exception(M68K_ZERO_DIVIDE_EX);
+ SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR));
#ifdef USE_CYCLONE_TIMING_DIV
goto end81D8;
#endif
READSX_WORD_F(adr, src)
if (src == 0)
{
- execute_exception(M68K_ZERO_DIVIDE_EX);
+ SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR));
#ifdef USE_CYCLONE_TIMING_DIV
goto end81E0;
#endif
READSX_WORD_F(adr, src)
if (src == 0)
{
- execute_exception(M68K_ZERO_DIVIDE_EX);
+ SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR));
#ifdef USE_CYCLONE_TIMING_DIV
goto end81E8;
#endif
READSX_WORD_F(adr, src)
if (src == 0)
{
- execute_exception(M68K_ZERO_DIVIDE_EX);
+ SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR));
#ifdef USE_CYCLONE_TIMING_DIV
goto end81F0;
#endif
READSX_WORD_F(adr, src)
if (src == 0)
{
- execute_exception(M68K_ZERO_DIVIDE_EX);
+ SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR));
#ifdef USE_CYCLONE_TIMING_DIV
goto end81F8;
#endif
READSX_WORD_F(adr, src)
if (src == 0)
{
- execute_exception(M68K_ZERO_DIVIDE_EX);
+ SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR));
#ifdef USE_CYCLONE_TIMING_DIV
goto end81F9;
#endif
READSX_WORD_F(adr, src)
if (src == 0)
{
- execute_exception(M68K_ZERO_DIVIDE_EX);
+ SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR));
#ifdef USE_CYCLONE_TIMING_DIV
goto end81FA;
#endif
READSX_WORD_F(adr, src)
if (src == 0)
{
- execute_exception(M68K_ZERO_DIVIDE_EX);
+ SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR));
#ifdef USE_CYCLONE_TIMING_DIV
goto end81FB;
#endif
FETCH_SWORD(src);
if (src == 0)
{
- execute_exception(M68K_ZERO_DIVIDE_EX);
+ SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR));
#ifdef USE_CYCLONE_TIMING_DIV
goto end81FC;
#endif
READSX_WORD_F(adr, src)
if (src == 0)
{
- execute_exception(M68K_ZERO_DIVIDE_EX);
+ SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR));
#ifdef USE_CYCLONE_TIMING_DIV
goto end81DF;
#endif
READSX_WORD_F(adr, src)
if (src == 0)
{
- execute_exception(M68K_ZERO_DIVIDE_EX);
+ SET_PC(execute_exception(M68K_ZERO_DIVIDE_EX, GET_PC, GET_SR));
#ifdef USE_CYCLONE_TIMING_DIV
goto end81E7;
#endif
}
// SUBaD
+#if 0
OPCODE(0x9008)
{
u32 adr, res;
*/
RET(4)
}
+#endif
// SUBaD
OPCODE(0x9010)
res = dst - src;
AREG((Opcode >> 9) & 7) = res;
POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(12)
+#else
RET(10)
+#endif
}
// SUBA
res = dst - src;
AREG((Opcode >> 9) & 7) = res;
POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(12)
+#else
RET(10)
+#endif
}
// SUBA
res = dst - src;
AREG((Opcode >> 9) & 7) = res;
POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(14)
+#else
RET(12)
+#endif
}
// SUBA
res = dst - src;
AREG((Opcode >> 9) & 7) = res;
POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(16)
+#else
RET(14)
+#endif
}
// SUBA
res = dst - src;
AREG((Opcode >> 9) & 7) = res;
POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(18)
+#else
RET(16)
+#endif
}
// SUBA
res = dst - src;
AREG((Opcode >> 9) & 7) = res;
POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(16)
+#else
RET(14)
+#endif
}
// SUBA
res = dst - src;
AREG((Opcode >> 9) & 7) = res;
POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(20)
+#else
RET(18)
+#endif
}
// SUBA
res = dst - src;
AREG((Opcode >> 9) & 7) = res;
POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(16)
+#else
RET(14)
+#endif
}
// SUBA
res = dst - src;
AREG((Opcode >> 9) & 7) = res;
POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(18)
+#else
RET(16)
+#endif
}
// SUBA
res = dst - src;
AREG((Opcode >> 9) & 7) = res;
POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(12)
+#else
RET(10)
+#endif
}
// SUBA
res = dst - src;
AREG((Opcode >> 9) & 7) = res;
POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(14)
+#else
RET(12)
+#endif
}
// SUBA
}
// CMP
+#if 0
OPCODE(0xB008)
{
u32 adr, res;
*/
RET(4)
}
+#endif
// CMP
OPCODE(0xB010)
}
// ADDaD
+#if 0
OPCODE(0xD008)
{
u32 adr, res;
*/
RET(4)
}
+#endif
// ADDaD
OPCODE(0xD010)
res = dst + src;
AREG((Opcode >> 9) & 7) = res;
POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(12)
+#else
RET(10)
+#endif
}
// ADDA
res = dst + src;
AREG((Opcode >> 9) & 7) = res;
POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(12)
+#else
RET(10)
+#endif
}
// ADDA
res = dst + src;
AREG((Opcode >> 9) & 7) = res;
POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(14)
+#else
RET(12)
+#endif
}
// ADDA
res = dst + src;
AREG((Opcode >> 9) & 7) = res;
POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(16)
+#else
RET(14)
+#endif
}
// ADDA
res = dst + src;
AREG((Opcode >> 9) & 7) = res;
POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(18)
+#else
RET(16)
+#endif
}
// ADDA
res = dst + src;
AREG((Opcode >> 9) & 7) = res;
POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(16)
+#else
RET(14)
+#endif
}
// ADDA
res = dst + src;
AREG((Opcode >> 9) & 7) = res;
POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(20)
+#else
RET(18)
+#endif
}
// ADDA
res = dst + src;
AREG((Opcode >> 9) & 7) = res;
POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(16)
+#else
RET(14)
+#endif
}
// ADDA
res = dst + src;
AREG((Opcode >> 9) & 7) = res;
POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(18)
+#else
RET(16)
+#endif
}
// ADDA
res = dst + src;
AREG((Opcode >> 9) & 7) = res;
POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(12)
+#else
RET(10)
+#endif
}
// ADDA
res = dst + src;
AREG((Opcode >> 9) & 7) = res;
POST_IO
+#ifdef USE_CYCLONE_TIMING
+RET(14)
+#else
RET(12)
+#endif
}
// ADDA
RET(14)
}
+#ifdef PICODRIVE_HACK
+#if 0
+#define UPDATE_IDLE_COUNT { \
+ extern int idle_hit_counter; \
+ idle_hit_counter++; \
+}
+#else
+#define UPDATE_IDLE_COUNT
+#endif
+
+// BRA
+OPCODE(0x6001_idle)
+{
+#ifdef FAMEC_CHECK_BRANCHES
+ u32 newPC = (u32)(PC) - BasePC;
+ s8 offs=Opcode;
+ newPC += offs;
+ SET_PC(newPC);
+ CHECK_BRANCH_EXCEPTION(offs)
+#else
+ PC += ((s8)(Opcode & 0xFE)) >> 1;
+#endif
+ UPDATE_IDLE_COUNT
+RET0()
+}
+
+// BCC
+OPCODE(0x6601_idle)
+{
+ if (flag_NotZ)
+ {
+ UPDATE_IDLE_COUNT
+ PC += ((s8)(Opcode & 0xFE)) >> 1;
+ //if (idle_hit)
+ RET0()
+ }
+RET(8)
+}
+
+OPCODE(0x6701_idle)
+{
+ if (!flag_NotZ)
+ {
+ UPDATE_IDLE_COUNT
+ PC += ((s8)(Opcode & 0xFE)) >> 1;
+ //if (idle_hit)
+ RET0()
+ }
+RET(8)
+}
+
+
+extern int SekIsIdleCode(unsigned short *dst, int bytes);
+extern int SekRegisterIdlePatch(unsigned int pc, int oldop, int newop, void *ctx);
+
+OPCODE(idle_detector_bcc8)
+{
+ extern int idledet_start_frame;
+ extern char Pico[];
+ int frame_count, cond_true, bytes, ret, newop;
+ u16 *dest_pc;
+
+ dest_pc = PC + (((s8)(Opcode & 0xFE)) >> 1);
+
+ frame_count = *(int *)(Pico+0x22208+0x1c); // Pico.m.frame_count
+ if (frame_count < idledet_start_frame)
+ goto end;
+
+ bytes = 0 - (s8)(Opcode & 0xFE) - 2;
+ ret = SekIsIdleCode(dest_pc, bytes);
+ newop = (Opcode & 0xfe) | 0x7100;
+ if (!ret) newop |= 0x200;
+ if ( Opcode & 0x0100) newop |= 0x400; // beq
+ if (!(Opcode & 0x0f00)) newop |= 0xc00; // bra
+
+ ret = SekRegisterIdlePatch(GET_PC - 2, Opcode, newop, &m68kcontext);
+ switch (ret)
+ {
+ case 0: PC[-1] = newop; break;
+ case 1: break;
+ case 2: JumpTable[Opcode] = (Opcode & 0x0f00) ?
+ ((Opcode & 0x0100) ? CAST_OP(0x6701) : CAST_OP(0x6601)) :
+ CAST_OP(0x6001); break;
+ }
+
+end:
+ if ((Opcode & 0xff00) == 0x6000) cond_true = 1;
+ else cond_true = (Opcode & 0x0100) ? !flag_NotZ : flag_NotZ; // beq?
+ if (cond_true)
+ {
+ PC = dest_pc;
+ m68kcontext.io_cycle_counter -= 2;
+ }
+RET(8)
+}
+
+#endif // PICODRIVE_HACK