-#define HOST_REGS 29
-#define HOST_BTREG 27
-#define EXCLUDE_REG -1
-
#define HOST_IMM8 1
-#define HAVE_CMOV_IMM 1
-#define RAM_SIZE 0x200000
-
-//#define REG_SHIFT 2
/* calling convention:
r0 -r17: caller-save
r19-r29: callee-save */
-#define ARG1_REG 0
-#define ARG2_REG 1
-#define ARG3_REG 2
-#define ARG4_REG 3
+#define HOST_REGS 29
+#define EXCLUDE_REG -1
+
+#define SP 31
+#define WZR SP
+#define XZR SP
#define LR 30
#define HOST_TEMPREG LR
#define HOST_CCREG 28
#define rCC w28
+#define CALLER_SAVE_REGS 0x0007ffff
+#define PREFERRED_REG_FIRST 19
+#define PREFERRED_REG_LAST 27
+
+#define DRC_DBG_REGMASK 3 // others done by do_insn_cmp_arm64
+#define do_insn_cmp do_insn_cmp_arm64
+
+// stack space
+#define SSP_CALLEE_REGS (8*12) // new_dyna_start caller's
+#define SSP_CALLER_REGS (8*20)
+#define SSP_ALL (SSP_CALLEE_REGS+SSP_CALLER_REGS)
+
+#define TARGET_SIZE_2 24 // 2^24 = 16 megabytes
+
#ifndef __ASSEMBLER__
extern char *invc_ptr;
-#define TARGET_SIZE_2 24 // 2^24 = 16 megabytes
+struct tramp_insns
+{
+ u_int ldr;
+ u_int br;
+};
+
+static void clear_cache_arm64(char *start, char *end);
-// Code generator target address
-#if defined(BASE_ADDR_DYNAMIC)
- // for platforms that can't just use .bss buffer (are there any on arm64?)
- extern u_char *translation_cache;
-#else
- // using a static buffer in .bss
- extern u_char translation_cache[1 << TARGET_SIZE_2];
-#endif
+void do_memhandler_pre();
+void do_memhandler_post();
#endif // !__ASSEMBLY__