* See the COPYING file in the top-level directory.
*/
-// pending_exception?
-// swi 0 in do_unalignedwritestub?
#include <stdio.h>
#include "emu_if.h"
#include "pcsxmem.h"
#include "../psxhle.h"
#include "../r3000a.h"
+#include "../cdrom.h"
+#include "../psxdma.h"
+#include "../mdec.h"
#define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0]))
#endif
}
+typedef void (irq_func)();
+
+static irq_func * const irq_funcs[] = {
+ [PSXINT_SIO] = sioInterrupt,
+ [PSXINT_CDR] = cdrInterrupt,
+ [PSXINT_CDREAD] = cdrReadInterrupt,
+ [PSXINT_GPUDMA] = gpuInterrupt,
+ [PSXINT_MDECOUTDMA] = mdec1Interrupt,
+ [PSXINT_SPUDMA] = spuInterrupt,
+ [PSXINT_MDECINDMA] = mdec0Interrupt,
+ [PSXINT_GPUOTCDMA] = gpuotcInterrupt,
+};
+
+/* local dupe of psxBranchTest, using event_cycles */
+static void irq_test(void)
+{
+ u32 irqs = psxRegs.interrupt;
+ u32 cycle = psxRegs.cycle;
+ u32 irq, irq_bits;
+
+ if ((psxRegs.cycle - psxNextsCounter) >= psxNextCounter)
+ psxRcntUpdate();
+
+ // irq_funcs() may queue more irqs
+ psxRegs.interrupt = 0;
+
+ for (irq = 0, irq_bits = irqs; irq_bits != 0; irq++, irq_bits >>= 1) {
+ if (!(irq_bits & 1))
+ continue;
+ if ((s32)(cycle - event_cycles[irq]) >= 0) {
+ irqs &= ~(1 << irq);
+ irq_funcs[irq]();
+ }
+ }
+ psxRegs.interrupt |= irqs;
+
+ if ((psxHu32(0x1070) & psxHu32(0x1074)) && (Status & 0x401) == 0x401) {
+ psxException(0x400, 0);
+ pending_exception = 1;
+ }
+}
+
void gen_interupt()
{
evprintf(" +ge %08x, %u->%u\n", psxRegs.pc, psxRegs.cycle, next_interupt);
psxRegs.cycle += 2;
#endif
- psxBranchTest();
+ irq_test();
+ //psxBranchTest();
+ //pending_exception = 1;
schedule_timeslice();
evprintf(" -ge %08x, %u->%u (%d)\n", psxRegs.pc, psxRegs.cycle,
next_interupt, next_interupt - psxRegs.cycle);
-
- pending_exception = 1; /* FIXME */
}
void MTC0_()
void check_interupt()
{
+ /* FIXME (also asm) */
printf("ari64_check_interupt\n");
}
+void new_dyna_save(void)
+{
+ // psxRegs.intCycle is always maintained, no need to convert
+}
+
+void new_dyna_restore(void)
+{
+ int i;
+ for (i = 0; i < PSXINT_NEWDRC_CHECK; i++)
+ event_cycles[i] = psxRegs.intCycle[i].sCycle + psxRegs.intCycle[i].cycle;
+}
+
void *gte_handlers[64];
/* from gte.txt.. not sure if this is any good. */
R3000Acpu psxRec = {
ari64_init,
ari64_reset,
-#if 1
+#if defined(__arm__)
ari64_execute,
ari64_execute,
#else
fclose(f1);
}
+static u32 memcheck_read(u32 a)
+{
+ if ((a >> 16) == 0x1f80)
+ // scratchpad/IO
+ return *(u32 *)(psxH + (a & 0xfffc));
+
+ if ((a >> 16) == 0x1f00)
+ // parallel
+ return *(u32 *)(psxP + (a & 0xfffc));
+
+// if ((a & ~0xe0600000) < 0x200000)
+ // RAM
+ return *(u32 *)(psxM + (a & 0x1ffffc));
+}
+
void do_insn_trace(void)
{
static psxRegisters oldregs;
static u32 old_io_data = 0xbad0c0de;
u32 *allregs_p = (void *)&psxRegs;
u32 *allregs_o = (void *)&oldregs;
- u32 *io_data;
+ u32 io_data;
int i;
u8 byte;
fwrite(&last_io_addr, 1, 4, f);
old_io_addr = last_io_addr;
}
- io_data = (void *)(psxM + (last_io_addr&0x1ffffc));
- if (old_io_data != *io_data) {
+ io_data = memcheck_read(last_io_addr);
+ if (old_io_data != io_data) {
byte = 0xfe;
fwrite(&byte, 1, 1, f);
- fwrite(io_data, 1, 4, f);
- old_io_data = *io_data;
+ fwrite(&io_data, 1, 4, f);
+ old_io_data = io_data;
}
byte = 0xff;
fwrite(&byte, 1, 1, f);
}
psxRegs.code = rregs.code; // don't care
-psxRegs.cycle = rregs.cycle;
-psxRegs.CP0.r[9] = rregs.CP0.r[9]; // Count
+ psxRegs.cycle = rregs.cycle;
+ psxRegs.CP0.r[9] = rregs.CP0.r[9]; // Count
//if (psxRegs.cycle == 166172) breakme();
-//if (psxRegs.cycle > 11296376) printf("pc=%08x %u %08x\n", psxRegs.pc, psxRegs.cycle, psxRegs.interrupt);
-
- mem_addr &= 0x1ffffc;
if (memcmp(&psxRegs, &rregs, offsetof(psxRegisters, intCycle)) == 0 &&
- mem_val == *(u32 *)(psxM + mem_addr)
+ mem_val == memcheck_read(mem_addr)
) {
failcount = 0;
goto ok;
}
}
- if (mem_val != *(u32 *)(psxM + mem_addr)) {
- printf("bad mem @%08x: %08x %08x\n", mem_addr, *(u32 *)(psxM + mem_addr), mem_val);
+ if (mem_val != memcheck_read(mem_addr)) {
+ printf("bad mem @%08x: %08x %08x\n", mem_addr, memcheck_read(mem_addr), mem_val);
goto end;
}