#define evprintf(...)
char invalid_code[0x100000];
+static u32 scratch_buf[8*8*2] __attribute__((aligned(64)));
u32 event_cycles[PSXINT_COUNT];
static void schedule_timeslice(void)
{
extern void (*psxCP2[64])();
extern void psxNULL();
+ extern u_char *out;
size_t i;
new_dynarec_init();
#endif
psxH_ptr = psxH;
zeromem_ptr = zero_mem;
+ scratch_buf_ptr = scratch_buf;
+
+ SysPrintf("Mapped (RAM/scrp/ROM/LUTs/TC):\n");
+ SysPrintf("%08x/%08x/%08x/%08x/%08x\n",
+ psxM, psxH, psxR, mem_rtab, out);
return 0;
}
static void ari64_shutdown()
{
new_dynarec_cleanup();
+ new_dyna_pcsx_mem_shutdown();
}
extern void intExecute();
void *psxH_ptr;
void *zeromem_ptr;
u8 zero_mem[0x1000];
+u_char *out;
+void *mem_rtab;
+void *scratch_buf_ptr;
void new_dynarec_init() { (void)ari64_execute; }
void new_dyna_start() {}
void new_dynarec_cleanup() {}
void new_dyna_pcsx_mem_init(void) {}
void new_dyna_pcsx_mem_reset(void) {}
void new_dyna_pcsx_mem_load_state(void) {}
+void new_dyna_pcsx_mem_shutdown(void) {}
#endif
#ifdef DRC_DBG