#endif
.macro load_varadr reg var
-#if defined(__ARM_ARCH_7A__) && !defined(__PIC__)
+#if defined(HAVE_ARMV7) && !defined(__PIC__)
movw \reg, #:lower16:\var
movt \reg, #:upper16:\var
-#elif defined(__ARM_ARCH_7A__) && defined(__MACH__)
+#elif defined(HAVE_ARMV7) && defined(__MACH__)
movw \reg, #:lower16:(\var-(1678f+8))
movt \reg, #:upper16:(\var-(1678f+8))
1678:
.endm
.macro load_varadr_ext reg var
-#if defined(__ARM_ARCH_7A__) && defined(__MACH__) && defined(__PIC__)
+#if defined(HAVE_ARMV7) && defined(__MACH__) && defined(__PIC__)
movw \reg, #:lower16:(ptr_\var-(1678f+8))
movt \reg, #:upper16:(ptr_\var-(1678f+8))
1678:
.endm
.macro mov_16 reg imm
-#ifdef __ARM_ARCH_7A__
+#ifdef HAVE_ARMV7
movw \reg, #\imm
#else
mov \reg, #(\imm & 0x00ff)
.endm
.macro mov_24 reg imm
-#ifdef __ARM_ARCH_7A__
+#ifdef HAVE_ARMV7
movw \reg, #(\imm & 0xffff)
movt \reg, #(\imm >> 16)
#else
1:
movs r4, r5
beq 2f
- ldr r3, [r5]
- ldr r5, [r4, #12]
+ ldr r3, [r5] /* ll_entry .vaddr */
+ ldrd r4, r5, [r4, #8] /* ll_entry .next, .addr */
teq r3, r0
bne 1b
- ldr r3, [r4, #4]
- ldr r4, [r4, #8]
- tst r3, r3
- bne 1b
teq r4, r6
moveq pc, r4 /* Stale i-cache */
mov r8, r4
FUNCTION(jump_handler_read16):
add r1, #0x1000/4*4 @ shift to r16 part
- pcsx_read_mem ldrbcc, 1
+ pcsx_read_mem ldrhcc, 1
FUNCTION(jump_handler_read32):
pcsx_read_mem ldrcc, 2