.size interrupt, 4
intCycle = interrupt + 4
.type intCycle, %object
- .size intCycle, 128
-psxRegs_end = intCycle + 128
+ .size intCycle, 256
+psxRegs_end = intCycle + 256
/* nd_pcsx_io */
nd_pcsx_io = psxRegs_end
.global ari_write_ram_mirror8
.global ari_write_ram_mirror16
.global ari_write_ram_mirror32
+.global ari_read_bios8
+.global ari_read_bios16
+.global ari_read_bios32
.global ari_read_io8
.global ari_read_io16
.global ari_read_io32
ari_write_ram_mirror (3<<11), word, str
+.macro ari_read_bios_mirror bic_const op
+ ldr r0, [fp, #address-dynarec_local]
+ orr r0, r0, #0x80000000
+ bic r0, r0, #(0x20000000|\bic_const) @ map to 0x9fc...
+ \op r0, [r0]
+ str r0, [fp, #readmem_dword-dynarec_local]
+ mov pc, lr
+.endm
+
+ari_read_bios8:
+ ari_read_bios_mirror 0, ldrb
+
+ari_read_bios16:
+ ari_read_bios_mirror 1, ldrh
+
+ari_read_bios32:
+ ari_read_bios_mirror 3, ldr
+
+
@ for testing
.macro ari_read_io_old tab_shift
str lr, [sp, #-8]! @ EABI alignment..
.endm
ari_write_io8:
- ari_write_io ldrb, strb, byte, tab_write8, 2
+ @ PCSX always writes to psxH, so do we for consistency
+ ldr r0, [fp, #address-dynarec_local]
+ ldr r3, [fp, #psxH_ptr-dynarec_local]
+ ldrb r1, [fp, #byte-dynarec_local]
+ bic r2, r0, #0x1f800000
+ ldr r12,[fp, #tab_write8-dynarec_local]
+ strb r1, [r2, r3]
+ subs r3, r2, #0x1000
+ movlo pc, lr
+@ ari_write_io_old 2
+ cmp r3, #0x880
+ movhs pc, lr
+ ldr r12,[r12, r3, lsl #2]
+ mov r0, r1
+ tst r12,r12
+ bxne r12
+ mov pc, lr
ari_write_io16:
ari_write_io ldrh, strh, hword, tab_write16, 1