*/
#include "psxcounters.h"
+#include "psxevents.h"
#include "gpu.h"
//#include "debug.h"
#define DebugVSync()
enum
{
- Rc0Gate = 0x0001, // 0 not implemented
- Rc1Gate = 0x0001, // 0 not implemented
- Rc2Disable = 0x0001, // 0 partially implemented
- RcUnknown1 = 0x0002, // 1 ?
- RcUnknown2 = 0x0004, // 2 ?
+ RcSyncModeEnable = 0x0001, // 0
+ Rc01BlankPause = 0 << 1, // 1,2
+ Rc01UnblankReset = 1 << 1, // 1,2
+ Rc01UnblankReset2 = 2 << 1, // 1,2
+ Rc2Stop = 0 << 1, // 1,2
+ Rc2Stop2 = 3 << 1, // 1,2
RcCountToTarget = 0x0008, // 3
RcIrqOnTarget = 0x0010, // 4
RcIrqOnOverflow = 0x0020, // 5
static const u32 CountToOverflow = 0;
static const u32 CountToTarget = 1;
-static const u32 FrameRate[] = { 60, 50 };
-static const u32 HSyncTotal[] = { 263, 314 }; // actually one more on odd lines for PAL
-#define VBlankStart 240
+static const u32 HSyncTotal[] = { 263, 314 };
+#define VBlankStart 240 // todo: depend on the actual GPU setting
#define VERBOSE_LEVEL 0
/******************************************************************************/
+static inline
+u32 lineCycles(void)
+{
+ if (Config.PsxType)
+ return PSXCLK / 50 / HSyncTotal[1];
+ else
+ return PSXCLK / 60 / HSyncTotal[0];
+}
+
static inline
void setIrq( u32 irq )
{
static inline
void _psxRcntWcount( u32 index, u32 value )
{
- if( value > 0xffff )
- {
- verboseLog( 1, "[RCNT %i] wcount > 0xffff: %x\n", index, value );
- value &= 0xffff;
- }
+ value &= 0xffff;
rcnts[index].cycleStart = psxRegs.cycle;
rcnts[index].cycleStart -= value * rcnts[index].rate;
case 1:
if( value & Rc1HSyncClock )
{
- rcnts[index].rate = (PSXCLK / (FrameRate[Config.PsxType] * HSyncTotal[Config.PsxType]));
+ rcnts[index].rate = lineCycles();
}
else
{
}
// TODO: wcount must work.
- if( value & Rc2Disable )
+ if( (value & 7) == (RcSyncModeEnable | Rc2Stop) ||
+ (value & 7) == (RcSyncModeEnable | Rc2Stop2) )
{
rcnts[index].rate = 0xffffffff;
}
}
}
- psxRegs.interrupt |= (1 << PSXINT_RCNT);
- new_dyna_set_event(PSXINT_RCNT, psxNextCounter);
+ set_event(PSXINT_RCNT, psxNextCounter);
}
/******************************************************************************/
void psxRcntUpdate()
{
- u32 cycle;
+ u32 cycle, cycles_passed;
cycle = psxRegs.cycle;
// rcnt 0.
- while( cycle - rcnts[0].cycleStart >= rcnts[0].cycle )
+ cycles_passed = cycle - rcnts[0].cycleStart;
+ while( cycles_passed >= rcnts[0].cycle )
{
- psxRcntReset( 0 );
+ if (((rcnts[0].mode & 7) == (RcSyncModeEnable | Rc01UnblankReset) ||
+ (rcnts[0].mode & 7) == (RcSyncModeEnable | Rc01UnblankReset2))
+ && cycles_passed > lineCycles())
+ {
+ u32 q = cycles_passed / (lineCycles() + 1u);
+ rcnts[0].cycleStart += q * lineCycles();
+ break;
+ }
+ else
+ psxRcntReset( 0 );
+
+ cycles_passed = cycle - rcnts[0].cycleStart;
}
// rcnt 1.
}
HW_GPU_STATUS = SWAP32(status);
GPU_vBlank(0, field);
+ if ((s32)(psxRegs.gpuIdleAfter - psxRegs.cycle) < 0)
+ psxRegs.gpuIdleAfter = psxRegs.cycle - 1; // prevent overflow
+
+ if ((rcnts[0].mode & 7) == (RcSyncModeEnable | Rc01UnblankReset) ||
+ (rcnts[0].mode & 7) == (RcSyncModeEnable | Rc01UnblankReset2))
+ {
+ rcnts[0].cycleStart = rcnts[3].cycleStart;
+ }
+
+ if ((rcnts[1].mode & 7) == (RcSyncModeEnable | Rc01UnblankReset) ||
+ (rcnts[1].mode & 7) == (RcSyncModeEnable | Rc01UnblankReset2))
+ {
+ rcnts[1].cycleStart = rcnts[3].cycleStart;
+ }
+ else if (rcnts[1].mode & Rc1HSyncClock)
+ {
+ // adjust to remove the rounding error
+ _psxRcntWcount(1, (psxRegs.cycle - rcnts[1].cycleStart) / rcnts[1].rate);
+ }
}
scheduleRcntBase();
/******************************************************************************/
-u32 psxRcntRcount( u32 index )
+u32 psxRcntRcount0()
+{
+ u32 index = 0;
+ u32 count;
+
+ if ((rcnts[0].mode & 7) == (RcSyncModeEnable | Rc01UnblankReset) ||
+ (rcnts[0].mode & 7) == (RcSyncModeEnable | Rc01UnblankReset2))
+ {
+ count = psxRegs.cycle - rcnts[index].cycleStart;
+ //count = ((16u * count) % (16u * PSXCLK / 60 / 263)) / 16u;
+ count = count % lineCycles();
+ rcnts[index].cycleStart = psxRegs.cycle - count;
+ }
+ else
+ count = _psxRcntRcount( index );
+
+ verboseLog( 2, "[RCNT 0] rcount: %04x m: %04x\n", count, rcnts[index].mode);
+
+ return count;
+}
+
+u32 psxRcntRcount1()
+{
+ u32 index = 1;
+ u32 count;
+
+ count = _psxRcntRcount( index );
+
+ verboseLog( 2, "[RCNT 1] rcount: %04x m: %04x\n", count, rcnts[index].mode);
+
+ return count;
+}
+
+u32 psxRcntRcount2()
{
+ u32 index = 2;
u32 count;
count = _psxRcntRcount( index );
- verboseLog( 2, "[RCNT %i] rcount: %x\n", index, count );
+ verboseLog( 2, "[RCNT 2] rcount: %04x m: %04x\n", count, rcnts[index].mode);
return count;
}
// rcnt base.
rcnts[3].rate = 1;
- rcnts[3].mode = RcCountToTarget;
- rcnts[3].target = (PSXCLK / (FrameRate[Config.PsxType] * HSyncTotal[Config.PsxType]));
for( i = 0; i < CounterQuantity; ++i )
{
hSyncCount = 0;
hsync_steps = 1;
+ scheduleRcntBase();
psxRcntSet();
}
if (Mode == 0)
{
- // don't trust things from a savestate
rcnts[3].rate = 1;
- for( i = 0; i < CounterQuantity; ++i )
+ for( i = 0; i < CounterQuantity - 1; ++i )
{
_psxRcntWmode( i, rcnts[i].mode );
count = (psxRegs.cycle - rcnts[i].cycleStart) / rcnts[i].rate;
- _psxRcntWcount( i, count );
+ if (count > 0x1000)
+ _psxRcntWcount( i, count & 0xffff );
}
scheduleRcntBase();
psxRcntSet();