new_dyna_set_event(PSXINT_GPUOTCDMA, eCycle); \
}
+#define CDRDMA_INT(eCycle) { \
+ psxRegs.interrupt |= (1 << PSXINT_CDRDMA); \
+ psxRegs.intCycle[PSXINT_CDRDMA].cycle = eCycle; \
+ psxRegs.intCycle[PSXINT_CDRDMA].sCycle = psxRegs.cycle; \
+ new_dyna_set_event(PSXINT_CDRDMA, eCycle); \
+}
+
void psxDma2(u32 madr, u32 bcr, u32 chcr);
void psxDma3(u32 madr, u32 bcr, u32 chcr);
void psxDma4(u32 madr, u32 bcr, u32 chcr);
void spuInterrupt();
void gpuotcInterrupt();
+static inline void *getDmaRam(u32 madr, u32 *max_words)
+{
+ // this should wrap instead of limit
+ if (!(madr & 0x800000)) {
+ madr &= 0x1ffffc;
+ *max_words = (0x200000 - madr) / 4;
+ return psxM + madr;
+ }
+ return INVALID_PTR;
+}
+
#ifdef __cplusplus
}
#endif