cdrLidSeekInterrupt();
}
}
+ if (psxRegs.interrupt & (1 << PSXINT_SPU_UPDATE)) { // scheduled spu update
+ if ((psxRegs.cycle - psxRegs.intCycle[PSXINT_SPU_UPDATE].sCycle) >= psxRegs.intCycle[PSXINT_SPU_UPDATE].cycle) {
+ psxRegs.interrupt &= ~(1 << PSXINT_SPU_UPDATE);
+ spuUpdate();
+ }
+ }
}
if (psxHu32(0x1070) & psxHu32(0x1074)) {