// if we don't have BIOS set, perform it's work here.
// MSH2
if (p32x_bios_m == NULL) {
- unsigned int idl_src, idl_dst, idl_size; // initial data load
- unsigned int vbr;
+ sh2_set_gbr(0, 0x20004000);
- // initial data
- idl_src = HWSWAP(*(unsigned int *)(Pico.rom + 0x3d4)) & ~0xf0000000;
- idl_dst = HWSWAP(*(unsigned int *)(Pico.rom + 0x3d8)) & ~0xf0000000;
- idl_size= HWSWAP(*(unsigned int *)(Pico.rom + 0x3dc));
- if (idl_size > Pico.romsize || idl_src + idl_size > Pico.romsize ||
- idl_size > 0x40000 || idl_dst + idl_size > 0x40000 || (idl_src & 3) || (idl_dst & 3)) {
- elprintf(EL_STATUS|EL_ANOMALY, "32x: invalid initial data ptrs: %06x -> %06x, %06x",
- idl_src, idl_dst, idl_size);
- }
- else
- memcpy(Pico32xMem->sdram + idl_dst, Pico.rom + idl_src, idl_size);
+ if (!(PicoAHW & PAHW_MCD)) {
+ unsigned int idl_src, idl_dst, idl_size; // initial data load
+ unsigned int vbr;
+
+ // initial data
+ idl_src = HWSWAP(*(unsigned int *)(Pico.rom + 0x3d4)) & ~0xf0000000;
+ idl_dst = HWSWAP(*(unsigned int *)(Pico.rom + 0x3d8)) & ~0xf0000000;
+ idl_size= HWSWAP(*(unsigned int *)(Pico.rom + 0x3dc));
+ if (idl_size > Pico.romsize || idl_src + idl_size > Pico.romsize ||
+ idl_size > 0x40000 || idl_dst + idl_size > 0x40000 || (idl_src & 3) || (idl_dst & 3)) {
+ elprintf(EL_STATUS|EL_ANOMALY, "32x: invalid initial data ptrs: %06x -> %06x, %06x",
+ idl_src, idl_dst, idl_size);
+ }
+ else
+ memcpy(Pico32xMem->sdram + idl_dst, Pico.rom + idl_src, idl_size);
- // GBR/VBR
- vbr = HWSWAP(*(unsigned int *)(Pico.rom + 0x3e8));
- sh2_set_gbr(0, 0x20004000);
- sh2_set_vbr(0, vbr);
+ // VBR
+ vbr = HWSWAP(*(unsigned int *)(Pico.rom + 0x3e8));
+ sh2_set_vbr(0, vbr);
- // checksum and M_OK
- Pico32x.regs[0x28 / 2] = *(unsigned short *)(Pico.rom + 0x18e);
+ // checksum and M_OK
+ Pico32x.regs[0x28 / 2] = *(unsigned short *)(Pico.rom + 0x18e);
+ }
// program will set M_OK
}
void PicoReset32x(void)
{
if (PicoAHW & PAHW_32X) {
- msh2.m68krcycles_done = ssh2.m68krcycles_done = SekCyclesDone();
p32x_trigger_irq(NULL, SekCyclesDone(), P32XI_VRES);
p32x_sh2_poll_event(&msh2, SH2_IDLE_STATES, 0);
p32x_sh2_poll_event(&ssh2, SH2_IDLE_STATES, 0);
// XXX: no proper handling of 32col mode..
if ((Pico32x.vdp_regs[0] & P32XV_Mx) != 0 && // 32x not blanking
(Pico.video.reg[12] & 1) && // 40col mode
- (PicoDrawMask & PDRAW_32X_ON))
+ (!(Pico.video.debug_p & PVD_KILL_32X)))
{
int md_bg = Pico.video.reg[7] & 0x3f;
p32x_sh2_poll_event(&msh2, SH2_STATE_VPOLL, 0);
p32x_sh2_poll_event(&ssh2, SH2_STATE_VPOLL, 0);
+ if (PicoAHW & PAHW_MCD)
+ pcd_prepare_frame();
+
PicoFrameStart();
PicoFrameHints();
sh2_drc_frame();