if (!Pico.m.pal)
Pico32x.vdp_regs[0] |= P32XV_nPAL;
- PREG8(msh2.peri_regs, 4) =
- PREG8(ssh2.peri_regs, 4) = 0x84; // SCI SSR
-
rendstatus_old = -1;
emu_32x_startup();
sh2_reset(&msh2);
sh2_reset(&ssh2);
+ sh2_peripheral_reset(&msh2);
+ sh2_peripheral_reset(&ssh2);
// if we don't have BIOS set, perform it's work here.
// MSH2
memset(&Pico32x, 0, sizeof(Pico32x));
Pico32x.regs[0] = P32XS_REN|P32XS_nRES; // verified
- Pico32x.vdp_regs[0x0a/2] = P32XV_VBLK|P32XV_HBLK|P32XV_PEN;
+ Pico32x.vdp_regs[0x0a/2] = P32XV_VBLK|P32XV_PEN;
Pico32x.sh2_regs[0] = P32XS2_ADEN;
}
void PicoReset32x(void)
{
if (PicoAHW & PAHW_32X) {
+ msh2.m68krcycles_done = ssh2.m68krcycles_done = SekCyclesDoneT();
Pico32x.sh2irqs |= P32XI_VRES;
p32x_update_irls(NULL, SekCyclesDoneT2());
p32x_sh2_poll_event(&msh2, SH2_IDLE_STATES, 0);
pevt_log_sh2_o(sh2, EVT_RUN_START);
sh2->state |= SH2_STATE_RUN;
cycles = C_M68K_TO_SH2(*sh2, m68k_cycles);
- elprintf(EL_32X, "%csh2 +run %u %d",
- sh2->is_slave?'s':'m', sh2->m68krcycles_done, cycles);
+ elprintf(EL_32X, "%csh2 +run %u %d @%08x",
+ sh2->is_slave?'s':'m', sh2->m68krcycles_done, cycles, sh2->pc);
done = sh2_execute(sh2, cycles);