void PicoWriteS68k16_dec_m2b1(u32 a, u32 d);\r
#endif\r
\r
-static void remap_prg_window(int r3);\r
-static void remap_word_ram(int r3);\r
+static void remap_prg_window(u32 r1, u32 r3);\r
+static void remap_word_ram(u32 r3);\r
\r
// poller detection\r
#define POLL_LIMIT 16\r
#ifndef _ASM_CD_MEMORY_C\r
static u32 m68k_reg_read16(u32 a)\r
{\r
- u32 d=0;\r
+ u32 d = 0;\r
a &= 0x3e;\r
\r
switch (a) {\r
case 0:\r
- d = ((Pico_mcd->s68k_regs[0x33]<<13)&0x8000) | Pico_mcd->m.busreq; // here IFL2 is always 0, just like in Gens\r
+ // here IFL2 is always 0, just like in Gens\r
+ d = ((Pico_mcd->s68k_regs[0x33] << 13) & 0x8000)\r
+ | Pico_mcd->m.busreq;\r
goto end;\r
case 2:\r
d = (Pico_mcd->s68k_regs[a]<<8) | (Pico_mcd->s68k_regs[a+1]&0xc7);\r
return;\r
case 1:\r
d &= 3;\r
- elprintf(EL_CDREGS, "d m.busreq %u %u", d, Pico_mcd->m.busreq);\r
- if (d == Pico_mcd->m.busreq)\r
+ dold = Pico_mcd->m.busreq;\r
+ if (!(d & 1))\r
+ d |= 2; // verified: can't release bus on reset\r
+ if (dold == d)\r
return;\r
+\r
pcd_sync_s68k(SekCyclesDone(), 0);\r
\r
- if ((Pico_mcd->m.busreq ^ d) & 1) {\r
+ if ((dold ^ d) & 1)\r
elprintf(EL_INTSW, "m68k: s68k reset %i", !(d&1));\r
- if (!(d & 1))\r
- d |= 2; // verified: reset also gives bus\r
- else {\r
- elprintf(EL_CDREGS, "m68k: resetting s68k");\r
- SekResetS68k();\r
- }\r
+ if (!(d & 1))\r
+ Pico_mcd->m.state_flags |= PCD_ST_S68K_RST;\r
+ else if (d == 1 && (Pico_mcd->m.state_flags & PCD_ST_S68K_RST)) {\r
+ Pico_mcd->m.state_flags &= ~PCD_ST_S68K_RST;\r
+ elprintf(EL_CDREGS, "m68k: resetting s68k");\r
+ SekResetS68k();\r
}\r
- if ((Pico_mcd->m.busreq ^ d) & 2) {\r
+ if ((dold ^ d) & 2) {\r
elprintf(EL_INTSW, "m68k: s68k brq %i", d >> 1);\r
- remap_prg_window(Pico_mcd->s68k_regs[3]);\r
+ remap_prg_window(d, Pico_mcd->s68k_regs[3]);\r
}\r
Pico_mcd->m.busreq = d;\r
return;\r
if ((d ^ dold) & 0xc0) {\r
elprintf(EL_CDREGS, "m68k: prg bank: %i -> %i",\r
(Pico_mcd->s68k_regs[a]>>6), ((d>>6)&3));\r
- remap_prg_window(d);\r
+ remap_prg_window(Pico_mcd->m.busreq, d);\r
}\r
\r
// 2M mode state is tracked regardless of current mode\r
((u16 *)Pico_mcd->bios)[0x70/2], ((u16 *)Pico_mcd->bios)[0x72/2]);\r
return;\r
case 0x0f:\r
- d = (d << 1) | ((d >> 7) & 1); // rol8 1 (special case)\r
a = 0x0e;\r
case 0x0e:\r
goto write_comm;\r
Pico_mcd->m.stopwatch_base_c = SekCyclesDoneS68k();\r
return;\r
case 0x0e:\r
- d &= 0xff;\r
- d = (d>>1) | (d<<7); // ror8 1, Gens note: Dragons lair\r
a = 0x0f;\r
case 0x0f:\r
goto write_comm;\r
elprintf(EL_UIO, "s68k unmapped w16 [%06x] %04x @%06x", a, d & 0xffff, SekPc);\r
}\r
\r
-// PRG RAM protected range (000000 - 00ff00)?\r
+// PRG RAM protected range (000000 - 01fdff)?\r
// XXX verify: ff00 or 1fe00 max?\r
static void PicoWriteS68k8_prgwp(u32 a, u32 d)\r
{\r
- if (a >= (Pico_mcd->s68k_regs[2] << 8))\r
+ if (a >= (Pico_mcd->s68k_regs[2] << 9))\r
Pico_mcd->prg_ram[a ^ 1] = d;\r
}\r
\r
static void PicoWriteS68k16_prgwp(u32 a, u32 d)\r
{\r
- if (a >= (Pico_mcd->s68k_regs[2] << 8))\r
+ if (a >= (Pico_mcd->s68k_regs[2] << 9))\r
*(u16 *)(Pico_mcd->prg_ram + a) = d;\r
}\r
\r
\r
// -----------------------------------------------------------------\r
\r
-static void remap_prg_window(int r3)\r
+static void remap_prg_window(u32 r1, u32 r3)\r
{\r
// PRG RAM\r
- if (Pico_mcd->m.busreq & 2) {\r
- void *bank = Pico_mcd->prg_ram_b[r3 >> 6];\r
+ if (r1 & 2) {\r
+ void *bank = Pico_mcd->prg_ram_b[(r3 >> 6) & 3];\r
cpu68k_map_all_ram(0x020000, 0x03ffff, bank, 0);\r
}\r
else {\r
}\r
}\r
\r
-static void remap_word_ram(int r3)\r
+static void remap_word_ram(u32 r3)\r
{\r
void *bank;\r
\r
\r
void pcd_state_loaded_mem(void)\r
{\r
- int r3 = Pico_mcd->s68k_regs[3];\r
+ u32 r3 = Pico_mcd->s68k_regs[3];\r
\r
/* after load events */\r
if (r3 & 4) // 1M mode?\r
wram_2M_to_1M(Pico_mcd->word_ram2M);\r
remap_word_ram(r3);\r
- remap_prg_window(r3);\r
+ remap_prg_window(Pico_mcd->m.busreq, r3);\r
Pico_mcd->m.dmna_ret_2m &= 3;\r
\r
// restore hint vector\r
cpu68k_map_set(s68k_read16_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);\r
cpu68k_map_set(s68k_write8_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);\r
cpu68k_map_set(s68k_write16_map, 0x000000, 0x07ffff, Pico_mcd->prg_ram, 0);\r
- cpu68k_map_set(s68k_write8_map, 0x000000, 0x00ffff, PicoWriteS68k8_prgwp, 1);\r
- cpu68k_map_set(s68k_write16_map, 0x000000, 0x00ffff, PicoWriteS68k16_prgwp, 1);\r
+ cpu68k_map_set(s68k_write8_map, 0x000000, 0x01ffff, PicoWriteS68k8_prgwp, 1);\r
+ cpu68k_map_set(s68k_write16_map, 0x000000, 0x01ffff, PicoWriteS68k16_prgwp, 1);\r
\r
// BRAM\r
cpu68k_map_set(s68k_read8_map, 0xfe0000, 0xfeffff, PicoReadS68k8_bram, 1);\r