-// This is part of Pico Library\r
-\r
-// (c) Copyright 2004 Dave, All rights reserved.\r
-// (c) Copyright 2006-2009 notaz, All rights reserved.\r
-// Free for non-commercial use.\r
-\r
-// For commercial use, separate licencing terms must be obtained.\r
-\r
+/*\r
+ * memory handling\r
+ * (c) Copyright Dave, 2004\r
+ * (C) notaz, 2006-2010\r
+ *\r
+ * This work is licensed under the terms of MAME license.\r
+ * See COPYING file in the top-level directory.\r
+ */\r
\r
#include "pico_int.h"\r
#include "memory.h"\r
static void xmap_set(uptr *map, int shift, int start_addr, int end_addr,\r
const void *func_or_mh, int is_func)\r
{\r
+#ifdef __clang__\r
+ // workaround bug (segfault) in \r
+ // Apple LLVM version 4.2 (clang-425.0.27) (based on LLVM 3.2svn)\r
+ volatile \r
+#endif\r
uptr addr = (uptr)func_or_mh;\r
int mask = (1 << shift) - 1;\r
int i;\r
for (i = start_addr >> shift; i <= end_addr >> shift; i++) {\r
map[i] = addr >> 1;\r
if (is_func)\r
- map[i] |= (uptr)1 << (sizeof(addr) * 8 - 1);\r
+ map[i] |= MAP_FLAG;\r
}\r
}\r
\r
\r
void m68k_map_unmap(int start_addr, int end_addr)\r
{\r
+#ifdef __clang__\r
+ // workaround bug (segfault) in \r
+ // Apple LLVM version 4.2 (clang-425.0.27) (based on LLVM 3.2svn)\r
+ volatile \r
+#endif\r
uptr addr;\r
int shift = M68K_MEM_SHIFT;\r
int i;\r
\r
addr = (uptr)m68k_unmapped_read8;\r
for (i = start_addr >> shift; i <= end_addr >> shift; i++)\r
- m68k_read8_map[i] = (addr >> 1) | (1 << 31);\r
+ m68k_read8_map[i] = (addr >> 1) | MAP_FLAG;\r
\r
addr = (uptr)m68k_unmapped_read16;\r
for (i = start_addr >> shift; i <= end_addr >> shift; i++)\r
- m68k_read16_map[i] = (addr >> 1) | (1 << 31);\r
+ m68k_read16_map[i] = (addr >> 1) | MAP_FLAG;\r
\r
addr = (uptr)m68k_unmapped_write8;\r
for (i = start_addr >> shift; i <= end_addr >> shift; i++)\r
- m68k_write8_map[i] = (addr >> 1) | (1 << 31);\r
+ m68k_write8_map[i] = (addr >> 1) | MAP_FLAG;\r
\r
addr = (uptr)m68k_unmapped_write16;\r
for (i = start_addr >> shift; i <= end_addr >> shift; i++)\r
- m68k_write16_map[i] = (addr >> 1) | (1 << 31);\r
+ m68k_write16_map[i] = (addr >> 1) | MAP_FLAG;\r
}\r
\r
MAKE_68K_READ8(m68k_read8, m68k_read8_map)\r
#if defined(EMU_C68K)\r
void cyclone_crashed(u32 pc, struct Cyclone *context)\r
{\r
- elprintf(EL_STATUS|EL_ANOMALY, "%c68k crash detected @ %06x\n",\r
+ elprintf(EL_STATUS|EL_ANOMALY, "%c68k crash detected @ %06x",\r
context == &PicoCpuCM68k ? 'm' : 's', pc);\r
context->membase = (u32)Pico.rom;\r
context->pc = (u32)Pico.rom + Pico.romsize;\r
// -----------------------------------------------------------------\r
// memmap helpers\r
\r
-#ifndef _ASM_MEMORY_C\r
-static\r
-#endif\r
-int PadRead(int i)\r
+static u32 read_pad_3btn(int i, u32 out_bits)\r
{\r
- int pad,value,data_reg;\r
- pad=~PicoPadInt[i]; // Get inverse of pad MXYZ SACB RLDU\r
- data_reg=Pico.ioports[i+1];\r
+ u32 pad = ~PicoPadInt[i]; // Get inverse of pad MXYZ SACB RLDU\r
+ u32 value;\r
\r
- // orr the bits, which are set as output\r
- value = data_reg&(Pico.ioports[i+4]|0x80);\r
+ if (out_bits & 0x40) // TH\r
+ value = pad & 0x3f; // ?1CB RLDU\r
+ else\r
+ value = ((pad & 0xc0) >> 2) | (pad & 3); // ?0SA 00DU\r
\r
- if (PicoOpt & POPT_6BTN_PAD)\r
- {\r
- int phase = Pico.m.padTHPhase[i];\r
-\r
- if(phase == 2 && !(data_reg&0x40)) { // TH\r
- value|=(pad&0xc0)>>2; // ?0SA 0000\r
- return value;\r
- } else if(phase == 3) {\r
- if(data_reg&0x40)\r
- value|=(pad&0x30)|((pad>>8)&0xf); // ?1CB MXYZ\r
- else\r
- value|=((pad&0xc0)>>2)|0x0f; // ?0SA 1111\r
- return value;\r
- }\r
+ value |= out_bits & 0x40;\r
+ return value;\r
+}\r
+\r
+static u32 read_pad_6btn(int i, u32 out_bits)\r
+{\r
+ u32 pad = ~PicoPadInt[i]; // Get inverse of pad MXYZ SACB RLDU\r
+ int phase = Pico.m.padTHPhase[i];\r
+ u32 value;\r
+\r
+ if (phase == 2 && !(out_bits & 0x40)) {\r
+ value = (pad & 0xc0) >> 2; // ?0SA 0000\r
+ goto out;\r
+ }\r
+ else if(phase == 3) {\r
+ if (out_bits & 0x40)\r
+ return (pad & 0x30) | ((pad >> 8) & 0xf); // ?1CB MXYZ\r
+ else\r
+ return ((pad & 0xc0) >> 2) | 0x0f; // ?0SA 1111\r
+ goto out;\r
}\r
\r
- if(data_reg&0x40) // TH\r
- value|=(pad&0x3f); // ?1CB RLDU\r
- else value|=((pad&0xc0)>>2)|(pad&3); // ?0SA 00DU\r
+ if (out_bits & 0x40) // TH\r
+ value = pad & 0x3f; // ?1CB RLDU\r
+ else\r
+ value = ((pad & 0xc0) >> 2) | (pad & 3); // ?0SA 00DU\r
\r
- return value; // will mirror later\r
+out:\r
+ value |= out_bits & 0x40;\r
+ return value;\r
}\r
\r
-#ifndef _ASM_MEMORY_C\r
+static u32 read_nothing(int i, u32 out_bits)\r
+{\r
+ return 0xff;\r
+}\r
+\r
+typedef u32 (port_read_func)(int index, u32 out_bits);\r
+\r
+static port_read_func *port_readers[3] = {\r
+ read_pad_3btn,\r
+ read_pad_3btn,\r
+ read_nothing\r
+};\r
\r
-static u32 io_ports_read(u32 a)\r
+static NOINLINE u32 port_read(int i)\r
+{\r
+ u32 data_reg = Pico.ioports[i + 1];\r
+ u32 ctrl_reg = Pico.ioports[i + 4] | 0x80;\r
+ u32 in, out;\r
+\r
+ out = data_reg & ctrl_reg;\r
+ out |= 0x7f & ~ctrl_reg; // pull-ups\r
+\r
+ in = port_readers[i](i, out);\r
+\r
+ return (in & ~ctrl_reg) | (data_reg & ctrl_reg);\r
+}\r
+\r
+void PicoSetInputDevice(int port, enum input_device device)\r
+{\r
+ port_read_func *func;\r
+\r
+ if (port < 0 || port > 2)\r
+ return;\r
+\r
+ switch (device) {\r
+ case PICO_INPUT_PAD_3BTN:\r
+ func = read_pad_3btn;\r
+ break;\r
+\r
+ case PICO_INPUT_PAD_6BTN:\r
+ func = read_pad_6btn;\r
+ break;\r
+\r
+ default:\r
+ func = read_nothing;\r
+ break;\r
+ }\r
+\r
+ port_readers[port] = func;\r
+}\r
+\r
+NOINLINE u32 io_ports_read(u32 a)\r
{\r
u32 d;\r
a = (a>>1) & 0xf;\r
switch (a) {\r
case 0: d = Pico.m.hardware; break; // Hardware value (Version register)\r
- case 1: d = PadRead(0); break;\r
- case 2: d = PadRead(1); break;\r
+ case 1: d = port_read(0); break;\r
+ case 2: d = port_read(1); break;\r
+ case 3: d = port_read(2); break;\r
default: d = Pico.ioports[a]; break; // IO ports can be used as RAM\r
}\r
return d;\r
}\r
\r
-static void NOINLINE io_ports_write(u32 a, u32 d)\r
+NOINLINE void io_ports_write(u32 a, u32 d)\r
{\r
a = (a>>1) & 0xf;\r
\r
// 6 button gamepad: if TH went from 0 to 1, gamepad changes state\r
- if (1 <= a && a <= 2 && (PicoOpt & POPT_6BTN_PAD))\r
+ if (1 <= a && a <= 2)\r
{\r
Pico.m.padDelay[a - 1] = 0;\r
if (!(Pico.ioports[a] & 0x40) && (d & 0x40))\r
Pico.ioports[a] = d;\r
}\r
\r
-#endif // _ASM_MEMORY_C\r
+// lame..\r
+static int z80_cycles_from_68k(void)\r
+{\r
+ return z80_cycle_aim\r
+ + cycles_68k_to_z80(SekCyclesDone() - last_z80_sync);\r
+}\r
\r
void NOINLINE ctl_write_z80busreq(u32 d)\r
{\r
{\r
if (d)\r
{\r
- z80_cycle_cnt = cycles_68k_to_z80(SekCyclesDone());\r
+ z80_cycle_cnt = z80_cycles_from_68k();\r
}\r
else\r
{\r
- z80stopCycle = SekCyclesDone();\r
if ((PicoOpt&POPT_EN_Z80) && !Pico.m.z80_reset) {\r
pprof_start(m68k);\r
- PicoSyncZ80(z80stopCycle);\r
+ PicoSyncZ80(SekCyclesDone());\r
pprof_end_sub(m68k);\r
}\r
}\r
}\r
else\r
{\r
- z80_cycle_cnt = cycles_68k_to_z80(SekCyclesDone());\r
+ z80_cycle_cnt = z80_cycles_from_68k();\r
z80_reset();\r
}\r
Pico.m.z80_reset = d;\r
static u32 PicoRead16_sram(u32 a)\r
{\r
u32 d;\r
- if (SRam.end >= a && a >= SRam.start && (Pico.m.sram_reg & SRR_MAPPED))\r
+ if (SRam.start <= a && a <= SRam.end && (Pico.m.sram_reg & SRR_MAPPED))\r
{\r
if (SRam.flags & SRF_EEPROM)\r
d = EEPROM_read();\r
\r
// z80 area (0xa00000 - 0xa0ffff)\r
// TODO: verify mirrors VDP and bank reg (bank area mirroring verified)\r
-static u32 PicoRead8_z80(u32 a)\r
+u32 PicoRead8_z80(u32 a)\r
{\r
u32 d = 0xff;\r
if ((Pico.m.z80Run & 1) || Pico.m.z80_reset) {\r
return d | (d << 8);\r
}\r
\r
-static void PicoWrite8_z80(u32 a, u32 d)\r
+void PicoWrite8_z80(u32 a, u32 d)\r
{\r
if ((Pico.m.z80Run & 1) || Pico.m.z80_reset) {\r
// verified on real hw\r
}\r
\r
if ((a & 0x4000) == 0x0000) { // z80 RAM\r
- SekCyclesBurn(2); // hack\r
+ SekCyclesBurnRun(2); // FIXME hack\r
Pico.zram[a & 0x1fff] = (u8)d;\r
return;\r
}\r
int i;\r
// by default, point everything to first 64k of ROM\r
for (i = 0; i < M68K_FETCHBANK1; i++)\r
- PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom - (i<<(24-FAMEC_FETCHBITS));\r
+ PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom - (i<<(24-FAMEC_FETCHBITS));\r
// now real ROM\r
for (i = 0; i < M68K_FETCHBANK1 && (i<<(24-FAMEC_FETCHBITS)) < Pico.romsize; i++)\r
- PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.rom;\r
+ PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.rom;\r
// .. and RAM\r
for (i = M68K_FETCHBANK1*14/16; i < M68K_FETCHBANK1; i++)\r
- PicoCpuFM68k.Fetch[i] = (unsigned int)Pico.ram - (i<<(24-FAMEC_FETCHBITS));\r
+ PicoCpuFM68k.Fetch[i] = (unsigned long)Pico.ram - (i<<(24-FAMEC_FETCHBITS));\r
}\r
#endif\r
#ifdef EMU_M68K\r
timer_a_step = TIMER_A_TICK_ZCYCLES * (1024 - TAnew);\r
if (ym2612.OPN.ST.mode & 1) {\r
// this is not right, should really be done on overflow only\r
- int cycles = is_from_z80 ? z80_cyclesDone() : cycles_68k_to_z80(SekCyclesDone());\r
+ int cycles = is_from_z80 ? z80_cyclesDone() : z80_cycles_from_68k();\r
timer_a_next_oflow = (cycles << 8) + timer_a_step;\r
}\r
elprintf(EL_YMTIMER, "timer a set to %i, %i", 1024 - TAnew, timer_a_next_oflow>>8);\r
//ym2612.OPN.ST.TBT = 0;\r
timer_b_step = TIMER_B_TICK_ZCYCLES * (256 - d); // 262800\r
if (ym2612.OPN.ST.mode & 2) {\r
- int cycles = is_from_z80 ? z80_cyclesDone() : cycles_68k_to_z80(SekCyclesDone());\r
+ int cycles = is_from_z80 ? z80_cyclesDone() : z80_cycles_from_68k();\r
timer_b_next_oflow = (cycles << 8) + timer_b_step;\r
}\r
elprintf(EL_YMTIMER, "timer b set to %i, %i", 256 - d, timer_b_next_oflow>>8);\r
return 0;\r
case 0x27: { /* mode, timer control */\r
int old_mode = ym2612.OPN.ST.mode;\r
- int cycles = is_from_z80 ? z80_cyclesDone() : cycles_68k_to_z80(SekCyclesDone());\r
+ int cycles = is_from_z80 ? z80_cyclesDone() : z80_cycles_from_68k();\r
ym2612.OPN.ST.mode = d;\r
\r
elprintf(EL_YMTIMER, "st mode %02x", d);\r
\r
static u32 ym2612_read_local_68k(void)\r
{\r
- int xcycles = cycles_68k_to_z80(SekCyclesDone()) << 8;\r
+ int xcycles = z80_cycles_from_68k() << 8;\r
\r
ym2612_read_local();\r
\r
elprintf(EL_YMTIMER, "load: %i/%i, timer_b_next_oflow %i", tbt>>16, tbc>>16, timer_b_next_oflow >> 8);\r
}\r
\r
+#if defined(NO_32X) && defined(_ASM_MEMORY_C)\r
+// referenced by asm code\r
+u32 PicoRead8_32x(u32 a) { return 0; }\r
+u32 PicoRead16_32x(u32 a) { return 0; }\r
+void PicoWrite8_32x(u32 a, u32 d) {}\r
+void PicoWrite16_32x(u32 a, u32 d) {}\r
+#endif\r
+\r
// -----------------------------------------------------------------\r
// z80 memhandlers\r
\r
#endif\r
}\r
\r
+// vim:shiftwidth=2:ts=2:expandtab\r