\r
PicoInitMCD();\r
PicoSVPInit();\r
-\r
- SRam.data=0;\r
+ Pico32xInit();\r
}\r
\r
// to be called once on emu exit\r
PicoCartUnload();\r
z80_exit();\r
\r
- if (SRam.data) free(SRam.data); SRam.data=0;\r
+ if (SRam.data)\r
+ free(SRam.data);\r
}\r
\r
void PicoPower(void)\r
{\r
- unsigned char sram_status = Pico.m.sram_status; // must be preserved\r
-\r
Pico.m.frame_count = 0;\r
\r
// clear all memory of the emulated machine\r
if (PicoAHW & PAHW_MCD)\r
PicoPowerMCD();\r
\r
- Pico.m.sram_status = sram_status;\r
+ if (!(PicoOpt & POPT_DIS_32X))\r
+ PicoPower32x();\r
+\r
PicoReset();\r
}\r
\r
\r
int PicoReset(void)\r
{\r
- unsigned char sram_status = Pico.m.sram_status; // must be preserved\r
-\r
if (Pico.romsize <= 0)\r
return 1;\r
\r
if (!(PicoOpt & POPT_DIS_IDLE_DET))\r
SekInitIdleDet();\r
\r
+ if (!(PicoOpt & POPT_DIS_32X)) {\r
+ PicoReset32x();\r
+ return 0;\r
+ }\r
+\r
// reset sram state; enable sram access by default if it doesn't overlap with ROM\r
- Pico.m.sram_status = sram_status & (SRS_DETECTED|SRS_EEPROM);\r
- if (!(Pico.m.sram_status & SRS_EEPROM) && Pico.romsize <= SRam.start)\r
- Pico.m.sram_status |= SRS_MAPPED;\r
+ Pico.m.sram_reg = 0;\r
+ if ((SRam.flags & SRF_EEPROM) || Pico.romsize <= SRam.start)\r
+ Pico.m.sram_reg |= SRR_MAPPED;\r
\r
- elprintf(EL_STATUS, "sram: det: %i; eeprom: %i; start: %06x; end: %06x",\r
- !!(sram_status & SRS_DETECTED), !!(sram_status & SRS_EEPROM), SRam.start, SRam.end);\r
+ if (SRam.flags & SRF_ENABLED)\r
+ elprintf(EL_STATUS, "sram: %06x - %06x; eeprom: %i", SRam.start, SRam.end,\r
+ !!(SRam.flags & SRF_EEPROM));\r
\r
return 0;\r
}\r
return;\r
}\r
\r
+ // TODO: MCD+32X\r
if (PicoAHW & PAHW_MCD) {\r
PicoFrameMCD();\r
return;\r
}\r
\r
+ if (PicoAHW & PAHW_32X) {\r
+ PicoFrame32x();\r
+ return;\r
+ }\r
+\r
//if(Pico.video.reg[12]&0x2) Pico.video.status ^= 0x10; // change odd bit in interlace mode\r
\r
PicoFrameStart();\r