-// PicoDrive\r
-\r
-// (c) Copyright 2004 Dave, All rights reserved.\r
-// (c) Copyright 2006-2008 notaz, All rights reserved.\r
-// Free for non-commercial use.\r
-\r
-// For commercial use, separate licencing terms must be obtained.\r
-\r
+/*\r
+ * PicoDrive\r
+ * (c) Copyright Dave, 2004\r
+ * (C) notaz, 2006-2010\r
+ *\r
+ * This work is licensed under the terms of MAME license.\r
+ * See COPYING file in the top-level directory.\r
+ */\r
\r
#include "pico_int.h"\r
#include "sound/ym2612.h"\r
\r
-int PicoVer=0x0133;\r
struct Pico Pico;\r
-int PicoOpt = 0;\r
-int PicoSkipFrame = 0; // skip rendering frame?\r
-int emustatus = 0; // rapid_ym2612, multi_ym_updates\r
+int PicoOpt; \r
+int PicoSkipFrame; // skip rendering frame?\r
int PicoPad[2]; // Joypads, format is MXYZ SACB RLDU\r
int PicoPadInt[2]; // internal copy\r
-int PicoAHW = 0; // active addon hardware: scd_active, 32x_active, svp_active, pico_active\r
-int PicoRegionOverride = 0; // override the region detection 0: Auto, 1: Japan NTSC, 2: Japan PAL, 4: US, 8: Europe\r
-int PicoAutoRgnOrder = 0;\r
-struct PicoSRAM SRam = {0,};\r
+int PicoAHW; // active addon hardware: PAHW_*\r
+int PicoQuirks; // game-specific quirks\r
+int PicoRegionOverride; // override the region detection 0: Auto, 1: Japan NTSC, 2: Japan PAL, 4: US, 8: Europe\r
+int PicoAutoRgnOrder;\r
+\r
+struct PicoSRAM SRam;\r
+int emustatus; // rapid_ym2612, multi_ym_updates\r
+int scanlines_total;\r
\r
void (*PicoWriteSound)(int len) = NULL; // called at the best time to send sound buffer (PsndOut) to hardware\r
void (*PicoResetHook)(void) = NULL;\r
\r
PicoInitMCD();\r
PicoSVPInit();\r
-\r
- SRam.data=0;\r
+ Pico32xInit();\r
}\r
\r
// to be called once on emu exit\r
PicoCartUnload();\r
z80_exit();\r
\r
- if (SRam.data) free(SRam.data); SRam.data=0;\r
+ if (SRam.data)\r
+ free(SRam.data);\r
+ pevt_dump();\r
}\r
\r
void PicoPower(void)\r
{\r
- unsigned char sram_reg=Pico.m.sram_reg; // must be preserved\r
-\r
Pico.m.frame_count = 0;\r
+ SekCycleCnt = SekCycleAim = 0;\r
\r
// clear all memory of the emulated machine\r
- memset(&Pico.ram,0,(unsigned int)&Pico.rom-(unsigned int)&Pico.ram);\r
+ memset(&Pico.ram,0,(unsigned char *)&Pico.rom - Pico.ram);\r
\r
memset(&Pico.video,0,sizeof(Pico.video));\r
memset(&Pico.m,0,sizeof(Pico.m));\r
Pico.video.pending_ints=0;\r
z80_reset();\r
\r
+ // my MD1 VA6 console has this in IO\r
+ Pico.ioports[1] = Pico.ioports[2] = Pico.ioports[3] = 0xff;\r
+\r
// default VDP register values (based on Fusion)\r
Pico.video.reg[0] = Pico.video.reg[1] = 0x04;\r
Pico.video.reg[0xc] = 0x81;\r
if (PicoAHW & PAHW_MCD)\r
PicoPowerMCD();\r
\r
- Pico.m.sram_reg=sram_reg;\r
+ if (PicoOpt & POPT_EN_32X)\r
+ PicoPower32x();\r
+\r
PicoReset();\r
}\r
\r
else\r
{\r
// Read cartridge region data:\r
- int region=PicoRead32(0x1f0);\r
+ unsigned short *rd = (unsigned short *)(Pico.rom + 0x1f0);\r
+ int region = (rd[0] << 16) | rd[1];\r
\r
- for (i=0;i<4;i++)\r
+ for (i = 0; i < 4; i++)\r
{\r
- int c=0;\r
+ int c;\r
\r
- c=region>>(i<<3); c&=0xff;\r
- if (c<=' ') continue;\r
+ c = region >> (i<<3);\r
+ c &= 0xff;\r
+ if (c <= ' ') continue;\r
\r
if (c=='J') support|=1;\r
else if (c=='U') support|=4;\r
\r
int PicoReset(void)\r
{\r
- unsigned char sram_reg=Pico.m.sram_reg; // must be preserved\r
-\r
if (Pico.romsize <= 0)\r
return 1;\r
\r
+#if defined(CPU_CMP_R) || defined(CPU_CMP_W) || defined(DRC_CMP)\r
+ PicoOpt |= POPT_DIS_VDP_FIFO|POPT_DIS_IDLE_DET;\r
+#endif\r
+\r
/* must call now, so that banking is reset, and correct vectors get fetched */\r
if (PicoResetHook)\r
PicoResetHook();\r
\r
- PicoMemReset();\r
memset(&PicoPadInt,0,sizeof(PicoPadInt));\r
emustatus = 0;\r
\r
}\r
\r
SekReset();\r
+ // ..but do not reset SekCycle* to not desync with addons\r
+\r
// s68k doesn't have the TAS quirk, so we just globally set normal TAS handler in MCD mode (used by Batman games).\r
SekSetRealTAS(PicoAHW & PAHW_MCD);\r
- SekCycleCntT=0;\r
-\r
- if (PicoAHW & PAHW_MCD)\r
- // needed for MCD to reset properly, probably some bug hides behind this..\r
- memset(Pico.ioports,0,sizeof(Pico.ioports));\r
\r
Pico.m.dirtyPal = 1;\r
\r
Pico.m.z80_bank68k = 0;\r
- memset(Pico.zram, 0, sizeof(Pico.zram)); // ??\r
+ Pico.m.z80_reset = 1;\r
\r
PicoDetectRegion();\r
Pico.video.status = 0x3428 | Pico.m.pal; // 'always set' bits | vblank | collision | pal\r
if (!(PicoOpt & POPT_DIS_IDLE_DET))\r
SekInitIdleDet();\r
\r
+ if (PicoOpt & POPT_EN_32X)\r
+ PicoReset32x();\r
+\r
// reset sram state; enable sram access by default if it doesn't overlap with ROM\r
- Pico.m.sram_reg=sram_reg&0x14;\r
- if (!(Pico.m.sram_reg&4) && Pico.romsize <= SRam.start) Pico.m.sram_reg |= 1;\r
+ Pico.m.sram_reg = 0;\r
+ if ((SRam.flags & SRF_EEPROM) || Pico.romsize <= SRam.start)\r
+ Pico.m.sram_reg |= SRR_MAPPED;\r
\r
- elprintf(EL_STATUS, "sram: det: %i; eeprom: %i; start: %06x; end: %06x",\r
- (Pico.m.sram_reg>>4)&1, (Pico.m.sram_reg>>2)&1, SRam.start, SRam.end);\r
+ if (SRam.flags & SRF_ENABLED)\r
+ elprintf(EL_STATUS, "sram: %06x - %06x; eeprom: %i", SRam.start, SRam.end,\r
+ !!(SRam.flags & SRF_EEPROM));\r
\r
return 0;\r
}\r
\r
+// flush config changes before emu loop starts\r
+void PicoLoopPrepare(void)\r
+{\r
+ if (PicoRegionOverride)\r
+ // force setting possibly changed..\r
+ Pico.m.pal = (PicoRegionOverride == 2 || PicoRegionOverride == 8) ? 1 : 0;\r
+\r
+ // FIXME: PAL has 313 scanlines..\r
+ scanlines_total = Pico.m.pal ? 312 : 262;\r
+\r
+ Pico.m.dirtyPal = 1;\r
+ rendstatus_old = -1;\r
+}\r
+\r
\r
// dma2vram settings are just hacks to unglitch Legend of Galahad (needs <= 104 to work)\r
// same for Outrunners (92-121, when active is set to 24)\r
// 96 is VR hack\r
static const int dma_timings[] = {\r
- 96, 167, 166, 83, // vblank: 32cell: dma2vram dma2[vs|c]ram vram_fill vram_copy\r
+ 167, 167, 166, 83, // vblank: 32cell: dma2vram dma2[vs|c]ram vram_fill vram_copy\r
102, 205, 204, 102, // vblank: 40cell:\r
16, 16, 15, 8, // active: 32cell:\r
24, 18, 17, 9 // ...\r
};\r
\r
static const int dma_bsycles[] = {\r
- (488<<8)/96, (488<<8)/167, (488<<8)/166, (488<<8)/83,\r
- (488<<8)/102, (488<<8)/205, (488<<8)/204, (488<<8)/102,\r
+ (488<<8)/167, (488<<8)/167, (488<<8)/166, (488<<8)/83,\r
+ (488<<8)/102, (488<<8)/233, (488<<8)/204, (488<<8)/102,\r
(488<<8)/16, (488<<8)/16, (488<<8)/15, (488<<8)/8,\r
(488<<8)/24, (488<<8)/18, (488<<8)/17, (488<<8)/9\r
};\r
\r
+// grossly inaccurate.. FIXME FIXXXMEE\r
PICO_INTERNAL int CheckDMA(void)\r
{\r
int burn = 0, xfers_can, dma_op = Pico.video.reg[0x17]>>6; // see gens for 00 and 01 modes\r
return burn;\r
}\r
\r
-static __inline void SekRunM68k(int cyc)\r
-{\r
- int cyc_do;\r
- SekCycleAim+=cyc;\r
- if ((cyc_do=SekCycleAim-SekCycleCnt) <= 0) return;\r
-#if defined(EMU_CORE_DEBUG)\r
- // this means we do run-compare\r
- SekCycleCnt+=CM_compareRun(cyc_do, 0);\r
-#elif defined(EMU_C68K)\r
- PicoCpuCM68k.cycles=cyc_do;\r
- CycloneRun(&PicoCpuCM68k);\r
- SekCycleCnt+=cyc_do-PicoCpuCM68k.cycles;\r
-#elif defined(EMU_M68K)\r
- SekCycleCnt+=m68k_execute(cyc_do);\r
-#elif defined(EMU_F68K)\r
- SekCycleCnt+=fm68k_emulate(cyc_do+1, 0, 0);\r
-#endif\r
-}\r
-\r
#include "pico_cmn.c"\r
\r
-int z80stopCycle;\r
-int z80_cycle_cnt; /* 'done' z80 cycles before z80_run() */\r
+unsigned int last_z80_sync; /* in 68k cycles */\r
+int z80_cycle_cnt;\r
int z80_cycle_aim;\r
int z80_scanline;\r
int z80_scanline_cycles; /* cycles done until z80_scanline */\r
\r
/* sync z80 to 68k */\r
-PICO_INTERNAL void PicoSyncZ80(int m68k_cycles_done)\r
+PICO_INTERNAL void PicoSyncZ80(unsigned int m68k_cycles_done)\r
{\r
+ int m68k_cnt;\r
int cnt;\r
- z80_cycle_aim = cycles_68k_to_z80(m68k_cycles_done);\r
+\r
+ m68k_cnt = m68k_cycles_done - last_z80_sync;\r
+ z80_cycle_aim += cycles_68k_to_z80(m68k_cnt);\r
cnt = z80_cycle_aim - z80_cycle_cnt;\r
+ last_z80_sync = m68k_cycles_done;\r
\r
- elprintf(EL_BUSREQ, "z80 sync %i (%i|%i -> %i|%i)", cnt, z80_cycle_cnt, z80_cycle_cnt / 228,\r
- z80_cycle_aim, z80_cycle_aim / 228);\r
+ pprof_start(z80);\r
+\r
+ elprintf(EL_BUSREQ, "z80 sync %i (%u|%u -> %u|%u)", cnt,\r
+ z80_cycle_cnt, z80_cycle_cnt / 288,\r
+ z80_cycle_aim, z80_cycle_aim / 288);\r
\r
if (cnt > 0)\r
z80_cycle_cnt += z80_run(cnt);\r
+\r
+ pprof_end(z80);\r
}\r
\r
\r
void PicoFrame(void)\r
{\r
+ pprof_start(frame);\r
+\r
Pico.m.frame_count++;\r
\r
if (PicoAHW & PAHW_SMS) {\r
PicoFrameMS();\r
- return;\r
+ goto end;\r
+ }\r
+\r
+ if (PicoAHW & PAHW_32X) {\r
+ PicoFrame32x(); // also does MCD+32X\r
+ goto end;\r
}\r
\r
if (PicoAHW & PAHW_MCD) {\r
PicoFrameMCD();\r
- return;\r
+ goto end;\r
}\r
\r
//if(Pico.video.reg[12]&0x2) Pico.video.status ^= 0x10; // change odd bit in interlace mode\r
\r
PicoFrameStart();\r
PicoFrameHints();\r
+\r
+end:\r
+ pprof_end(frame);\r
}\r
\r
void PicoFrameDrawOnly(void)\r