/*
- * common code for pico.c and cd/pico.c
- * (C) notaz, 2007-2009
+ * common code for base/cd/32x
+ * (C) notaz, 2007-2009,2013
*
* This work is licensed under the terms of MAME license.
* See COPYING file in the top-level directory.
#elif defined(EMU_M68K)
SekCycleCnt += m68k_execute(cyc_do) - cyc_do;
#elif defined(EMU_F68K)
- SekCycleCnt += fm68k_emulate(cyc_do, 0, 0) - cyc_do;
+ SekCycleCnt += fm68k_emulate(cyc_do, 0) - cyc_do;
#endif
}
pprof_end(m68k);
}
-static inline void SekRunM68k(int cyc)
+static INLINE void SekRunM68k(int cyc)
{
SekCycleAim += cyc;
SekSyncM68k();
if (ym2612.dacen && PsndDacLine <= y)
PsndDoDAC(y);
#ifdef PICO_CD
- pcd_sync_s68k(cycles, 0);
+ if (PicoAHW & PAHW_MCD)
+ pcd_sync_s68k(cycles, 0);
#endif
#ifdef PICO_32X
p32x_sync_sh2s(cycles);
}
// Run scanline:
+ line_base_cycles = SekCyclesDone();
if (Pico.m.dma_xfers) SekCyclesBurn(CheckDMA());
CPUS_RUN(CYCLES_M68K_LINE);
// there must be a delay after vblank bit is set and irq is asserted (Mazin Saga)
// also delay between F bit (bit 7) is set in SR and IRQ happens (Ex-Mutants)
// also delay between last H-int and V-int (Golden Axe 3)
+ line_base_cycles = SekCyclesDone();
+ if (Pico.m.dma_xfers) SekCyclesBurn(CheckDMA());
CPUS_RUN(CYCLES_M68K_VINT_LAG);
if (pv->reg[1]&0x20) {
}
#ifdef PICO_CD
- pcd_sync_s68k(cycles, 0);
+ if (PicoAHW & PAHW_MCD)
+ pcd_sync_s68k(cycles, 0);
#endif
#ifdef PICO_32X
p32x_sync_sh2s(cycles);
}
// Run scanline:
- if (Pico.m.dma_xfers) SekCyclesBurn(CheckDMA());
CPUS_RUN(CYCLES_M68K_LINE - CYCLES_M68K_VINT_LAG - CYCLES_M68K_ASD);
if (PicoLineHook) PicoLineHook();
PAD_DELAY();
// Run scanline:
+ line_base_cycles = SekCyclesDone();
if (Pico.m.dma_xfers) SekCyclesBurn(CheckDMA());
CPUS_RUN(CYCLES_M68K_LINE);
PsndDoDAC(lines-1);
#ifdef PICO_CD
- pcd_sync_s68k(cycles, 0);
+ if (PicoAHW & PAHW_MCD)
+ pcd_sync_s68k(cycles, 0);
#endif
#ifdef PICO_32X
p32x_sync_sh2s(cycles);